projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 8945e37e KC |
2 | / { |
| 3 | #address-cells = <1>; | |
| 4 | #size-cells = <1>; | |
| 5 | compatible = "brcm,bcm7420"; | |
| 6 | ||
| 7 | cpus { | |
| 8 | #address-cells = <1>; | |
| 9 | #size-cells = <0>; | |
| 10 | ||
| 11 | mips-hpt-frequency = <93750000>; | |
| 12 | ||
| 13 | cpu@0 { | |
| 14 | compatible = "brcm,bmips5000"; | |
| 15 | device_type = "cpu"; | |
| 16 | reg = <0>; | |
| 17 | }; | |
| 18 | ||
| 19 | cpu@1 { | |
| 20 | compatible = "brcm,bmips5000"; | |
| 21 | device_type = "cpu"; | |
| 22 | reg = <1>; | |
| 23 | }; | |
| 24 | }; | |
| 25 | ||
| 26 | aliases { | |
| 27 | uart0 = &uart0; | |
| 28 | }; | |
| 29 | ||
| a2c510a2 | 30 | cpu_intc: interrupt-controller { |
| 8945e37e KC |
31 | #address-cells = <0>; |
| 32 | compatible = "mti,cpu-interrupt-controller"; | |
| 33 | ||
| 34 | interrupt-controller; | |
| 35 | #interrupt-cells = <1>; | |
| 36 | }; | |
| 37 | ||
| 38 | clocks { | |
| 39 | uart_clk: uart_clk { | |
| 40 | compatible = "fixed-clock"; | |
| 41 | #clock-cells = <0>; | |
| 42 | clock-frequency = <81000000>; | |
| 43 | }; | |
| 7bbe59dd JS |
44 | |
| 45 | upg_clk: upg_clk { | |
| 46 | compatible = "fixed-clock"; | |
| 47 | #clock-cells = <0>; | |
| 48 | clock-frequency = <27000000>; | |
| 49 | }; | |
| 8945e37e KC |
50 | }; |
| 51 | ||
| 52 | rdb { | |
| 53 | #address-cells = <1>; | |
| 54 | #size-cells = <1>; | |
| 55 | ||
| 56 | compatible = "simple-bus"; | |
| 57 | ranges = <0 0x10000000 0x01000000>; | |
| 58 | ||
| a2c510a2 | 59 | periph_intc: interrupt-controller@441400 { |
| 8945e37e KC |
60 | compatible = "brcm,bcm7038-l1-intc"; |
| 61 | reg = <0x441400 0x30>, <0x441600 0x30>; | |
| 62 | ||
| 63 | interrupt-controller; | |
| 64 | #interrupt-cells = <1>; | |
| 65 | ||
| 66 | interrupt-parent = <&cpu_intc>; | |
| 67 | interrupts = <2>, <3>; | |
| 68 | }; | |
| 69 | ||
| a2c510a2 | 70 | sun_l2_intc: interrupt-controller@401800 { |
| 8945e37e KC |
71 | compatible = "brcm,l2-intc"; |
| 72 | reg = <0x401800 0x30>; | |
| 73 | interrupt-controller; | |
| 74 | #interrupt-cells = <1>; | |
| 75 | interrupt-parent = <&periph_intc>; | |
| 76 | interrupts = <23>; | |
| 77 | }; | |
| 78 | ||
| 79 | gisb-arb@400000 { | |
| 80 | compatible = "brcm,bcm7400-gisb-arb"; | |
| 81 | reg = <0x400000 0xdc>; | |
| 82 | native-endian; | |
| 83 | interrupt-parent = <&sun_l2_intc>; | |
| 84 | interrupts = <0>, <2>; | |
| 85 | brcm,gisb-arb-master-mask = <0x3ff>; | |
| 86 | brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0", | |
| 87 | "pcie_0", "bsp_0", "rdc_0", | |
| 88 | "rptd_0", "avd_0", "avd_1", | |
| 89 | "jtag_0"; | |
| 90 | }; | |
| 91 | ||
| a2c510a2 | 92 | upg_irq0_intc: interrupt-controller@406780 { |
| 8945e37e KC |
93 | compatible = "brcm,bcm7120-l2-intc"; |
| 94 | reg = <0x406780 0x8>; | |
| 95 | ||
| d783738c | 96 | brcm,int-map-mask = <0x44>, <0x1f000000>, <0x100000>; |
| 8945e37e KC |
97 | brcm,int-fwd-mask = <0x70000>; |
| 98 | ||
| 99 | interrupt-controller; | |
| 100 | #interrupt-cells = <1>; | |
| 101 | ||
| 102 | interrupt-parent = <&periph_intc>; | |
| d783738c JS |
103 | interrupts = <18>, <19>, <20>; |
| 104 | interrupt-names = "upg_main", "upg_bsc", "upg_spi"; | |
| 8945e37e KC |
105 | }; |
| 106 | ||
| 107 | sun_top_ctrl: syscon@404000 { | |
| 108 | compatible = "brcm,bcm7420-sun-top-ctrl", "syscon"; | |
| 109 | reg = <0x404000 0x60c>; | |
| 25d6463e | 110 | native-endian; |
| 8945e37e KC |
111 | }; |
| 112 | ||
| 113 | reboot { | |
| 114 | compatible = "brcm,bcm7038-reboot"; | |
| 115 | syscon = <&sun_top_ctrl 0x8 0x14>; | |
| 116 | }; | |
| 117 | ||
| 118 | uart0: serial@406b00 { | |
| 119 | compatible = "ns16550a"; | |
| 120 | reg = <0x406b00 0x20>; | |
| 121 | reg-io-width = <0x4>; | |
| 122 | reg-shift = <0x2>; | |
| 123 | interrupt-parent = <&periph_intc>; | |
| 124 | interrupts = <21>; | |
| 125 | clocks = <&uart_clk>; | |
| 126 | status = "disabled"; | |
| 127 | }; | |
| 128 | ||
| 5c40d493 JS |
129 | uart1: serial@406b40 { |
| 130 | compatible = "ns16550a"; | |
| 131 | reg = <0x406b40 0x20>; | |
| 132 | reg-io-width = <0x4>; | |
| 133 | reg-shift = <0x2>; | |
| 134 | interrupt-parent = <&periph_intc>; | |
| 135 | interrupts = <64>; | |
| 136 | clocks = <&uart_clk>; | |
| 137 | status = "disabled"; | |
| 138 | }; | |
| 139 | ||
| 140 | uart2: serial@406b80 { | |
| 141 | compatible = "ns16550a"; | |
| 142 | reg = <0x406b80 0x20>; | |
| 143 | reg-io-width = <0x4>; | |
| 144 | reg-shift = <0x2>; | |
| 145 | interrupt-parent = <&periph_intc>; | |
| 146 | interrupts = <65>; | |
| 147 | clocks = <&uart_clk>; | |
| 148 | status = "disabled"; | |
| 149 | }; | |
| 150 | ||
| 151 | bsca: i2c@406200 { | |
| 152 | clock-frequency = <390000>; | |
| 153 | compatible = "brcm,brcmstb-i2c"; | |
| 154 | interrupt-parent = <&upg_irq0_intc>; | |
| 155 | reg = <0x406200 0x58>; | |
| 156 | interrupts = <24>; | |
| 157 | interrupt-names = "upg_bsca"; | |
| 158 | status = "disabled"; | |
| 159 | }; | |
| 160 | ||
| 161 | bscb: i2c@406280 { | |
| 162 | clock-frequency = <390000>; | |
| 163 | compatible = "brcm,brcmstb-i2c"; | |
| 164 | interrupt-parent = <&upg_irq0_intc>; | |
| 165 | reg = <0x406280 0x58>; | |
| 166 | interrupts = <25>; | |
| 167 | interrupt-names = "upg_bscb"; | |
| 168 | status = "disabled"; | |
| 169 | }; | |
| 170 | ||
| 171 | bscc: i2c@406300 { | |
| 172 | clock-frequency = <390000>; | |
| 173 | compatible = "brcm,brcmstb-i2c"; | |
| 174 | interrupt-parent = <&upg_irq0_intc>; | |
| 175 | reg = <0x406300 0x58>; | |
| 176 | interrupts = <26>; | |
| 177 | interrupt-names = "upg_bscc"; | |
| 178 | status = "disabled"; | |
| 179 | }; | |
| 180 | ||
| 181 | bscd: i2c@406380 { | |
| 182 | clock-frequency = <390000>; | |
| 183 | compatible = "brcm,brcmstb-i2c"; | |
| 184 | interrupt-parent = <&upg_irq0_intc>; | |
| 185 | reg = <0x406380 0x58>; | |
| 186 | interrupts = <27>; | |
| 187 | interrupt-names = "upg_bscd"; | |
| 188 | status = "disabled"; | |
| 189 | }; | |
| 190 | ||
| 191 | bsce: i2c@406800 { | |
| 192 | clock-frequency = <390000>; | |
| 193 | compatible = "brcm,brcmstb-i2c"; | |
| 194 | interrupt-parent = <&upg_irq0_intc>; | |
| 195 | reg = <0x406800 0x58>; | |
| 196 | interrupts = <28>; | |
| 197 | interrupt-names = "upg_bsce"; | |
| 198 | status = "disabled"; | |
| 199 | }; | |
| 200 | ||
| 7bbe59dd JS |
201 | pwma: pwm@406580 { |
| 202 | compatible = "brcm,bcm7038-pwm"; | |
| 203 | reg = <0x406580 0x28>; | |
| 204 | #pwm-cells = <2>; | |
| 205 | clocks = <&upg_clk>; | |
| 206 | status = "disabled"; | |
| 207 | }; | |
| 208 | ||
| 209 | pwmb: pwm@406880 { | |
| 210 | compatible = "brcm,bcm7038-pwm"; | |
| 211 | reg = <0x406880 0x28>; | |
| 212 | #pwm-cells = <2>; | |
| 213 | clocks = <&upg_clk>; | |
| 214 | status = "disabled"; | |
| 215 | }; | |
| 216 | ||
| c707844d JS |
217 | upg_gio: gpio@406700 { |
| 218 | compatible = "brcm,brcmstb-gpio"; | |
| 219 | reg = <0x406700 0x80>; | |
| 220 | #gpio-cells = <2>; | |
| 221 | #interrupt-cells = <2>; | |
| 222 | gpio-controller; | |
| 223 | interrupt-controller; | |
| 224 | interrupt-parent = <&upg_irq0_intc>; | |
| 225 | interrupts = <6>; | |
| 226 | brcm,gpio-bank-widths = <32 32 32 27>; | |
| 227 | }; | |
| 228 | ||
| 8945e37e KC |
229 | enet0: ethernet@468000 { |
| 230 | phy-mode = "internal"; | |
| 231 | phy-handle = <&phy1>; | |
| 232 | mac-address = [ 00 10 18 36 23 1a ]; | |
| 233 | compatible = "brcm,genet-v1"; | |
| 234 | #address-cells = <0x1>; | |
| 235 | #size-cells = <0x1>; | |
| 236 | reg = <0x468000 0x3c8c>; | |
| 237 | interrupts = <69>, <79>; | |
| 238 | interrupt-parent = <&periph_intc>; | |
| 239 | status = "disabled"; | |
| 240 | ||
| 241 | mdio@e14 { | |
| 242 | compatible = "brcm,genet-mdio-v1"; | |
| 243 | #address-cells = <0x1>; | |
| 244 | #size-cells = <0x0>; | |
| 245 | reg = <0xe14 0x8>; | |
| 246 | ||
| 247 | phy1: ethernet-phy@1 { | |
| 248 | max-speed = <100>; | |
| 249 | reg = <0x1>; | |
| 250 | compatible = "brcm,65nm-ephy", | |
| 251 | "ethernet-phy-ieee802.3-c22"; | |
| 252 | }; | |
| 253 | }; | |
| 254 | }; | |
| 255 | ||
| 256 | ehci0: usb@488300 { | |
| 257 | compatible = "brcm,bcm7420-ehci", "generic-ehci"; | |
| 258 | reg = <0x488300 0x100>; | |
| 259 | interrupt-parent = <&periph_intc>; | |
| 260 | interrupts = <60>; | |
| 261 | status = "disabled"; | |
| 262 | }; | |
| 263 | ||
| 264 | ohci0: usb@488400 { | |
| 265 | compatible = "brcm,bcm7420-ohci", "generic-ohci"; | |
| 266 | reg = <0x488400 0x100>; | |
| 267 | native-endian; | |
| 268 | no-big-frame-no; | |
| 269 | interrupt-parent = <&periph_intc>; | |
| 270 | interrupts = <61>; | |
| 271 | status = "disabled"; | |
| 272 | }; | |
| 273 | ||
| 274 | ehci1: usb@488500 { | |
| 275 | compatible = "brcm,bcm7420-ehci", "generic-ehci"; | |
| 276 | reg = <0x488500 0x100>; | |
| 277 | interrupt-parent = <&periph_intc>; | |
| 278 | interrupts = <55>; | |
| 279 | status = "disabled"; | |
| 280 | }; | |
| 281 | ||
| 282 | ohci1: usb@488600 { | |
| 283 | compatible = "brcm,bcm7420-ohci", "generic-ohci"; | |
| 284 | reg = <0x488600 0x100>; | |
| 285 | native-endian; | |
| 286 | no-big-frame-no; | |
| 287 | interrupt-parent = <&periph_intc>; | |
| 288 | interrupts = <62>; | |
| 289 | status = "disabled"; | |
| 290 | }; | |
| d783738c JS |
291 | |
| 292 | spi_l2_intc: interrupt-controller@411d00 { | |
| 293 | compatible = "brcm,l2-intc"; | |
| 294 | reg = <0x411d00 0x30>; | |
| 295 | interrupt-controller; | |
| 296 | #interrupt-cells = <1>; | |
| 297 | interrupt-parent = <&periph_intc>; | |
| 298 | interrupts = <78>; | |
| 299 | }; | |
| 300 | ||
| 301 | qspi: spi@443000 { | |
| 302 | #address-cells = <0x1>; | |
| 303 | #size-cells = <0x0>; | |
| 304 | compatible = "brcm,spi-bcm-qspi", | |
| 305 | "brcm,spi-brcmstb-qspi"; | |
| 306 | clocks = <&upg_clk>; | |
| 307 | reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>; | |
| 308 | reg-names = "cs_reg", "hif_mspi", "bspi"; | |
| 309 | interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; | |
| 310 | interrupt-parent = <&spi_l2_intc>; | |
| 311 | interrupt-names = "spi_lr_fullness_reached", | |
| 312 | "spi_lr_session_aborted", | |
| 313 | "spi_lr_impatient", | |
| 314 | "spi_lr_session_done", | |
| 315 | "spi_lr_overread", | |
| 316 | "mspi_done", | |
| 317 | "mspi_halted"; | |
| 318 | status = "disabled"; | |
| 319 | }; | |
| 320 | ||
| 321 | mspi: spi@406400 { | |
| 322 | #address-cells = <1>; | |
| 323 | #size-cells = <0>; | |
| 324 | compatible = "brcm,spi-bcm-qspi", | |
| 325 | "brcm,spi-brcmstb-mspi"; | |
| 326 | clocks = <&upg_clk>; | |
| 327 | reg = <0x406400 0x180>; | |
| 328 | reg-names = "mspi"; | |
| 329 | interrupts = <0x14>; | |
| 330 | interrupt-parent = <&upg_irq0_intc>; | |
| 331 | interrupt-names = "mspi_done"; | |
| 332 | status = "disabled"; | |
| 333 | }; | |
| 8945e37e KC |
334 | }; |
| 335 | }; |