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e7300d04 MB |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> | |
7 | */ | |
8 | ||
9 | #include <linux/init.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/delay.h> | |
12 | #include <linux/bootmem.h> | |
13 | #include <linux/ioport.h> | |
14 | #include <linux/pm.h> | |
15 | #include <asm/bootinfo.h> | |
16 | #include <asm/time.h> | |
17 | #include <asm/reboot.h> | |
18 | #include <asm/cacheflush.h> | |
19 | #include <bcm63xx_board.h> | |
20 | #include <bcm63xx_cpu.h> | |
21 | #include <bcm63xx_regs.h> | |
22 | #include <bcm63xx_io.h> | |
23 | ||
24 | void bcm63xx_machine_halt(void) | |
25 | { | |
26 | printk(KERN_INFO "System halted\n"); | |
27 | while (1) | |
28 | ; | |
29 | } | |
30 | ||
31 | static void bcm6348_a1_reboot(void) | |
32 | { | |
33 | u32 reg; | |
34 | ||
35 | /* soft reset all blocks */ | |
881b999e | 36 | printk(KERN_INFO "soft-resetting all blocks ...\n"); |
e7300d04 MB |
37 | reg = bcm_perf_readl(PERF_SOFTRESET_REG); |
38 | reg &= ~SOFTRESET_6348_ALL; | |
39 | bcm_perf_writel(reg, PERF_SOFTRESET_REG); | |
40 | mdelay(10); | |
41 | ||
42 | reg = bcm_perf_readl(PERF_SOFTRESET_REG); | |
43 | reg |= SOFTRESET_6348_ALL; | |
44 | bcm_perf_writel(reg, PERF_SOFTRESET_REG); | |
45 | mdelay(10); | |
46 | ||
47 | /* Jump to the power on address. */ | |
48 | printk(KERN_INFO "jumping to reset vector.\n"); | |
49 | /* set high vectors (base at 0xbfc00000 */ | |
50 | set_c0_status(ST0_BEV | ST0_ERL); | |
51 | /* run uncached in kseg0 */ | |
52 | change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED); | |
53 | __flush_cache_all(); | |
54 | /* remove all wired TLB entries */ | |
55 | write_c0_wired(0); | |
56 | __asm__ __volatile__( | |
57 | "jr\t%0" | |
58 | : | |
59 | : "r" (0xbfc00000)); | |
60 | while (1) | |
61 | ; | |
62 | } | |
63 | ||
64 | void bcm63xx_machine_reboot(void) | |
65 | { | |
6224892c MB |
66 | u32 reg, perf_regs[2] = { 0, 0 }; |
67 | unsigned int i; | |
e7300d04 MB |
68 | |
69 | /* mask and clear all external irq */ | |
6224892c | 70 | switch (bcm63xx_get_cpu_id()) { |
7b933421 FF |
71 | case BCM3368_CPU_ID: |
72 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368; | |
73 | break; | |
e5766aea JG |
74 | case BCM6328_CPU_ID: |
75 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328; | |
76 | break; | |
6224892c MB |
77 | case BCM6338_CPU_ID: |
78 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338; | |
79 | break; | |
64eaea4a MB |
80 | case BCM6345_CPU_ID: |
81 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6345; | |
82 | break; | |
6224892c MB |
83 | case BCM6348_CPU_ID: |
84 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348; | |
85 | break; | |
86 | case BCM6358_CPU_ID: | |
87 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6358; | |
88 | break; | |
2c8aaf71 JG |
89 | case BCM6362_CPU_ID: |
90 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6362; | |
91 | break; | |
6224892c MB |
92 | } |
93 | ||
94 | for (i = 0; i < 2; i++) { | |
6d591805 MB |
95 | if (!perf_regs[i]) |
96 | break; | |
97 | ||
6224892c MB |
98 | reg = bcm_perf_readl(perf_regs[i]); |
99 | if (BCMCPU_IS_6348()) { | |
100 | reg &= ~EXTIRQ_CFG_MASK_ALL_6348; | |
101 | reg |= EXTIRQ_CFG_CLEAR_ALL_6348; | |
102 | } else { | |
103 | reg &= ~EXTIRQ_CFG_MASK_ALL; | |
104 | reg |= EXTIRQ_CFG_CLEAR_ALL; | |
105 | } | |
106 | bcm_perf_writel(reg, perf_regs[i]); | |
107 | } | |
e7300d04 MB |
108 | |
109 | if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1)) | |
110 | bcm6348_a1_reboot(); | |
111 | ||
112 | printk(KERN_INFO "triggering watchdog soft-reset...\n"); | |
e5766aea JG |
113 | if (BCMCPU_IS_6328()) { |
114 | bcm_wdt_writel(1, WDT_SOFTRESET_REG); | |
115 | } else { | |
116 | reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); | |
117 | reg |= SYS_PLL_SOFT_RESET; | |
118 | bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG); | |
119 | } | |
e7300d04 MB |
120 | while (1) |
121 | ; | |
122 | } | |
123 | ||
124 | static void __bcm63xx_machine_reboot(char *p) | |
125 | { | |
126 | bcm63xx_machine_reboot(); | |
127 | } | |
128 | ||
129 | /* | |
130 | * return system type in /proc/cpuinfo | |
131 | */ | |
132 | const char *get_system_type(void) | |
133 | { | |
134 | static char buf[128]; | |
6605428c | 135 | snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)", |
e7300d04 MB |
136 | board_get_name(), |
137 | bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev()); | |
138 | return buf; | |
139 | } | |
140 | ||
141 | void __init plat_time_init(void) | |
142 | { | |
143 | mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2; | |
144 | } | |
145 | ||
146 | void __init plat_mem_setup(void) | |
147 | { | |
148 | add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM); | |
149 | ||
150 | _machine_halt = bcm63xx_machine_halt; | |
151 | _machine_restart = __bcm63xx_machine_reboot; | |
152 | pm_power_off = bcm63xx_machine_halt; | |
153 | ||
154 | set_io_port_base(0); | |
155 | ioport_resource.start = 0; | |
156 | ioport_resource.end = ~0; | |
157 | ||
158 | board_setup(); | |
159 | } | |
160 | ||
161 | int __init bcm63xx_register_devices(void) | |
162 | { | |
163 | return board_register_devices(); | |
164 | } | |
165 | ||
1762c5ab | 166 | arch_initcall(bcm63xx_register_devices); |