[linux-2.6-block.git] / arch / mips / au1000 / pb1200 / irqmap.c

/*
 * BRIEF MODULE DESCRIPTION
 *	Au1xxx irq map table
 *
 *  This program is free software; you can redistribute	 it and/or modify it
 *  under  the terms of	 the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the	License, or (at your
 *  option) any later version.
 *
 *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED
 *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,
 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF
 *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  You should have received a copy of the  GNU General Public License along
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 */
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <linux/bitops.h>

#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/mach-au1x00/au1000.h>

#ifdef CONFIG_MIPS_PB1200
#include <asm/mach-pb1x00/pb1200.h>
#endif

#ifdef CONFIG_MIPS_DB1200
#include <asm/mach-db1x00/db1200.h>
#define PB1200_INT_BEGIN DB1200_INT_BEGIN
#define PB1200_INT_END DB1200_INT_END
#endif

struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
	{ AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
};

int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);

/*
 *	Support for External interrupts on the PbAu1200 Development platform.
 */
static volatile int pb1200_cascade_en=0;

irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
{
	unsigned short bisr = bcsr->int_status;
	int extirq_nr = 0;

	/* Clear all the edge interrupts. This has no effect on level */
	bcsr->int_status = bisr;
	for( ; bisr; bisr &= (bisr-1) )
	{
		extirq_nr = PB1200_INT_BEGIN + ffs(bisr);
		/* Ack and dispatch IRQ */
		do_IRQ(extirq_nr);
	}

	return IRQ_RETVAL(1);
}

inline void pb1200_enable_irq(unsigned int irq_nr)
{
	bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
	bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
}

inline void pb1200_disable_irq(unsigned int irq_nr)
{
	bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
	bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
}

static unsigned int pb1200_startup_irq( unsigned int irq_nr )
{
	if (++pb1200_cascade_en == 1)
	{
		request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
			0, "Pb1200 Cascade", (void *)&pb1200_cascade_handler );
#ifdef CONFIG_MIPS_PB1200
    /* We have a problem with CPLD rev3. Enable a workaround */
	if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
	{
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
		printk("updated to latest revision. This software will not\n");
		printk("work on anything less than CPLD rev4\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		printk("\nWARNING!!!\n");
		while(1);
	}
#endif
	}
	pb1200_enable_irq(irq_nr);
	return 0;
}

static void pb1200_shutdown_irq( unsigned int irq_nr )
{
	pb1200_disable_irq(irq_nr);
	if (--pb1200_cascade_en == 0)
	{
		free_irq(AU1000_GPIO_7, &pb1200_cascade_handler );
	}
	return;
}

static struct irq_chip external_irq_type =
{
#ifdef CONFIG_MIPS_PB1200
	.name = "Pb1200 Ext",
#endif
#ifdef CONFIG_MIPS_DB1200
	.name = "Db1200 Ext",
#endif
	.startup  = pb1200_startup_irq,
	.shutdown = pb1200_shutdown_irq,
	.ack      = pb1200_disable_irq,
	.mask     = pb1200_disable_irq,
	.mask_ack = pb1200_disable_irq,
	.unmask   = pb1200_enable_irq,
};

void _board_init_irq(void)
{
	int irq_nr;

	for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
	{
		set_irq_chip_and_handler(irq_nr, &external_irq_type,
					 handle_level_irq);
		pb1200_disable_irq(irq_nr);
	}

	/* GPIO_7 can not be hooked here, so it is hooked upon first
	request of any source attached to the cascade */
}
Commit	Line	Data
e3ad1c23 PP	1	/*
	2	* BRIEF MODULE DESCRIPTION
	3	* Au1xxx irq map table
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License as published by the
	7	* Free Software Foundation; either version 2 of the License, or (at your
	8	* option) any later version.
	9	*
	10	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	11	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	12	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	13	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	14	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	15	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	16	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	17	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	18	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	19	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	20	*
	21	* You should have received a copy of the GNU General Public License along
	22	* with this program; if not, write to the Free Software Foundation, Inc.,
	23	* 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25	#include <linux/errno.h>
	26	#include <linux/init.h>
	27	#include <linux/irq.h>
	28	#include <linux/kernel_stat.h>
	29	#include <linux/module.h>
	30	#include <linux/signal.h>
	31	#include <linux/sched.h>
	32	#include <linux/types.h>
	33	#include <linux/interrupt.h>
	34	#include <linux/ioport.h>
	35	#include <linux/timex.h>
	36	#include <linux/slab.h>
	37	#include <linux/random.h>
	38	#include <linux/delay.h>
1977f032	39	#include <linux/bitops.h>
e3ad1c23	40
e3ad1c23 PP	41	#include <asm/bootinfo.h>
	42	#include <asm/io.h>
	43	#include <asm/mipsregs.h>
	44	#include <asm/system.h>
	45	#include <asm/mach-au1x00/au1000.h>
	46
	47	#ifdef CONFIG_MIPS_PB1200
	48	#include <asm/mach-pb1x00/pb1200.h>
	49	#endif
	50
	51	#ifdef CONFIG_MIPS_DB1200
	52	#include <asm/mach-db1x00/db1200.h>
	53	#define PB1200_INT_BEGIN DB1200_INT_BEGIN
	54	#define PB1200_INT_END DB1200_INT_END
	55	#endif
	56
0e6799ed	57	struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
e3ad1c23 PP	58	{ AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
	59	};
	60
a643d2b5	61	int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
e3ad1c23 PP	62
	63	/*
	64	* Support for External interrupts on the PbAu1200 Development platform.
	65	*/
	66	static volatile int pb1200_cascade_en=0;
	67
937a8015	68	irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
e3ad1c23 PP	69	{
	70	unsigned short bisr = bcsr->int_status;
	71	int extirq_nr = 0;
	72
	73	/* Clear all the edge interrupts. This has no effect on level */
	74	bcsr->int_status = bisr;
	75	for( ; bisr; bisr &= (bisr-1) )
	76	{
820b2d85	77	extirq_nr = PB1200_INT_BEGIN + ffs(bisr);
e3ad1c23	78	/* Ack and dispatch IRQ */
937a8015	79	do_IRQ(extirq_nr);
e3ad1c23	80	}
937a8015	81
26a940e2	82	return IRQ_RETVAL(1);
e3ad1c23 PP	83	}
	84
	85	inline void pb1200_enable_irq(unsigned int irq_nr)
	86	{
	87	bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
	88	bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
	89	}
	90
	91	inline void pb1200_disable_irq(unsigned int irq_nr)
	92	{
	93	bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
	94	bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
	95	}
	96
	97	static unsigned int pb1200_startup_irq( unsigned int irq_nr )
	98	{
	99	if (++pb1200_cascade_en == 1)
	100	{
	101	request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
26a940e2	102	0, "Pb1200 Cascade", (void *)&pb1200_cascade_handler );
e3ad1c23 PP	103	#ifdef CONFIG_MIPS_PB1200
	104	/* We have a problem with CPLD rev3. Enable a workaround */
	105	if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
	106	{
	107	printk("\nWARNING!!!\n");
	108	printk("\nWARNING!!!\n");
	109	printk("\nWARNING!!!\n");
	110	printk("\nWARNING!!!\n");
	111	printk("\nWARNING!!!\n");
	112	printk("\nWARNING!!!\n");
	113	printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
	114	printk("updated to latest revision. This software will not\n");
	115	printk("work on anything less than CPLD rev4\n");
	116	printk("\nWARNING!!!\n");
	117	printk("\nWARNING!!!\n");
	118	printk("\nWARNING!!!\n");
	119	printk("\nWARNING!!!\n");
	120	printk("\nWARNING!!!\n");
	121	printk("\nWARNING!!!\n");
	122	while(1);
	123	}
	124	#endif
	125	}
	126	pb1200_enable_irq(irq_nr);
	127	return 0;
	128	}
	129
	130	static void pb1200_shutdown_irq( unsigned int irq_nr )
	131	{
	132	pb1200_disable_irq(irq_nr);
	133	if (--pb1200_cascade_en == 0)
	134	{
21a151d8	135	free_irq(AU1000_GPIO_7, &pb1200_cascade_handler );
e3ad1c23 PP	136	}
	137	return;
	138	}
	139
94dee171	140	static struct irq_chip external_irq_type =
e3ad1c23 PP	141	{
e3ad1c23 PP	142	#ifdef CONFIG_MIPS_PB1200
19487f1e	143	.name = "Pb1200 Ext",
e3ad1c23 PP	144	#endif
e3ad1c23 PP	145	#ifdef CONFIG_MIPS_DB1200
19487f1e	146	.name = "Db1200 Ext",
e3ad1c23	147	#endif
19487f1e AN	148	.startup = pb1200_startup_irq,
	149	.shutdown = pb1200_shutdown_irq,
	150	.ack = pb1200_disable_irq,
	151	.mask = pb1200_disable_irq,
	152	.mask_ack = pb1200_disable_irq,
	153	.unmask = pb1200_enable_irq,
e3ad1c23 PP	154	};
	155
	156	void _board_init_irq(void)
	157	{
	158	int irq_nr;
	159
	160	for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
	161	{
19487f1e AN	162	set_irq_chip_and_handler(irq_nr, &external_irq_type,
19487f1e AN	163	handle_level_irq);
e3ad1c23 PP	164	pb1200_disable_irq(irq_nr);
	165	}
	166
	167	/* GPIO_7 can not be hooked here, so it is hooked upon first
	168	request of any source attached to the cascade */
	169	}
	170