Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/livep...
[linux-2.6-block.git] / arch / mips / ar7 / platform.c
CommitLineData
7ca5dc14
FF
1/*
2 * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
3 * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/module.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/platform_device.h>
26#include <linux/mtd/physmap.h>
27#include <linux/serial.h>
28#include <linux/serial_8250.h>
29#include <linux/ioport.h>
30#include <linux/io.h>
7ca5dc14
FF
31#include <linux/vlynq.h>
32#include <linux/leds.h>
33#include <linux/string.h>
34#include <linux/etherdevice.h>
1e2c8d83
FF
35#include <linux/phy.h>
36#include <linux/phy_fixed.h>
5f3c9098 37#include <linux/gpio.h>
780019dd 38#include <linux/clk.h>
7ca5dc14
FF
39
40#include <asm/addrspace.h>
41#include <asm/mach-ar7/ar7.h>
42#include <asm/mach-ar7/gpio.h>
43#include <asm/mach-ar7/prom.h>
44
4d1da8c2
AC
45/*****************************************************************************
46 * VLYNQ Bus
47 ****************************************************************************/
7ca5dc14
FF
48struct plat_vlynq_data {
49 struct plat_vlynq_ops ops;
50 int gpio_bit;
51 int reset_bit;
52};
53
7ca5dc14
FF
54static int vlynq_on(struct vlynq_device *dev)
55{
4d1da8c2 56 int ret;
7ca5dc14
FF
57 struct plat_vlynq_data *pdata = dev->dev.platform_data;
58
4d1da8c2
AC
59 ret = gpio_request(pdata->gpio_bit, "vlynq");
60 if (ret)
7ca5dc14
FF
61 goto out;
62
63 ar7_device_reset(pdata->reset_bit);
64
4d1da8c2
AC
65 ret = ar7_gpio_disable(pdata->gpio_bit);
66 if (ret)
7ca5dc14
FF
67 goto out_enabled;
68
4d1da8c2
AC
69 ret = ar7_gpio_enable(pdata->gpio_bit);
70 if (ret)
7ca5dc14
FF
71 goto out_enabled;
72
4d1da8c2
AC
73 ret = gpio_direction_output(pdata->gpio_bit, 0);
74 if (ret)
7ca5dc14
FF
75 goto out_gpio_enabled;
76
77 msleep(50);
78
79 gpio_set_value(pdata->gpio_bit, 1);
4d1da8c2 80
7ca5dc14
FF
81 msleep(50);
82
83 return 0;
84
85out_gpio_enabled:
86 ar7_gpio_disable(pdata->gpio_bit);
87out_enabled:
88 ar7_device_disable(pdata->reset_bit);
89 gpio_free(pdata->gpio_bit);
90out:
4d1da8c2 91 return ret;
7ca5dc14
FF
92}
93
94static void vlynq_off(struct vlynq_device *dev)
95{
96 struct plat_vlynq_data *pdata = dev->dev.platform_data;
4d1da8c2 97
7ca5dc14
FF
98 ar7_gpio_disable(pdata->gpio_bit);
99 gpio_free(pdata->gpio_bit);
100 ar7_device_disable(pdata->reset_bit);
101}
102
4d1da8c2 103static struct resource vlynq_low_res[] = {
7ca5dc14 104 {
4d1da8c2
AC
105 .name = "regs",
106 .flags = IORESOURCE_MEM,
107 .start = AR7_REGS_VLYNQ0,
108 .end = AR7_REGS_VLYNQ0 + 0xff,
7ca5dc14
FF
109 },
110 {
4d1da8c2
AC
111 .name = "irq",
112 .flags = IORESOURCE_IRQ,
113 .start = 29,
114 .end = 29,
7ca5dc14 115 },
7ca5dc14 116 {
4d1da8c2
AC
117 .name = "mem",
118 .flags = IORESOURCE_MEM,
119 .start = 0x04000000,
120 .end = 0x04ffffff,
7ca5dc14
FF
121 },
122 {
4d1da8c2
AC
123 .name = "devirq",
124 .flags = IORESOURCE_IRQ,
125 .start = 80,
126 .end = 111,
7ca5dc14
FF
127 },
128};
129
4d1da8c2 130static struct resource vlynq_high_res[] = {
7ca5dc14 131 {
4d1da8c2
AC
132 .name = "regs",
133 .flags = IORESOURCE_MEM,
134 .start = AR7_REGS_VLYNQ1,
135 .end = AR7_REGS_VLYNQ1 + 0xff,
7ca5dc14
FF
136 },
137 {
4d1da8c2
AC
138 .name = "irq",
139 .flags = IORESOURCE_IRQ,
140 .start = 33,
141 .end = 33,
7ca5dc14
FF
142 },
143 {
4d1da8c2
AC
144 .name = "mem",
145 .flags = IORESOURCE_MEM,
146 .start = 0x0c000000,
147 .end = 0x0cffffff,
7ca5dc14
FF
148 },
149 {
4d1da8c2
AC
150 .name = "devirq",
151 .flags = IORESOURCE_IRQ,
152 .start = 112,
153 .end = 143,
7ca5dc14
FF
154 },
155};
156
4d1da8c2
AC
157static struct plat_vlynq_data vlynq_low_data = {
158 .ops = {
159 .on = vlynq_on,
160 .off = vlynq_off,
7ca5dc14 161 },
4d1da8c2
AC
162 .reset_bit = 20,
163 .gpio_bit = 18,
164};
165
166static struct plat_vlynq_data vlynq_high_data = {
167 .ops = {
168 .on = vlynq_on,
169 .off = vlynq_off,
7ca5dc14 170 },
1e3fb377 171 .reset_bit = 16,
4d1da8c2
AC
172 .gpio_bit = 19,
173};
174
175static struct platform_device vlynq_low = {
176 .id = 0,
177 .name = "vlynq",
178 .dev = {
179 .platform_data = &vlynq_low_data,
7ca5dc14 180 },
4d1da8c2
AC
181 .resource = vlynq_low_res,
182 .num_resources = ARRAY_SIZE(vlynq_low_res),
183};
184
185static struct platform_device vlynq_high = {
186 .id = 1,
187 .name = "vlynq",
188 .dev = {
189 .platform_data = &vlynq_high_data,
7ca5dc14 190 },
4d1da8c2
AC
191 .resource = vlynq_high_res,
192 .num_resources = ARRAY_SIZE(vlynq_high_res),
7ca5dc14
FF
193};
194
4d1da8c2
AC
195/*****************************************************************************
196 * Flash
197 ****************************************************************************/
198static struct resource physmap_flash_resource = {
199 .name = "mem",
200 .flags = IORESOURCE_MEM,
201 .start = 0x10000000,
202 .end = 0x107fffff,
203};
204
dcb96a4e
FF
205static const char *ar7_probe_types[] = { "ar7part", NULL };
206
4d1da8c2
AC
207static struct physmap_flash_data physmap_flash_data = {
208 .width = 2,
dcb96a4e 209 .part_probe_types = ar7_probe_types,
4d1da8c2
AC
210};
211
212static struct platform_device physmap_flash = {
213 .name = "physmap-flash",
214 .dev = {
215 .platform_data = &physmap_flash_data,
7ca5dc14 216 },
4d1da8c2
AC
217 .resource = &physmap_flash_resource,
218 .num_resources = 1,
219};
220
221/*****************************************************************************
222 * Ethernet
223 ****************************************************************************/
224static struct resource cpmac_low_res[] = {
7ca5dc14 225 {
4d1da8c2
AC
226 .name = "regs",
227 .flags = IORESOURCE_MEM,
228 .start = AR7_REGS_MAC0,
229 .end = AR7_REGS_MAC0 + 0x7ff,
7ca5dc14
FF
230 },
231 {
4d1da8c2
AC
232 .name = "irq",
233 .flags = IORESOURCE_IRQ,
234 .start = 27,
11454100 235 .end = 27,
7ca5dc14
FF
236 },
237};
238
4d1da8c2
AC
239static struct resource cpmac_high_res[] = {
240 {
241 .name = "regs",
242 .flags = IORESOURCE_MEM,
243 .start = AR7_REGS_MAC1,
244 .end = AR7_REGS_MAC1 + 0x7ff,
245 },
246 {
247 .name = "irq",
248 .flags = IORESOURCE_IRQ,
249 .start = 41,
250 .end = 41,
251 },
7ca5dc14
FF
252};
253
1e2c8d83 254static struct fixed_phy_status fixed_phy_status __initdata = {
4d1da8c2
AC
255 .link = 1,
256 .speed = 100,
257 .duplex = 1,
1e2c8d83
FF
258};
259
7ca5dc14 260static struct plat_cpmac_data cpmac_low_data = {
4d1da8c2
AC
261 .reset_bit = 17,
262 .power_bit = 20,
263 .phy_mask = 0x80000000,
7ca5dc14
FF
264};
265
266static struct plat_cpmac_data cpmac_high_data = {
4d1da8c2
AC
267 .reset_bit = 21,
268 .power_bit = 22,
269 .phy_mask = 0x7fffffff,
7ca5dc14
FF
270};
271
8e84c148 272static u64 cpmac_dma_mask = DMA_BIT_MASK(32);
4d1da8c2 273
7ca5dc14 274static struct platform_device cpmac_low = {
4d1da8c2
AC
275 .id = 0,
276 .name = "cpmac",
7ca5dc14 277 .dev = {
4d1da8c2
AC
278 .dma_mask = &cpmac_dma_mask,
279 .coherent_dma_mask = DMA_BIT_MASK(32),
280 .platform_data = &cpmac_low_data,
7ca5dc14 281 },
4d1da8c2
AC
282 .resource = cpmac_low_res,
283 .num_resources = ARRAY_SIZE(cpmac_low_res),
7ca5dc14
FF
284};
285
286static struct platform_device cpmac_high = {
4d1da8c2
AC
287 .id = 1,
288 .name = "cpmac",
7ca5dc14 289 .dev = {
4d1da8c2
AC
290 .dma_mask = &cpmac_dma_mask,
291 .coherent_dma_mask = DMA_BIT_MASK(32),
292 .platform_data = &cpmac_high_data,
7ca5dc14 293 },
4d1da8c2
AC
294 .resource = cpmac_high_res,
295 .num_resources = ARRAY_SIZE(cpmac_high_res),
7ca5dc14
FF
296};
297
d16f7093 298static void __init cpmac_get_mac(int instance, unsigned char *dev_addr)
4d1da8c2 299{
d16f7093 300 char name[5], *mac;
4d1da8c2 301
4d1da8c2
AC
302 sprintf(name, "mac%c", 'a' + instance);
303 mac = prom_getenv(name);
d16f7093 304 if (!mac && instance) {
4d1da8c2
AC
305 sprintf(name, "mac%c", 'a');
306 mac = prom_getenv(name);
307 }
d16f7093
AC
308
309 if (mac) {
5db7ccdc 310 if (!mac_pton(mac, dev_addr)) {
7178d2cd 311 pr_warn("cannot parse mac address, using random address\n");
6e5928f6 312 eth_random_addr(dev_addr);
d16f7093
AC
313 }
314 } else
6e5928f6 315 eth_random_addr(dev_addr);
4d1da8c2
AC
316}
317
318/*****************************************************************************
319 * USB
320 ****************************************************************************/
321static struct resource usb_res[] = {
322 {
323 .name = "regs",
324 .flags = IORESOURCE_MEM,
325 .start = AR7_REGS_USB,
326 .end = AR7_REGS_USB + 0xff,
327 },
328 {
329 .name = "irq",
330 .flags = IORESOURCE_IRQ,
331 .start = 32,
332 .end = 32,
333 },
334 {
335 .name = "mem",
336 .flags = IORESOURCE_MEM,
337 .start = 0x03400000,
632b629c 338 .end = 0x03401fff,
4d1da8c2 339 },
7ca5dc14
FF
340};
341
4d1da8c2
AC
342static struct platform_device ar7_udc = {
343 .name = "ar7_udc",
344 .resource = usb_res,
345 .num_resources = ARRAY_SIZE(usb_res),
346};
7ca5dc14 347
4d1da8c2
AC
348/*****************************************************************************
349 * LEDs
350 ****************************************************************************/
7ca5dc14
FF
351static struct gpio_led default_leds[] = {
352 {
4d1da8c2
AC
353 .name = "status",
354 .gpio = 8,
355 .active_low = 1,
7ca5dc14
FF
356 },
357};
358
238dd317
FF
359static struct gpio_led titan_leds[] = {
360 { .name = "status", .gpio = 8, .active_low = 1, },
361 { .name = "wifi", .gpio = 13, .active_low = 1, },
362};
363
7ca5dc14
FF
364static struct gpio_led dsl502t_leds[] = {
365 {
4d1da8c2
AC
366 .name = "status",
367 .gpio = 9,
368 .active_low = 1,
7ca5dc14
FF
369 },
370 {
4d1da8c2
AC
371 .name = "ethernet",
372 .gpio = 7,
373 .active_low = 1,
7ca5dc14
FF
374 },
375 {
4d1da8c2
AC
376 .name = "usb",
377 .gpio = 12,
378 .active_low = 1,
7ca5dc14
FF
379 },
380};
381
382static struct gpio_led dg834g_leds[] = {
383 {
4d1da8c2
AC
384 .name = "ppp",
385 .gpio = 6,
386 .active_low = 1,
7ca5dc14
FF
387 },
388 {
4d1da8c2
AC
389 .name = "status",
390 .gpio = 7,
391 .active_low = 1,
7ca5dc14
FF
392 },
393 {
4d1da8c2
AC
394 .name = "adsl",
395 .gpio = 8,
396 .active_low = 1,
7ca5dc14
FF
397 },
398 {
4d1da8c2
AC
399 .name = "wifi",
400 .gpio = 12,
401 .active_low = 1,
7ca5dc14
FF
402 },
403 {
4d1da8c2
AC
404 .name = "power",
405 .gpio = 14,
406 .active_low = 1,
407 .default_trigger = "default-on",
7ca5dc14
FF
408 },
409};
410
411static struct gpio_led fb_sl_leds[] = {
412 {
4d1da8c2
AC
413 .name = "1",
414 .gpio = 7,
7ca5dc14
FF
415 },
416 {
4d1da8c2
AC
417 .name = "2",
418 .gpio = 13,
419 .active_low = 1,
7ca5dc14
FF
420 },
421 {
4d1da8c2
AC
422 .name = "3",
423 .gpio = 10,
424 .active_low = 1,
7ca5dc14
FF
425 },
426 {
4d1da8c2
AC
427 .name = "4",
428 .gpio = 12,
429 .active_low = 1,
7ca5dc14
FF
430 },
431 {
4d1da8c2
AC
432 .name = "5",
433 .gpio = 9,
434 .active_low = 1,
7ca5dc14
FF
435 },
436};
437
438static struct gpio_led fb_fon_leds[] = {
439 {
4d1da8c2
AC
440 .name = "1",
441 .gpio = 8,
7ca5dc14
FF
442 },
443 {
4d1da8c2
AC
444 .name = "2",
445 .gpio = 3,
446 .active_low = 1,
7ca5dc14
FF
447 },
448 {
4d1da8c2
AC
449 .name = "3",
450 .gpio = 5,
7ca5dc14
FF
451 },
452 {
4d1da8c2
AC
453 .name = "4",
454 .gpio = 4,
455 .active_low = 1,
7ca5dc14
FF
456 },
457 {
4d1da8c2
AC
458 .name = "5",
459 .gpio = 11,
460 .active_low = 1,
7ca5dc14
FF
461 },
462};
463
f77138e8
FF
464static struct gpio_led gt701_leds[] = {
465 {
466 .name = "inet:green",
467 .gpio = 13,
468 .active_low = 1,
469 },
470 {
471 .name = "usb",
472 .gpio = 12,
473 .active_low = 1,
474 },
475 {
476 .name = "inet:red",
477 .gpio = 9,
478 .active_low = 1,
479 },
480 {
481 .name = "power:red",
482 .gpio = 7,
483 .active_low = 1,
484 },
485 {
486 .name = "power:green",
487 .gpio = 8,
488 .active_low = 1,
489 .default_trigger = "default-on",
490 },
70342287
RB
491 {
492 .name = "ethernet",
493 .gpio = 10,
494 .active_low = 1,
495 },
f77138e8
FF
496};
497
7ca5dc14
FF
498static struct gpio_led_platform_data ar7_led_data;
499
500static struct platform_device ar7_gpio_leds = {
501 .name = "leds-gpio",
7ca5dc14
FF
502 .dev = {
503 .platform_data = &ar7_led_data,
504 }
505};
506
7ca5dc14
FF
507static void __init detect_leds(void)
508{
509 char *prid, *usb_prod;
510
70342287 511 /* Default LEDs */
7ca5dc14
FF
512 ar7_led_data.num_leds = ARRAY_SIZE(default_leds);
513 ar7_led_data.leds = default_leds;
514
515 /* FIXME: the whole thing is unreliable */
516 prid = prom_getenv("ProductID");
517 usb_prod = prom_getenv("usb_prod");
518
519 /* If we can't get the product id from PROM, use the default LEDs */
520 if (!prid)
521 return;
522
523 if (strstr(prid, "Fritz_Box_FON")) {
524 ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds);
525 ar7_led_data.leds = fb_fon_leds;
526 } else if (strstr(prid, "Fritz_Box_")) {
527 ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds);
528 ar7_led_data.leds = fb_sl_leds;
529 } else if ((!strcmp(prid, "AR7RD") || !strcmp(prid, "AR7DB"))
530 && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) {
531 ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds);
532 ar7_led_data.leds = dsl502t_leds;
533 } else if (strstr(prid, "DG834")) {
534 ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds);
535 ar7_led_data.leds = dg834g_leds;
238dd317
FF
536 } else if (strstr(prid, "CYWM") || strstr(prid, "CYWL")) {
537 ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
538 ar7_led_data.leds = titan_leds;
f77138e8
FF
539 } else if (strstr(prid, "GT701")) {
540 ar7_led_data.num_leds = ARRAY_SIZE(gt701_leds);
541 ar7_led_data.leds = gt701_leds;
7ca5dc14
FF
542 }
543}
544
4d1da8c2
AC
545/*****************************************************************************
546 * Watchdog
547 ****************************************************************************/
548static struct resource ar7_wdt_res = {
549 .name = "regs",
550 .flags = IORESOURCE_MEM,
551 .start = -1, /* Filled at runtime */
552 .end = -1, /* Filled at runtime */
553};
554
555static struct platform_device ar7_wdt = {
556 .name = "ar7_wdt",
557 .resource = &ar7_wdt_res,
558 .num_resources = 1,
559};
560
561/*****************************************************************************
562 * Init
563 ****************************************************************************/
7084338e 564static int __init ar7_register_uarts(void)
7ca5dc14 565{
50ca9619 566#ifdef CONFIG_SERIAL_8250
7084338e 567 static struct uart_port uart_port __initdata;
780019dd 568 struct clk *bus_clk;
7084338e 569 int res;
7ca5dc14 570
7084338e 571 memset(&uart_port, 0, sizeof(struct uart_port));
7ca5dc14 572
780019dd
FF
573 bus_clk = clk_get(NULL, "bus");
574 if (IS_ERR(bus_clk))
ab75dc02 575 panic("unable to get bus clk");
780019dd 576
154615d5 577 uart_port.type = PORT_AR7;
7084338e
AC
578 uart_port.uartclk = clk_get_rate(bus_clk) / 2;
579 uart_port.iotype = UPIO_MEM32;
580 uart_port.regshift = 2;
581
582 uart_port.line = 0;
583 uart_port.irq = AR7_IRQ_UART0;
584 uart_port.mapbase = AR7_REGS_UART0;
585 uart_port.membase = ioremap(uart_port.mapbase, 256);
586
587 res = early_serial_setup(&uart_port);
7ca5dc14
FF
588 if (res)
589 return res;
590
7ca5dc14
FF
591 /* Only TNETD73xx have a second serial port */
592 if (ar7_has_second_uart()) {
7084338e
AC
593 uart_port.line = 1;
594 uart_port.irq = AR7_IRQ_UART1;
595 uart_port.mapbase = UR8_REGS_UART1;
596 uart_port.membase = ioremap(uart_port.mapbase, 256);
597
598 res = early_serial_setup(&uart_port);
7ca5dc14
FF
599 if (res)
600 return res;
601 }
7084338e
AC
602#endif
603
604 return 0;
605}
606
238dd317
FF
607static void __init titan_fixup_devices(void)
608{
609 /* Set vlynq0 data */
610 vlynq_low_data.reset_bit = 15;
611 vlynq_low_data.gpio_bit = 14;
612
613 /* Set vlynq1 data */
614 vlynq_high_data.reset_bit = 16;
615 vlynq_high_data.gpio_bit = 7;
616
617 /* Set vlynq0 resources */
618 vlynq_low_res[0].start = TITAN_REGS_VLYNQ0;
619 vlynq_low_res[0].end = TITAN_REGS_VLYNQ0 + 0xff;
620 vlynq_low_res[1].start = 33;
621 vlynq_low_res[1].end = 33;
622 vlynq_low_res[2].start = 0x0c000000;
623 vlynq_low_res[2].end = 0x0fffffff;
624 vlynq_low_res[3].start = 80;
625 vlynq_low_res[3].end = 111;
626
627 /* Set vlynq1 resources */
628 vlynq_high_res[0].start = TITAN_REGS_VLYNQ1;
629 vlynq_high_res[0].end = TITAN_REGS_VLYNQ1 + 0xff;
630 vlynq_high_res[1].start = 34;
631 vlynq_high_res[1].end = 34;
632 vlynq_high_res[2].start = 0x40000000;
633 vlynq_high_res[2].end = 0x43ffffff;
634 vlynq_high_res[3].start = 112;
635 vlynq_high_res[3].end = 143;
636
637 /* Set cpmac0 data */
638 cpmac_low_data.phy_mask = 0x40000000;
639
640 /* Set cpmac1 data */
641 cpmac_high_data.phy_mask = 0x80000000;
642
643 /* Set cpmac0 resources */
644 cpmac_low_res[0].start = TITAN_REGS_MAC0;
645 cpmac_low_res[0].end = TITAN_REGS_MAC0 + 0x7ff;
646
647 /* Set cpmac1 resources */
648 cpmac_high_res[0].start = TITAN_REGS_MAC1;
649 cpmac_high_res[0].end = TITAN_REGS_MAC1 + 0x7ff;
650}
651
7084338e
AC
652static int __init ar7_register_devices(void)
653{
654 void __iomem *bootcr;
655 u32 val;
7084338e
AC
656 int res;
657
658 res = ar7_register_uarts();
659 if (res)
660 pr_err("unable to setup uart(s): %d\n", res);
661
7ca5dc14
FF
662 res = platform_device_register(&physmap_flash);
663 if (res)
7178d2cd 664 pr_warn("unable to register physmap-flash: %d\n", res);
7ca5dc14 665
238dd317
FF
666 if (ar7_is_titan())
667 titan_fixup_devices();
668
7ca5dc14
FF
669 ar7_device_disable(vlynq_low_data.reset_bit);
670 res = platform_device_register(&vlynq_low);
671 if (res)
7178d2cd 672 pr_warn("unable to register vlynq-low: %d\n", res);
7ca5dc14
FF
673
674 if (ar7_has_high_vlynq()) {
675 ar7_device_disable(vlynq_high_data.reset_bit);
676 res = platform_device_register(&vlynq_high);
677 if (res)
7178d2cd 678 pr_warn("unable to register vlynq-high: %d\n", res);
7ca5dc14
FF
679 }
680
681 if (ar7_has_high_cpmac()) {
727c0075 682 res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
7084338e
AC
683 if (!res) {
684 cpmac_get_mac(1, cpmac_high_data.dev_addr);
685
686 res = platform_device_register(&cpmac_high);
687 if (res)
7178d2cd
JP
688 pr_warn("unable to register cpmac-high: %d\n",
689 res);
7084338e 690 } else
7178d2cd 691 pr_warn("unable to add cpmac-high phy: %d\n", res);
7084338e 692 } else
7ca5dc14 693 cpmac_low_data.phy_mask = 0xffffffff;
7ca5dc14 694
1e2c8d83 695 res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
7084338e
AC
696 if (!res) {
697 cpmac_get_mac(0, cpmac_low_data.dev_addr);
698 res = platform_device_register(&cpmac_low);
699 if (res)
7178d2cd 700 pr_warn("unable to register cpmac-low: %d\n", res);
7084338e 701 } else
7178d2cd 702 pr_warn("unable to add cpmac-low phy: %d\n", res);
7ca5dc14
FF
703
704 detect_leds();
705 res = platform_device_register(&ar7_gpio_leds);
706 if (res)
7178d2cd 707 pr_warn("unable to register leds: %d\n", res);
7ca5dc14
FF
708
709 res = platform_device_register(&ar7_udc);
7084338e 710 if (res)
7178d2cd 711 pr_warn("unable to register usb slave: %d\n", res);
72838a17
FF
712
713 /* Register watchdog only if enabled in hardware */
7084338e
AC
714 bootcr = ioremap_nocache(AR7_REGS_DCL, 4);
715 val = readl(bootcr);
716 iounmap(bootcr);
717 if (val & AR7_WDT_HW_ENA) {
9c1b013a 718 if (ar7_has_high_vlynq())
7084338e 719 ar7_wdt_res.start = UR8_REGS_WDT;
9c1b013a
FF
720 else
721 ar7_wdt_res.start = AR7_REGS_WDT;
7084338e
AC
722
723 ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
72838a17 724 res = platform_device_register(&ar7_wdt);
7084338e 725 if (res)
7178d2cd 726 pr_warn("unable to register watchdog: %d\n", res);
7084338e 727 }
d47fbb59 728
7084338e 729 return 0;
7ca5dc14 730}
142a2cee 731device_initcall(ar7_register_devices);