[linux-2.6-block.git] / arch / mips / alchemy / common / platform.c

/*
 * Platform device support for Au1x00 SoCs.
 *
 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
 *
 * (C) Copyright Embedded Alley Solutions, Inc 2005
 * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/slab.h>
#include <linux/usb/ehci_pdriver.h>
#include <linux/usb/ohci_pdriver.h>

#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1xxx_dbdma.h>
#include <asm/mach-au1x00/au1100_mmc.h>
#include <asm/mach-au1x00/au1xxx_eth.h>

#include <prom.h>

static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
			    unsigned int old_state)
{
#ifdef CONFIG_SERIAL_8250
	switch (state) {
	case 0:
		alchemy_uart_enable(CPHYSADDR(port->membase));
		serial8250_do_pm(port, state, old_state);
		break;
	case 3:		/* power off */
		serial8250_do_pm(port, state, old_state);
		alchemy_uart_disable(CPHYSADDR(port->membase));
		break;
	default:
		serial8250_do_pm(port, state, old_state);
		break;
	}
#endif
}

#define PORT(_base, _irq)					\
	{							\
		.mapbase	= _base,			\
		.irq		= _irq,				\
		.regshift	= 2,				\
		.iotype		= UPIO_AU,			\
		.flags		= UPF_SKIP_TEST | UPF_IOREMAP | \
				  UPF_FIXED_TYPE,		\
		.type		= PORT_16550A,			\
		.pm		= alchemy_8250_pm,		\
	}

static struct plat_serial8250_port au1x00_uart_data[][4] __initdata = {
	[ALCHEMY_CPU_AU1000] = {
		PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
		PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
		PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
		PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
	},
	[ALCHEMY_CPU_AU1500] = {
		PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
		PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
	},
	[ALCHEMY_CPU_AU1100] = {
		PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
		PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
		PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
	},
	[ALCHEMY_CPU_AU1550] = {
		PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT),
		PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT),
		PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT),
	},
	[ALCHEMY_CPU_AU1200] = {
		PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT),
		PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT),
	},
	[ALCHEMY_CPU_AU1300] = {
		PORT(AU1300_UART0_PHYS_ADDR, AU1300_UART0_INT),
		PORT(AU1300_UART1_PHYS_ADDR, AU1300_UART1_INT),
		PORT(AU1300_UART2_PHYS_ADDR, AU1300_UART2_INT),
		PORT(AU1300_UART3_PHYS_ADDR, AU1300_UART3_INT),
	},
};

static struct platform_device au1xx0_uart_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_AU1X00,
};

static void __init alchemy_setup_uarts(int ctype)
{
	long uartclk;
	int s = sizeof(struct plat_serial8250_port);
	int c = alchemy_get_uarts(ctype);
	struct plat_serial8250_port *ports;
	struct clk *clk = clk_get(NULL, ALCHEMY_PERIPH_CLK);

	if (IS_ERR(clk))
		return;
	if (clk_prepare_enable(clk)) {
		clk_put(clk);
		return;
	}
	uartclk = clk_get_rate(clk);
	clk_put(clk);

	ports = kzalloc(s * (c + 1), GFP_KERNEL);
	if (!ports) {
		printk(KERN_INFO "Alchemy: no memory for UART data\n");
		return;
	}
	memcpy(ports, au1x00_uart_data[ctype], s * c);
	au1xx0_uart_device.dev.platform_data = ports;

	/* Fill up uartclk. */
	for (s = 0; s < c; s++)
		ports[s].uartclk = uartclk;
	if (platform_device_register(&au1xx0_uart_device))
		printk(KERN_INFO "Alchemy: failed to register UARTs\n");
}


/* The dmamask must be set for OHCI/EHCI to work */
static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32);
static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32);

/* Power on callback for the ehci platform driver */
static int alchemy_ehci_power_on(struct platform_device *pdev)
{
	return alchemy_usb_control(ALCHEMY_USB_EHCI0, 1);
}

/* Power off/suspend callback for the ehci platform driver */
static void alchemy_ehci_power_off(struct platform_device *pdev)
{
	alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
}

static struct usb_ehci_pdata alchemy_ehci_pdata = {
	.no_io_watchdog = 1,
	.power_on	= alchemy_ehci_power_on,
	.power_off	= alchemy_ehci_power_off,
	.power_suspend	= alchemy_ehci_power_off,
};

/* Power on callback for the ohci platform driver */
static int alchemy_ohci_power_on(struct platform_device *pdev)
{
	int unit;

	unit = (pdev->id == 1) ?
		ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;

	return alchemy_usb_control(unit, 1);
}

/* Power off/suspend callback for the ohci platform driver */
static void alchemy_ohci_power_off(struct platform_device *pdev)
{
	int unit;

	unit = (pdev->id == 1) ?
		ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;

	alchemy_usb_control(unit, 0);
}

static struct usb_ohci_pdata alchemy_ohci_pdata = {
	.power_on		= alchemy_ohci_power_on,
	.power_off		= alchemy_ohci_power_off,
	.power_suspend		= alchemy_ohci_power_off,
};

static unsigned long alchemy_ohci_data[][2] __initdata = {
	[ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT },
	[ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT },
	[ALCHEMY_CPU_AU1100] = { AU1000_USB_OHCI_PHYS_ADDR, AU1100_USB_HOST_INT },
	[ALCHEMY_CPU_AU1550] = { AU1550_USB_OHCI_PHYS_ADDR, AU1550_USB_HOST_INT },
	[ALCHEMY_CPU_AU1200] = { AU1200_USB_OHCI_PHYS_ADDR, AU1200_USB_INT },
	[ALCHEMY_CPU_AU1300] = { AU1300_USB_OHCI0_PHYS_ADDR, AU1300_USB_INT },
};

static unsigned long alchemy_ehci_data[][2] __initdata = {
	[ALCHEMY_CPU_AU1200] = { AU1200_USB_EHCI_PHYS_ADDR, AU1200_USB_INT },
	[ALCHEMY_CPU_AU1300] = { AU1300_USB_EHCI_PHYS_ADDR, AU1300_USB_INT },
};

static int __init _new_usbres(struct resource **r, struct platform_device **d)
{
	*r = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
	if (!*r)
		return -ENOMEM;
	*d = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
	if (!*d) {
		kfree(*r);
		return -ENOMEM;
	}

	(*d)->dev.coherent_dma_mask = DMA_BIT_MASK(32);
	(*d)->num_resources = 2;
	(*d)->resource = *r;

	return 0;
}

static void __init alchemy_setup_usb(int ctype)
{
	struct resource *res;
	struct platform_device *pdev;

	/* setup OHCI0.  Every variant has one */
	if (_new_usbres(&res, &pdev))
		return;

	res[0].start = alchemy_ohci_data[ctype][0];
	res[0].end = res[0].start + 0x100 - 1;
	res[0].flags = IORESOURCE_MEM;
	res[1].start = alchemy_ohci_data[ctype][1];
	res[1].end = res[1].start;
	res[1].flags = IORESOURCE_IRQ;
	pdev->name = "ohci-platform";
	pdev->id = 0;
	pdev->dev.dma_mask = &alchemy_ohci_dmamask;
	pdev->dev.platform_data = &alchemy_ohci_pdata;

	if (platform_device_register(pdev))
		printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n");


	/* setup EHCI0: Au1200/Au1300 */
	if ((ctype == ALCHEMY_CPU_AU1200) || (ctype == ALCHEMY_CPU_AU1300)) {
		if (_new_usbres(&res, &pdev))
			return;

		res[0].start = alchemy_ehci_data[ctype][0];
		res[0].end = res[0].start + 0x100 - 1;
		res[0].flags = IORESOURCE_MEM;
		res[1].start = alchemy_ehci_data[ctype][1];
		res[1].end = res[1].start;
		res[1].flags = IORESOURCE_IRQ;
		pdev->name = "ehci-platform";
		pdev->id = 0;
		pdev->dev.dma_mask = &alchemy_ehci_dmamask;
		pdev->dev.platform_data = &alchemy_ehci_pdata;

		if (platform_device_register(pdev))
			printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n");
	}

	/* Au1300: OHCI1 */
	if (ctype == ALCHEMY_CPU_AU1300) {
		if (_new_usbres(&res, &pdev))
			return;

		res[0].start = AU1300_USB_OHCI1_PHYS_ADDR;
		res[0].end = res[0].start + 0x100 - 1;
		res[0].flags = IORESOURCE_MEM;
		res[1].start = AU1300_USB_INT;
		res[1].end = res[1].start;
		res[1].flags = IORESOURCE_IRQ;
		pdev->name = "ohci-platform";
		pdev->id = 1;
		pdev->dev.dma_mask = &alchemy_ohci_dmamask;
		pdev->dev.platform_data = &alchemy_ohci_pdata;

		if (platform_device_register(pdev))
			printk(KERN_INFO "Alchemy USB: cannot add OHCI1\n");
	}
}

/* Macro to help defining the Ethernet MAC resources */
#define MAC_RES_COUNT	4	/* MAC regs, MAC en, MAC INT, MACDMA regs */
#define MAC_RES(_base, _enable, _irq, _macdma)		\
	{						\
		.start	= _base,			\
		.end	= _base + 0xffff,		\
		.flags	= IORESOURCE_MEM,		\
	},						\
	{						\
		.start	= _enable,			\
		.end	= _enable + 0x3,		\
		.flags	= IORESOURCE_MEM,		\
	},						\
	{						\
		.start	= _irq,				\
		.end	= _irq,				\
		.flags	= IORESOURCE_IRQ		\
	},						\
	{						\
		.start	= _macdma,			\
		.end	= _macdma + 0x1ff,		\
		.flags	= IORESOURCE_MEM,		\
	}

static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
	[ALCHEMY_CPU_AU1000] = {
		MAC_RES(AU1000_MAC0_PHYS_ADDR,
			AU1000_MACEN_PHYS_ADDR,
			AU1000_MAC0_DMA_INT,
			AU1000_MACDMA0_PHYS_ADDR)
	},
	[ALCHEMY_CPU_AU1500] = {
		MAC_RES(AU1500_MAC0_PHYS_ADDR,
			AU1500_MACEN_PHYS_ADDR,
			AU1500_MAC0_DMA_INT,
			AU1000_MACDMA0_PHYS_ADDR)
	},
	[ALCHEMY_CPU_AU1100] = {
		MAC_RES(AU1000_MAC0_PHYS_ADDR,
			AU1000_MACEN_PHYS_ADDR,
			AU1100_MAC0_DMA_INT,
			AU1000_MACDMA0_PHYS_ADDR)
	},
	[ALCHEMY_CPU_AU1550] = {
		MAC_RES(AU1000_MAC0_PHYS_ADDR,
			AU1000_MACEN_PHYS_ADDR,
			AU1550_MAC0_DMA_INT,
			AU1000_MACDMA0_PHYS_ADDR)
	},
};

static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
	.phy1_search_mac0 = 1,
};

static struct platform_device au1xxx_eth0_device = {
	.name		= "au1000-eth",
	.id		= 0,
	.num_resources	= MAC_RES_COUNT,
	.dev.platform_data = &au1xxx_eth0_platform_data,
};

static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
	[ALCHEMY_CPU_AU1000] = {
		MAC_RES(AU1000_MAC1_PHYS_ADDR,
			AU1000_MACEN_PHYS_ADDR + 4,
			AU1000_MAC1_DMA_INT,
			AU1000_MACDMA1_PHYS_ADDR)
	},
	[ALCHEMY_CPU_AU1500] = {
		MAC_RES(AU1500_MAC1_PHYS_ADDR,
			AU1500_MACEN_PHYS_ADDR + 4,
			AU1500_MAC1_DMA_INT,
			AU1000_MACDMA1_PHYS_ADDR)
	},
	[ALCHEMY_CPU_AU1550] = {
		MAC_RES(AU1000_MAC1_PHYS_ADDR,
			AU1000_MACEN_PHYS_ADDR + 4,
			AU1550_MAC1_DMA_INT,
			AU1000_MACDMA1_PHYS_ADDR)
	},
};

static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
	.phy1_search_mac0 = 1,
};

static struct platform_device au1xxx_eth1_device = {
	.name		= "au1000-eth",
	.id		= 1,
	.num_resources	= MAC_RES_COUNT,
	.dev.platform_data = &au1xxx_eth1_platform_data,
};

void __init au1xxx_override_eth_cfg(unsigned int port,
			struct au1000_eth_platform_data *eth_data)
{
	if (!eth_data || port > 1)
		return;

	if (port == 0)
		memcpy(&au1xxx_eth0_platform_data, eth_data,
			sizeof(struct au1000_eth_platform_data));
	else
		memcpy(&au1xxx_eth1_platform_data, eth_data,
			sizeof(struct au1000_eth_platform_data));
}

static void __init alchemy_setup_macs(int ctype)
{
	int ret, i;
	unsigned char ethaddr[6];
	struct resource *macres;

	/* Handle 1st MAC */
	if (alchemy_get_macs(ctype) < 1)
		return;

	macres = kmemdup(au1xxx_eth0_resources[ctype],
			 sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
	if (!macres) {
		printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
		return;
	}
	au1xxx_eth0_device.resource = macres;

	i = prom_get_ethernet_addr(ethaddr);
	if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
		memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);

	ret = platform_device_register(&au1xxx_eth0_device);
	if (ret)
		printk(KERN_INFO "Alchemy: failed to register MAC0\n");


	/* Handle 2nd MAC */
	if (alchemy_get_macs(ctype) < 2)
		return;

	macres = kmemdup(au1xxx_eth1_resources[ctype],
			 sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
	if (!macres) {
		printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
		return;
	}
	au1xxx_eth1_device.resource = macres;

	ethaddr[5] += 1;	/* next addr for 2nd MAC */
	if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
		memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);

	/* Register second MAC if enabled in pinfunc */
	if (!(alchemy_rdsys(AU1000_SYS_PINFUNC) & SYS_PF_NI2)) {
		ret = platform_device_register(&au1xxx_eth1_device);
		if (ret)
			printk(KERN_INFO "Alchemy: failed to register MAC1\n");
	}
}

static int __init au1xxx_platform_init(void)
{
	int ctype = alchemy_get_cputype();

	alchemy_setup_uarts(ctype);
	alchemy_setup_macs(ctype);
	alchemy_setup_usb(ctype);

	return 0;
}

arch_initcall(au1xxx_platform_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Platform device support for Au1x00 SoCs.
	3	*
	4	* Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
	5	*
6e766458 SS	6	* (C) Copyright Embedded Alley Solutions, Inc 2005
	7	* Author: Pantelis Antoniou <pantelis@embeddedalley.com>
	8	*
1da177e4 LT	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2. This program is licensed "as is" without any
	11	* warranty of any kind, whether express or implied.
	12	*/
ce28f94c	13
5a2fb71e	14	#include <linux/clk.h>
4b62220b	15	#include <linux/dma-mapping.h>
f6673653	16	#include <linux/etherdevice.h>
40d8bc28	17	#include <linux/init.h>
d052d1be	18	#include <linux/platform_device.h>
6e766458	19	#include <linux/serial_8250.h>
40d8bc28	20	#include <linux/slab.h>
2be350fa	21	#include <linux/usb/ehci_pdriver.h>
e223a4cc	22	#include <linux/usb/ohci_pdriver.h>
1da177e4	23
50d5676e	24	#include <asm/mach-au1x00/au1000.h>
f591eb1e ML	25	#include <asm/mach-au1x00/au1xxx_dbdma.h>
f591eb1e ML	26	#include <asm/mach-au1x00/au1100_mmc.h>
66f75ccb	27	#include <asm/mach-au1x00/au1xxx_eth.h>
1da177e4	28
f6673653 ML	29	#include <prom.h>
f6673653 ML	30
7d172bfe ML	31	static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
	32	unsigned int old_state)
	33	{
cf745a39	34	#ifdef CONFIG_SERIAL_8250
7d172bfe ML	35	switch (state) {
7d172bfe ML	36	case 0:
80130204	37	alchemy_uart_enable(CPHYSADDR(port->membase));
7d172bfe ML	38	serial8250_do_pm(port, state, old_state);
	39	break;
	40	case 3: /* power off */
	41	serial8250_do_pm(port, state, old_state);
80130204	42	alchemy_uart_disable(CPHYSADDR(port->membase));
7d172bfe ML	43	break;
	44	default:
	45	serial8250_do_pm(port, state, old_state);
	46	break;
	47	}
cf745a39	48	#endif
7d172bfe ML	49	}
7d172bfe ML	50
b6e6d120 ML	51	#define PORT(_base, _irq) \
	52	{ \
	53	.mapbase = _base, \
	54	.irq = _irq, \
	55	.regshift = 2, \
	56	.iotype = UPIO_AU, \
70342287	57	.flags = UPF_SKIP_TEST \| UPF_IOREMAP \| \
63ea336b ML	58	UPF_FIXED_TYPE, \
63ea336b ML	59	.type = PORT_16550A, \
7d172bfe	60	.pm = alchemy_8250_pm, \
6e766458 SS	61	}
6e766458 SS	62
80130204 ML	63	static struct plat_serial8250_port au1x00_uart_data[][4] __initdata = {
	64	[ALCHEMY_CPU_AU1000] = {
	65	PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
	66	PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
	67	PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
	68	PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
	69	},
	70	[ALCHEMY_CPU_AU1500] = {
	71	PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
	72	PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
	73	},
	74	[ALCHEMY_CPU_AU1100] = {
	75	PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
	76	PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
	77	PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
	78	},
	79	[ALCHEMY_CPU_AU1550] = {
	80	PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT),
	81	PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT),
	82	PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT),
	83	},
	84	[ALCHEMY_CPU_AU1200] = {
	85	PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT),
	86	PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT),
	87	},
809f36c6 ML	88	[ALCHEMY_CPU_AU1300] = {
	89	PORT(AU1300_UART0_PHYS_ADDR, AU1300_UART0_INT),
	90	PORT(AU1300_UART1_PHYS_ADDR, AU1300_UART1_INT),
	91	PORT(AU1300_UART2_PHYS_ADDR, AU1300_UART2_INT),
	92	PORT(AU1300_UART3_PHYS_ADDR, AU1300_UART3_INT),
	93	},
6e766458 SS	94	};
	95
	96	static struct platform_device au1xx0_uart_device = {
	97	.name = "serial8250",
	98	.id = PLAT8250_DEV_AU1X00,
6e766458 SS	99	};
6e766458 SS	100
80130204 ML	101	static void __init alchemy_setup_uarts(int ctype)
80130204 ML	102	{
5a2fb71e	103	long uartclk;
80130204 ML	104	int s = sizeof(struct plat_serial8250_port);
	105	int c = alchemy_get_uarts(ctype);
	106	struct plat_serial8250_port *ports;
5a2fb71e ML	107	struct clk *clk = clk_get(NULL, ALCHEMY_PERIPH_CLK);
	108
	109	if (IS_ERR(clk))
	110	return;
	111	if (clk_prepare_enable(clk)) {
	112	clk_put(clk);
	113	return;
	114	}
	115	uartclk = clk_get_rate(clk);
	116	clk_put(clk);
80130204 ML	117
	118	ports = kzalloc(s * (c + 1), GFP_KERNEL);
	119	if (!ports) {
	120	printk(KERN_INFO "Alchemy: no memory for UART data\n");
	121	return;
	122	}
	123	memcpy(ports, au1x00_uart_data[ctype], s * c);
	124	au1xx0_uart_device.dev.platform_data = ports;
	125
	126	/* Fill up uartclk. */
	127	for (s = 0; s < c; s++)
	128	ports[s].uartclk = uartclk;
	129	if (platform_device_register(&au1xx0_uart_device))
	130	printk(KERN_INFO "Alchemy: failed to register UARTs\n");
	131	}
	132
1da177e4	133
b9581b84 ML	134	/* The dmamask must be set for OHCI/EHCI to work */
	135	static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32);
	136	static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32);
1da177e4	137
2be350fa FF	138	/* Power on callback for the ehci platform driver */
	139	static int alchemy_ehci_power_on(struct platform_device *pdev)
	140	{
	141	return alchemy_usb_control(ALCHEMY_USB_EHCI0, 1);
	142	}
	143
	144	/* Power off/suspend callback for the ehci platform driver */
	145	static void alchemy_ehci_power_off(struct platform_device *pdev)
	146	{
	147	alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
	148	}
	149
	150	static struct usb_ehci_pdata alchemy_ehci_pdata = {
70342287	151	.no_io_watchdog = 1,
2be350fa FF	152	.power_on = alchemy_ehci_power_on,
	153	.power_off = alchemy_ehci_power_off,
	154	.power_suspend = alchemy_ehci_power_off,
	155	};
	156
e223a4cc FF	157	/* Power on callback for the ohci platform driver */
	158	static int alchemy_ohci_power_on(struct platform_device *pdev)
	159	{
	160	int unit;
	161
	162	unit = (pdev->id == 1) ?
	163	ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
	164
	165	return alchemy_usb_control(unit, 1);
	166	}
	167
	168	/* Power off/suspend callback for the ohci platform driver */
	169	static void alchemy_ohci_power_off(struct platform_device *pdev)
	170	{
	171	int unit;
	172
	173	unit = (pdev->id == 1) ?
	174	ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
	175
	176	alchemy_usb_control(unit, 0);
	177	}
	178
	179	static struct usb_ohci_pdata alchemy_ohci_pdata = {
	180	.power_on = alchemy_ohci_power_on,
	181	.power_off = alchemy_ohci_power_off,
	182	.power_suspend = alchemy_ohci_power_off,
	183	};
	184
b9581b84 ML	185	static unsigned long alchemy_ohci_data[][2] __initdata = {
	186	[ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT },
	187	[ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT },
	188	[ALCHEMY_CPU_AU1100] = { AU1000_USB_OHCI_PHYS_ADDR, AU1100_USB_HOST_INT },
	189	[ALCHEMY_CPU_AU1550] = { AU1550_USB_OHCI_PHYS_ADDR, AU1550_USB_HOST_INT },
	190	[ALCHEMY_CPU_AU1200] = { AU1200_USB_OHCI_PHYS_ADDR, AU1200_USB_INT },
809f36c6	191	[ALCHEMY_CPU_AU1300] = { AU1300_USB_OHCI0_PHYS_ADDR, AU1300_USB_INT },
b9581b84 ML	192	};
	193
	194	static unsigned long alchemy_ehci_data[][2] __initdata = {
	195	[ALCHEMY_CPU_AU1200] = { AU1200_USB_EHCI_PHYS_ADDR, AU1200_USB_INT },
809f36c6	196	[ALCHEMY_CPU_AU1300] = { AU1300_USB_EHCI_PHYS_ADDR, AU1300_USB_INT },
1da177e4 LT	197	};
1da177e4 LT	198
b9581b84 ML	199	static int __init _new_usbres(struct resource r, struct platform_device d)
	200	{
	201	r = kzalloc(sizeof(struct resource) 2, GFP_KERNEL);
	202	if (!*r)
	203	return -ENOMEM;
	204	*d = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
	205	if (!*d) {
	206	kfree(*r);
	207	return -ENOMEM;
	208	}
	209
	210	(*d)->dev.coherent_dma_mask = DMA_BIT_MASK(32);
	211	(*d)->num_resources = 2;
	212	(d)->resource = r;
	213
	214	return 0;
	215	}
	216
	217	static void __init alchemy_setup_usb(int ctype)
	218	{
	219	struct resource *res;
	220	struct platform_device *pdev;
	221
	222	/* setup OHCI0. Every variant has one */
	223	if (_new_usbres(&res, &pdev))
	224	return;
	225
	226	res[0].start = alchemy_ohci_data[ctype][0];
	227	res[0].end = res[0].start + 0x100 - 1;
	228	res[0].flags = IORESOURCE_MEM;
	229	res[1].start = alchemy_ohci_data[ctype][1];
	230	res[1].end = res[1].start;
	231	res[1].flags = IORESOURCE_IRQ;
e223a4cc	232	pdev->name = "ohci-platform";
b9581b84 ML	233	pdev->id = 0;
b9581b84 ML	234	pdev->dev.dma_mask = &alchemy_ohci_dmamask;
e223a4cc	235	pdev->dev.platform_data = &alchemy_ohci_pdata;
b9581b84 ML	236
	237	if (platform_device_register(pdev))
	238	printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n");
	239
	240
809f36c6 ML	241	/* setup EHCI0: Au1200/Au1300 */
809f36c6 ML	242	if ((ctype == ALCHEMY_CPU_AU1200) \|\| (ctype == ALCHEMY_CPU_AU1300)) {
b9581b84 ML	243	if (_new_usbres(&res, &pdev))
	244	return;
	245
	246	res[0].start = alchemy_ehci_data[ctype][0];
	247	res[0].end = res[0].start + 0x100 - 1;
	248	res[0].flags = IORESOURCE_MEM;
	249	res[1].start = alchemy_ehci_data[ctype][1];
	250	res[1].end = res[1].start;
	251	res[1].flags = IORESOURCE_IRQ;
2be350fa	252	pdev->name = "ehci-platform";
b9581b84 ML	253	pdev->id = 0;
b9581b84 ML	254	pdev->dev.dma_mask = &alchemy_ehci_dmamask;
2be350fa	255	pdev->dev.platform_data = &alchemy_ehci_pdata;
b9581b84 ML	256
	257	if (platform_device_register(pdev))
	258	printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n");
	259	}
809f36c6 ML	260
	261	/* Au1300: OHCI1 */
	262	if (ctype == ALCHEMY_CPU_AU1300) {
	263	if (_new_usbres(&res, &pdev))
	264	return;
	265
	266	res[0].start = AU1300_USB_OHCI1_PHYS_ADDR;
	267	res[0].end = res[0].start + 0x100 - 1;
	268	res[0].flags = IORESOURCE_MEM;
	269	res[1].start = AU1300_USB_INT;
	270	res[1].end = res[1].start;
	271	res[1].flags = IORESOURCE_IRQ;
e223a4cc	272	pdev->name = "ohci-platform";
809f36c6 ML	273	pdev->id = 1;
809f36c6 ML	274	pdev->dev.dma_mask = &alchemy_ohci_dmamask;
e223a4cc	275	pdev->dev.platform_data = &alchemy_ohci_pdata;
809f36c6 ML	276
	277	if (platform_device_register(pdev))
	278	printk(KERN_INFO "Alchemy USB: cannot add OHCI1\n");
	279	}
b9581b84 ML	280	}
b9581b84 ML	281
66f75ccb	282	/* Macro to help defining the Ethernet MAC resources */
553737aa ML	283	#define MAC_RES_COUNT 4 /* MAC regs, MAC en, MAC INT, MACDMA regs */
553737aa ML	284	#define MAC_RES(_base, _enable, _irq, _macdma) \
66f75ccb	285	{ \
40d8bc28 ML	286	.start = _base, \
40d8bc28 ML	287	.end = _base + 0xffff, \
66f75ccb FF	288	.flags = IORESOURCE_MEM, \
	289	}, \
	290	{ \
40d8bc28 ML	291	.start = _enable, \
40d8bc28 ML	292	.end = _enable + 0x3, \
66f75ccb FF	293	.flags = IORESOURCE_MEM, \
	294	}, \
	295	{ \
	296	.start = _irq, \
	297	.end = _irq, \
	298	.flags = IORESOURCE_IRQ \
553737aa ML	299	}, \
	300	{ \
	301	.start = _macdma, \
	302	.end = _macdma + 0x1ff, \
	303	.flags = IORESOURCE_MEM, \
66f75ccb FF	304	}
66f75ccb FF	305
40d8bc28 ML	306	static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
	307	[ALCHEMY_CPU_AU1000] = {
	308	MAC_RES(AU1000_MAC0_PHYS_ADDR,
	309	AU1000_MACEN_PHYS_ADDR,
553737aa ML	310	AU1000_MAC0_DMA_INT,
553737aa ML	311	AU1000_MACDMA0_PHYS_ADDR)
40d8bc28 ML	312	},
	313	[ALCHEMY_CPU_AU1500] = {
	314	MAC_RES(AU1500_MAC0_PHYS_ADDR,
	315	AU1500_MACEN_PHYS_ADDR,
553737aa ML	316	AU1500_MAC0_DMA_INT,
553737aa ML	317	AU1000_MACDMA0_PHYS_ADDR)
40d8bc28 ML	318	},
	319	[ALCHEMY_CPU_AU1100] = {
	320	MAC_RES(AU1000_MAC0_PHYS_ADDR,
	321	AU1000_MACEN_PHYS_ADDR,
553737aa ML	322	AU1100_MAC0_DMA_INT,
553737aa ML	323	AU1000_MACDMA0_PHYS_ADDR)
40d8bc28 ML	324	},
	325	[ALCHEMY_CPU_AU1550] = {
	326	MAC_RES(AU1000_MAC0_PHYS_ADDR,
	327	AU1000_MACEN_PHYS_ADDR,
553737aa ML	328	AU1550_MAC0_DMA_INT,
553737aa ML	329	AU1000_MACDMA0_PHYS_ADDR)
40d8bc28	330	},
66f75ccb FF	331	};
66f75ccb FF	332
66f75ccb FF	333	static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
	334	.phy1_search_mac0 = 1,
	335	};
	336
	337	static struct platform_device au1xxx_eth0_device = {
	338	.name = "au1000-eth",
	339	.id = 0,
40d8bc28	340	.num_resources = MAC_RES_COUNT,
66f75ccb FF	341	.dev.platform_data = &au1xxx_eth0_platform_data,
	342	};
	343
40d8bc28 ML	344	static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
	345	[ALCHEMY_CPU_AU1000] = {
	346	MAC_RES(AU1000_MAC1_PHYS_ADDR,
	347	AU1000_MACEN_PHYS_ADDR + 4,
553737aa ML	348	AU1000_MAC1_DMA_INT,
553737aa ML	349	AU1000_MACDMA1_PHYS_ADDR)
40d8bc28 ML	350	},
	351	[ALCHEMY_CPU_AU1500] = {
	352	MAC_RES(AU1500_MAC1_PHYS_ADDR,
	353	AU1500_MACEN_PHYS_ADDR + 4,
553737aa ML	354	AU1500_MAC1_DMA_INT,
553737aa ML	355	AU1000_MACDMA1_PHYS_ADDR)
40d8bc28 ML	356	},
	357	[ALCHEMY_CPU_AU1550] = {
	358	MAC_RES(AU1000_MAC1_PHYS_ADDR,
	359	AU1000_MACEN_PHYS_ADDR + 4,
553737aa ML	360	AU1550_MAC1_DMA_INT,
553737aa ML	361	AU1000_MACDMA1_PHYS_ADDR)
40d8bc28	362	},
acc4d245 ML	363	};
acc4d245 ML	364
66f75ccb FF	365	static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
	366	.phy1_search_mac0 = 1,
	367	};
	368
	369	static struct platform_device au1xxx_eth1_device = {
	370	.name = "au1000-eth",
	371	.id = 1,
40d8bc28	372	.num_resources = MAC_RES_COUNT,
66f75ccb FF	373	.dev.platform_data = &au1xxx_eth1_platform_data,
66f75ccb FF	374	};
66f75ccb FF	375
	376	void __init au1xxx_override_eth_cfg(unsigned int port,
	377	struct au1000_eth_platform_data *eth_data)
	378	{
	379	if (!eth_data \|\| port > 1)
	380	return;
	381
	382	if (port == 0)
	383	memcpy(&au1xxx_eth0_platform_data, eth_data,
	384	sizeof(struct au1000_eth_platform_data));
66f75ccb FF	385	else
	386	memcpy(&au1xxx_eth1_platform_data, eth_data,
	387	sizeof(struct au1000_eth_platform_data));
40d8bc28 ML	388	}
	389
	390	static void __init alchemy_setup_macs(int ctype)
	391	{
	392	int ret, i;
	393	unsigned char ethaddr[6];
	394	struct resource *macres;
	395
	396	/* Handle 1st MAC */
	397	if (alchemy_get_macs(ctype) < 1)
	398	return;
	399
a6196bab TM	400	macres = kmemdup(au1xxx_eth0_resources[ctype],
a6196bab TM	401	sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
40d8bc28 ML	402	if (!macres) {
	403	printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
	404	return;
	405	}
40d8bc28 ML	406	au1xxx_eth0_device.resource = macres;
	407
	408	i = prom_get_ethernet_addr(ethaddr);
	409	if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
	410	memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
	411
	412	ret = platform_device_register(&au1xxx_eth0_device);
c78c4882	413	if (ret)
40d8bc28 ML	414	printk(KERN_INFO "Alchemy: failed to register MAC0\n");
	415
	416
	417	/* Handle 2nd MAC */
	418	if (alchemy_get_macs(ctype) < 2)
	419	return;
	420
a6196bab TM	421	macres = kmemdup(au1xxx_eth1_resources[ctype],
a6196bab TM	422	sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
40d8bc28 ML	423	if (!macres) {
	424	printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
	425	return;
	426	}
40d8bc28 ML	427	au1xxx_eth1_device.resource = macres;
	428
	429	ethaddr[5] += 1; /* next addr for 2nd MAC */
	430	if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
	431	memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
	432
	433	/* Register second MAC if enabled in pinfunc */
1d09de7d	434	if (!(alchemy_rdsys(AU1000_SYS_PINFUNC) & SYS_PF_NI2)) {
40d8bc28 ML	435	ret = platform_device_register(&au1xxx_eth1_device);
	436	if (ret)
	437	printk(KERN_INFO "Alchemy: failed to register MAC1\n");
	438	}
66f75ccb FF	439	}
66f75ccb FF	440
c1dcb14e	441	static int __init au1xxx_platform_init(void)
1da177e4	442	{
37663860	443	int ctype = alchemy_get_cputype();
6e766458	444
80130204	445	alchemy_setup_uarts(ctype);
40d8bc28	446	alchemy_setup_macs(ctype);
b9581b84	447	alchemy_setup_usb(ctype);
f6673653	448
37663860	449	return 0;
1da177e4 LT	450	}
	451
	452	arch_initcall(au1xxx_platform_init);