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[MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.
[linux-2.6-block.git] / arch / mips / Makefile
CommitLineData
1da177e4
LT		 1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7# DECStation modifications by Paul M. Antoine, 1996
8# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
9#
10# This file is included by the global makefile so that you can add your own
11# architecture-specific flags and dependencies. Remember to do have actions
12# for "archclean" cleaning up for this architecture.
13#
14
1da177e4
LT		 15cflags-y :=
16
17#
18# Select the object file format to substitute into the linker script.
19#
20ifdef CONFIG_CPU_LITTLE_ENDIAN
2132bit-tool-prefix = mipsel-linux-
2264bit-tool-prefix = mips64el-linux-
2332bit-bfd = elf32-tradlittlemips
2464bit-bfd = elf64-tradlittlemips
2532bit-emul = elf32ltsmip
2664bit-emul = elf64ltsmip
27else
2832bit-tool-prefix = mips-linux-
2964bit-tool-prefix = mips64-linux-
3032bit-bfd = elf32-tradbigmips
3164bit-bfd = elf64-tradbigmips
3232bit-emul = elf32btsmip
3364bit-emul = elf64btsmip
34endif
35
875d43e7 36ifdef CONFIG_32BIT
1da177e4
LT		 37tool-prefix = $(32bit-tool-prefix)
38UTS_MACHINE := mips
39endif
875d43e7 40ifdef CONFIG_64BIT
1da177e4
LT		 41tool-prefix = $(64bit-tool-prefix)
42UTS_MACHINE := mips64
43endif
44
45ifdef CONFIG_CROSSCOMPILE
46CROSS_COMPILE := $(tool-prefix)
47endif
48
8145095c 49ifdef CONFIG_32BIT
1da177e4
LT		 50ld-emul = $(32bit-emul)
51vmlinux-32 = vmlinux
52vmlinux-64 = vmlinux.64
59b3e8e9
RB		 53
54cflags-y += -mabi=32
8145095c 55endif
1da177e4 56
8145095c 57ifdef CONFIG_64BIT
8145095c
RB		 58ld-emul = $(64bit-emul)
59vmlinux-32 = vmlinux.32
60vmlinux-64 = vmlinux
61
59b3e8e9
RB		 62cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64
8145095c 64cflags-y += $(call cc-option,-mno-explicit-relocs)
59b3e8e9
RB		 65else
66cflags-y += $(call cc-option,-msym32)
67endif
1da177e4
LT		 68endif
69
59b3e8e9 70
1da177e4
LT		 71#
72# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73# code since it only slows down the whole thing. At some point we might make
74# use of global pointer optimizations but their use of $28 conflicts with
75# the current pointer optimization.
76#
77# The DECStation requires an ECOFF kernel for remote booting, other MIPS
78# machines may also. Since BFD is incredibly buggy with respect to
79# crossformat linking we rely on the elf2ecoff tool for format conversion.
80#
1da177e4 81cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
6218cf44 82cflags-y += -msoft-float
9f83d839 83LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1da177e4
LT		 84MODFLAGS += -mlong-calls
85
72fbfb26
RB		 86cflags-y += -ffreestanding
87
f425a6dc
TS		 88#
89# We explicitly add the endianness specifier if needed, this allows
90# to compile kernels with a toolchain for the other endianness. We
91# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
92# when fed the toolchain default!
93#
59b3e8e9
RB		 94cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB -D__MIPSEB__)
95cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL -D__MIPSEL__)
f425a6dc 96
9007c9a2
RB		 97cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
98 -fno-omit-frame-pointer
1da177e4 99
1da177e4
LT		 100#
101# CPU-dependent compiler/assembler options for optimization.
102#
59b3e8e9
RB		 103cflags-$(CONFIG_CPU_R3000) += -march=r3000
104cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
105cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
106cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
107cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
108cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
109cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
9200c0b2 110cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 111 -Wa,-mips32 -Wa,--trap
9200c0b2 112cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 113 -Wa,-mips32r2 -Wa,--trap
9200c0b2 114cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9 115 -Wa,-mips64 -Wa,--trap
9200c0b2 116cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9
RB		 117 -Wa,-mips64r2 -Wa,--trap
118cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
c9e321e0 119cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
1da177e4 120 -Wa,--trap
c9e321e0 121cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
1da177e4 122 -Wa,--trap
59b3e8e9 123cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
1da177e4 124 -Wa,--trap
59b3e8e9 125cflags-$(CONFIG_CPU_RM9000) += $(call cc-option,-march=rm9000,-march=r5000) \
1da177e4 126 -Wa,--trap
59b3e8e9 127cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
1da177e4 128 -Wa,--trap
59b3e8e9
RB		 129cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
130cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
1da177e4
LT		 131 -Wa,--trap
132
133ifdef CONFIG_CPU_SB1
134ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
135MODFLAGS += -msb1-pass1-workarounds
136endif
137endif
138
139#
140# Firmware support
141#
142libs-$(CONFIG_ARC) += arch/mips/arc/
143libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
144
145#
146# Board-dependent options and extra files
147#
148
149#
150# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
151#
152core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
153cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
154load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
155
156#
157# Common Alchemy Au1x00 stuff
158#
159core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
160cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
161
162#
163# AMD Alchemy Pb1000 eval board
164#
165libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
166cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
167load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
168
169#
170# AMD Alchemy Pb1100 eval board
171#
172libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
173cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
174load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
175
176#
177# AMD Alchemy Pb1500 eval board
178#
179libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
180cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
181load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
182
183#
184# AMD Alchemy Pb1550 eval board
185#
186libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
187cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
188load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
189
e3ad1c23
PP		 190#
191# AMD Alchemy Pb1200 eval board
192#
193libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
194cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
195load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
196
1da177e4
LT		 197#
198# AMD Alchemy Db1000 eval board
199#
200libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
201cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
202load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
203
204#
205# AMD Alchemy Db1100 eval board
206#
207libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
208cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
209load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
210
211#
212# AMD Alchemy Db1500 eval board
213#
214libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
215cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
216load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
217
218#
219# AMD Alchemy Db1550 eval board
220#
221libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
222cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
223load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
224
e3ad1c23
PP		 225#
226# AMD Alchemy Db1200 eval board
227#
228libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
229cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
230load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
231
1da177e4
LT		 232#
233# AMD Alchemy Bosporus eval board
234#
235libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
236cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
237load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
238
239#
240# AMD Alchemy Mirage eval board
241#
242libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
243cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
244load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
245
246#
247# 4G-Systems eval board
248#
249libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
250load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
251
252#
253# MyCable eval board
254#
255libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
256load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
257
258#
259# Cobalt Server
260#
261core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
11ed6d5b 262cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1da177e4
LT		 263load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
264
265#
266# DECstation family
267#
268core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
269cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
270libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
271load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
272CLEAN_FILES += drivers/tc/lk201-map.c
273
274#
275# Galileo EV64120 Board
276#
277core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
278core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
279cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
280load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
281
282#
283# Galileo EV96100 Board
284#
285core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
286cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
287load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
288
a240a469
MZ		 289#
290# Wind River PPMC Board (4KC + GT64120)
291#
292core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
293cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
294load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
295
1da177e4
LT		 296#
297# Globespan IVR eval board with QED 5231 CPU
298#
299core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
300core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
301load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
302
303#
304# ITE 8172 eval board with QED 5231 CPU
305#
306core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
307load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
308
309#
310# For all MIPS, Inc. eval boards
311#
312core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
313
314#
315# MIPS Atlas board
316#
317core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
318cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
319cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
320load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
321
322#
323# MIPS Malta board
324#
325core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
326cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
327load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
328
329#
330# MIPS SEAD board
331#
332core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
333load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
334
c78cbf49
RB		 335#
336# MIPS SIM
337#
338core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
339cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
340load-$(CONFIG_MIPS_SIM) += 0x80100000
341
1da177e4
LT		 342#
343# Momentum Ocelot board
344#
345# The Ocelot setup.o must be linked early - it does the ioremap() for the
346# mips_io_port_base.
347#
348core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
349 arch/mips/gt64120/momenco_ocelot/
350cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
351load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
352
353#
354# Momentum Ocelot-G board
355#
356# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
357# mips_io_port_base.
358#
359core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
360load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
361
362#
363# Momentum Ocelot-C and -CS boards
364#
365# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
366# mips_io_port_base.
367core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
368load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
369
370#
371# PMC-Sierra Yosemite
372#
373core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
374cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
375load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
376
07119621
RB		 377# Qemu simulating MIPS32 4Kc
378#
379core-$(CONFIG_QEMU) += arch/mips/qemu/
380cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
381load-$(CONFIG_QEMU) += 0xffffffff80010000
382
1da177e4
LT		 383#
384# Momentum Ocelot-3
385#
386core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
387cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
388load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
389
390#
391# Momentum Jaguar ATX
392#
393core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
394cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
395#ifdef CONFIG_JAGUAR_DMALOW
396#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
397#else
398load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
399#endif
400
401#
402# NEC DDB
403#
404core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
405
1da177e4
LT		 406#
407# NEC DDB Vrc-5477
408#
409core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
410load-$(CONFIG_DDB5477) += 0xffffffff80100000
411
412core-$(CONFIG_LASAT) += arch/mips/lasat/
413cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
414load-$(CONFIG_LASAT) += 0xffffffff80000000
415
1da177e4
LT		 416#
417# Common VR41xx
418#
419core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
420cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
421
422#
423# NEC VR4133
424#
425core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
426load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
427
428#
429# ZAO Networks Capcella (VR4131)
430#
1da177e4
LT		 431load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
432
433#
434# Victor MP-C303/304 (VR4122)
435#
1da177e4
LT		 436load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
437
438#
439# IBM WorkPad z50 (VR4121)
440#
441core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
442load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
443
444#
445# CASIO CASSIPEIA E-55/65 (VR4111)
446#
447core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
448load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
449
450#
63b799f9 451# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
1da177e4 452#
63b799f9 453load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
1da177e4 454
bdf21b18
PP		 455#
456# Common Philips PNX8550
457#
458core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
459cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
460
461#
462# Philips PNX8550 JBS board
463#
464libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
465#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
466load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
467
1da177e4
LT		 468#
469# SGI IP22 (Indy/Indigo2)
470#
471# Set the load address to >= 0xffffffff88069000 if you want to leave space for
472# symmon, 0xffffffff80002000 for production kernels. Note that the value must
473# be aligned to a multiple of the kernel stack size or the handling of the
474# current variable will break so for 64-bit kernels we have to raise the start
475# address by 8kb.
476#
477core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
478cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
875d43e7 479ifdef CONFIG_32BIT
1da177e4
LT		 480load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
481endif
875d43e7 482ifdef CONFIG_64BIT
1da177e4
LT		 483load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
484endif
485
486#
487# SGI-IP27 (Origin200/2000)
488#
489# Set the load address to >= 0xc000000000300000 if you want to leave space for
490# symmon, 0xc00000000001c000 for production kernels. Note that the value must
491# be 16kb aligned or the handling of the current variable will break.
492#
493ifdef CONFIG_SGI_IP27
494core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
495cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
1da177e4
LT		 496ifdef CONFIG_MAPPED_KERNEL
497load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
498OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
499dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
500else
501load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
502OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
503endif
1da177e4
LT		 504endif
505
506#
507# SGI-IP32 (O2)
508#
509# Set the load address to >= 80069000 if you want to leave space for symmon,
510# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
511# a multiple of the kernel stack size or the handling of the current variable
512# will break.
513#
514core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
515cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
516load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
517
518#
519# Sibyte SB1250 SOC
520#
521# This is a LIB so that it links at the end, and initcalls are later
522# the sequence; but it is built as an object so that modules don't get
523# removed (as happens, even if they have __initcall/module_init)
524#
525core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
f137e463
AI		 526cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
527 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
1da177e4
LT		 528
529core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
f137e463
AI		 530cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
531 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
532
533core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
534cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
535 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
536
537core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
538cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
539 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
1da177e4
LT		 540
541#
542# Sibyte BCM91120x (Carmel) board
543# Sibyte BCM91120C (CRhine) board
544# Sibyte BCM91125C (CRhone) board
545# Sibyte BCM91125E (Rhone) board
546# Sibyte SWARM board
9a6dcea1 547# Sibyte BCM91x80 (BigSur) board
1da177e4
LT		 548#
549libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
550load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
551libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
552load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
553libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
554load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
555libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
556load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
557libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
558load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
559libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
560load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
9a6dcea1
AI		 561libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
562load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
1da177e4
LT		 563
564#
565# SNI RM200 PCI
566#
567core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
568cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
569load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
570
571#
572# Toshiba JMR-TX3927 board
573#
574core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
575 arch/mips/jmr3927/common/
5135b0cd 576cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
1da177e4
LT		 577load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
578
579#
580# Toshiba RBTX4927 board or
581# Toshiba RBTX4937 board
582#
583core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
584core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
585load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
586
23fbee9d
RB		 587#
588# Toshiba RBTX4938 board
589#
590core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
591core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
592load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
593
1da177e4
LT		 594cflags-y += -Iinclude/asm-mips/mach-generic
595drivers-$(CONFIG_PCI) += arch/mips/pci/
596
875d43e7 597ifdef CONFIG_32BIT
1da177e4
LT		 598ifdef CONFIG_CPU_LITTLE_ENDIAN
599JIFFIES = jiffies_64
600else
601JIFFIES = jiffies_64 + 4
602endif
603else
604JIFFIES = jiffies_64
605endif
606
607AFLAGS += $(cflags-y)
608CFLAGS += $(cflags-y)
609
610LDFLAGS += -m $(ld-emul)
611
59b3e8e9
RB		 612ifdef CONFIG_MIPS
613CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \
614 egrep -vw '__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \
2a2c3e45
AN		 615 sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/")
616ifdef CONFIG_64BIT
617CHECKFLAGS += -m64
618endif
59b3e8e9
RB		 619endif
620
1da177e4
LT		 621OBJCOPYFLAGS += --remove-section=.reginfo
622
623#
624# Choosing incompatible machines durings configuration will result in
625# error messages during linking. Select a default linkscript if
626# none has been choosen above.
627#
628
629CPPFLAGS_vmlinux.lds := \
630 $(CFLAGS) \
631 -D"LOADADDR=$(load-y)" \
632 -D"JIFFIES=$(JIFFIES)" \
633 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
634
635head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
636
637libs-y += arch/mips/lib/
875d43e7
RB		 638libs-$(CONFIG_32BIT) += arch/mips/lib-32/
639libs-$(CONFIG_64BIT) += arch/mips/lib-64/
1da177e4
LT		 640
641core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
642
643drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
644
645ifdef CONFIG_LASAT
646rom.bin rom.sw: vmlinux
7c6b155f 647 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
1da177e4
LT		 648endif
649
650#
651# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
652# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
653# convert to ECOFF using elf2ecoff.
654#
655vmlinux.32: vmlinux
656 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
657
658#
659# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
660# ELF files from 32-bit files by conversion.
661#
662vmlinux.64: vmlinux
663 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
664
665makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
666
667ifdef CONFIG_BOOT_ELF32
668all: $(vmlinux-32)
669endif
670
671ifdef CONFIG_BOOT_ELF64
672all: $(vmlinux-64)
673endif
674
149f60b3
RB		 675ifdef CONFIG_MIPS_ATLAS
676all: vmlinux.srec
677endif
678
679ifdef CONFIG_MIPS_MALTA
680all: vmlinux.srec
681endif
682
683ifdef CONFIG_MIPS_SEAD
684all: vmlinux.srec
685endif
686
154b500b
RB		 687ifdef CONFIG_QEMU
688all: vmlinux.bin
689endif
690
1da177e4
LT		 691ifdef CONFIG_SNI_RM200_PCI
692all: vmlinux.ecoff
693endif
694
154b500b
RB		 695vmlinux.bin: $(vmlinux-32)
696 +@$(call makeboot,$@)
697
1da177e4
LT		 698vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
699 +@$(call makeboot,$@)
700
701vmlinux.srec: $(vmlinux-32)
702 +@$(call makeboot,$@)
703
704CLEAN_FILES += vmlinux.ecoff \
705 vmlinux.srec \
706 vmlinux.rm200.tmp \
707 vmlinux.rm200
708
709archclean:
710 @$(MAKE) $(clean)=arch/mips/boot
711 @$(MAKE) $(clean)=arch/mips/lasat
712
048eb582 713CLEAN_FILES += vmlinux.32 \
1da177e4
LT		 714 vmlinux.64 \
715 vmlinux.ecoff
Linux 6.x block layer and io_uring tree(s)