Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | config MIPS |
3 | bool | |
4 | default y | |
942fa985 | 5 | select ARCH_32BIT_OFF_T if !64BIT |
ea6a3737 | 6 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
34c01e41 AL |
7 | select ARCH_HAS_FORTIFY_SOURCE |
8 | select ARCH_HAS_KCOV | |
9 | select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) | |
12597988 | 10 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
1e35918a | 11 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
8b3165e5 | 12 | select ARCH_HAS_GCOV_PROFILE_ALL |
a8c0f1c6 | 13 | select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL |
12597988 | 14 | select ARCH_SUPPORTS_UPROBES |
1ee3630a | 15 | select ARCH_USE_BUILTIN_BSWAP |
12597988 | 16 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
25da4e9d | 17 | select ARCH_USE_QUEUED_RWLOCKS |
0b17c967 | 18 | select ARCH_USE_QUEUED_SPINLOCKS |
9035bd29 | 19 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
12597988 | 20 | select ARCH_WANT_IPC_PARSE_VERSION |
d3a4e0f1 | 21 | select ARCH_WANT_LD_ORPHAN_WARN |
10916706 | 22 | select BUILDTIME_TABLE_SORT |
12597988 | 23 | select CLONE_BACKWARDS |
57eeaced | 24 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
12597988 MR |
25 | select CPU_PM if CPU_IDLE |
26 | select GENERIC_ATOMIC64 if !64BIT | |
12597988 MR |
27 | select GENERIC_CMOS_UPDATE |
28 | select GENERIC_CPU_AUTOPROBE | |
24640f23 | 29 | select GENERIC_GETTIMEOFDAY |
b962aeb0 | 30 | select GENERIC_IOMAP |
12597988 MR |
31 | select GENERIC_IRQ_PROBE |
32 | select GENERIC_IRQ_SHOW | |
6630a8e5 | 33 | select GENERIC_ISA_DMA if EISA |
740129b3 AP |
34 | select GENERIC_LIB_ASHLDI3 |
35 | select GENERIC_LIB_ASHRDI3 | |
36 | select GENERIC_LIB_CMPDI2 | |
37 | select GENERIC_LIB_LSHRDI3 | |
38 | select GENERIC_LIB_UCMPDI2 | |
12597988 MR |
39 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
40 | select GENERIC_SMP_IDLE_THREAD | |
41 | select GENERIC_TIME_VSYSCALL | |
446f062b | 42 | select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT |
12597988 | 43 | select HANDLE_DOMAIN_IRQ |
906d441f | 44 | select HAVE_ARCH_COMPILER_H |
12597988 | 45 | select HAVE_ARCH_JUMP_LABEL |
42b20995 | 46 | select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT |
109c32ff MR |
47 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
48 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT | |
490b004f | 49 | select HAVE_ARCH_SECCOMP_FILTER |
c0ff3c53 | 50 | select HAVE_ARCH_TRACEHOOK |
45e03e62 | 51 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES |
2ff2b7ec | 52 | select HAVE_ASM_MODVERSIONS |
36366e36 | 53 | select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS |
12597988 | 54 | select HAVE_CONTEXT_TRACKING |
490f561b | 55 | select HAVE_TIF_NOHZ |
12597988 MR |
56 | select HAVE_C_RECORDMCOUNT |
57 | select HAVE_DEBUG_KMEMLEAK | |
58 | select HAVE_DEBUG_STACKOVERFLOW | |
12597988 | 59 | select HAVE_DMA_CONTIGUOUS |
538f1952 | 60 | select HAVE_DYNAMIC_FTRACE |
34c01e41 | 61 | select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2 |
12597988 | 62 | select HAVE_EXIT_THREAD |
67a929e0 | 63 | select HAVE_FAST_GUP |
538f1952 | 64 | select HAVE_FTRACE_MCOUNT_RECORD |
29c5d346 | 65 | select HAVE_FUNCTION_GRAPH_TRACER |
12597988 | 66 | select HAVE_FUNCTION_TRACER |
34c01e41 AL |
67 | select HAVE_GCC_PLUGINS |
68 | select HAVE_GENERIC_VDSO | |
12597988 | 69 | select HAVE_IDE |
b3a428b4 | 70 | select HAVE_IOREMAP_PROT |
12597988 MR |
71 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
72 | select HAVE_IRQ_TIME_ACCOUNTING | |
c1bf207d DD |
73 | select HAVE_KPROBES |
74 | select HAVE_KRETPROBES | |
c0436b50 | 75 | select HAVE_LD_DEAD_CODE_DATA_ELIMINATION |
786d35d4 | 76 | select HAVE_MOD_ARCH_SPECIFIC |
42a0bb3f | 77 | select HAVE_NMI |
12597988 | 78 | select HAVE_PERF_EVENTS |
1ddc96bd TY |
79 | select HAVE_PERF_REGS |
80 | select HAVE_PERF_USER_STACK_DUMP | |
12597988 | 81 | select HAVE_REGS_AND_STACK_ACCESS_API |
9ea141ad | 82 | select HAVE_RSEQ |
16c0f03f | 83 | select HAVE_SPARSE_SYSCALL_NR |
d148eac0 | 84 | select HAVE_STACKPROTECTOR |
12597988 | 85 | select HAVE_SYSCALL_TRACEPOINTS |
a3f14310 | 86 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
12597988 | 87 | select IRQ_FORCED_THREADING |
6630a8e5 | 88 | select ISA if EISA |
12597988 | 89 | select MODULES_USE_ELF_REL if MODULES |
34c01e41 | 90 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
12597988 | 91 | select PERF_USE_VMALLOC |
981aa1d3 | 92 | select PCI_MSI_ARCH_FALLBACKS if PCI_MSI |
05a0a344 | 93 | select RTC_LIB |
5e6e9852 | 94 | select SET_FS |
d79d853d | 95 | select SYSCTL_EXCEPTION_TRACE |
12597988 | 96 | select VIRT_TO_BUS |
0bb87f05 | 97 | select ARCH_HAS_ELFCORE_COMPAT |
1da177e4 | 98 | |
d3991572 CH |
99 | config MIPS_FIXUP_BIGPHYS_ADDR |
100 | bool | |
101 | ||
c434b9f8 PC |
102 | config MIPS_GENERIC |
103 | bool | |
104 | ||
f0f4a753 PC |
105 | config MACH_INGENIC |
106 | bool | |
107 | select SYS_SUPPORTS_32BIT_KERNEL | |
108 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
109 | select SYS_SUPPORTS_ZBOOT | |
f0f4a753 PC |
110 | select DMA_NONCOHERENT |
111 | select IRQ_MIPS_CPU | |
112 | select PINCTRL | |
113 | select GPIOLIB | |
114 | select COMMON_CLK | |
115 | select GENERIC_IRQ_CHIP | |
116 | select BUILTIN_DTB if MIPS_NO_APPENDED_DTB | |
117 | select USE_OF | |
118 | select CPU_SUPPORTS_CPUFREQ | |
119 | select MIPS_EXTERNAL_TIMER | |
120 | ||
1da177e4 LT |
121 | menu "Machine selection" |
122 | ||
5e83d430 RB |
123 | choice |
124 | prompt "System type" | |
c434b9f8 | 125 | default MIPS_GENERIC_KERNEL |
1da177e4 | 126 | |
c434b9f8 | 127 | config MIPS_GENERIC_KERNEL |
eed0eabd | 128 | bool "Generic board-agnostic MIPS kernel" |
4e066441 | 129 | select ARCH_HAS_SETUP_DMA_OPS |
c434b9f8 | 130 | select MIPS_GENERIC |
eed0eabd PB |
131 | select BOOT_RAW |
132 | select BUILTIN_DTB | |
133 | select CEVT_R4K | |
134 | select CLKSRC_MIPS_GIC | |
135 | select COMMON_CLK | |
eed0eabd | 136 | select CPU_MIPSR2_IRQ_EI |
34c01e41 | 137 | select CPU_MIPSR2_IRQ_VI |
eed0eabd | 138 | select CSRC_R4K |
4e066441 | 139 | select DMA_NONCOHERENT |
eb01d42a | 140 | select HAVE_PCI |
eed0eabd | 141 | select IRQ_MIPS_CPU |
0211d49e | 142 | select MIPS_AUTO_PFN_OFFSET |
eed0eabd PB |
143 | select MIPS_CPU_SCACHE |
144 | select MIPS_GIC | |
145 | select MIPS_L1_CACHE_SHIFT_7 | |
146 | select NO_EXCEPT_FILL | |
147 | select PCI_DRIVERS_GENERIC | |
eed0eabd | 148 | select SMP_UP if SMP |
a3078e59 | 149 | select SWAP_IO_SPACE |
eed0eabd PB |
150 | select SYS_HAS_CPU_MIPS32_R1 |
151 | select SYS_HAS_CPU_MIPS32_R2 | |
152 | select SYS_HAS_CPU_MIPS32_R6 | |
153 | select SYS_HAS_CPU_MIPS64_R1 | |
154 | select SYS_HAS_CPU_MIPS64_R2 | |
155 | select SYS_HAS_CPU_MIPS64_R6 | |
156 | select SYS_SUPPORTS_32BIT_KERNEL | |
157 | select SYS_SUPPORTS_64BIT_KERNEL | |
158 | select SYS_SUPPORTS_BIG_ENDIAN | |
159 | select SYS_SUPPORTS_HIGHMEM | |
160 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
161 | select SYS_SUPPORTS_MICROMIPS | |
eed0eabd | 162 | select SYS_SUPPORTS_MIPS16 |
34c01e41 | 163 | select SYS_SUPPORTS_MIPS_CPS |
eed0eabd PB |
164 | select SYS_SUPPORTS_MULTITHREADING |
165 | select SYS_SUPPORTS_RELOCATABLE | |
166 | select SYS_SUPPORTS_SMARTMIPS | |
c3e2ee65 | 167 | select SYS_SUPPORTS_ZBOOT |
34c01e41 | 168 | select UHI_BOOT |
2e6522c5 CL |
169 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
170 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
171 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
172 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
173 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
174 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
eed0eabd PB |
175 | select USE_OF |
176 | help | |
177 | Select this to build a kernel which aims to support multiple boards, | |
178 | generally using a flattened device tree passed from the bootloader | |
179 | using the boot protocol defined in the UHI (Unified Hosting | |
180 | Interface) specification. | |
181 | ||
42a4f17d | 182 | config MIPS_ALCHEMY |
c3543e25 | 183 | bool "Alchemy processor based machines" |
d4a451d5 | 184 | select PHYS_ADDR_T_64BIT |
f772cdb2 | 185 | select CEVT_R4K |
d7ea335c | 186 | select CSRC_R4K |
67e38cf2 | 187 | select IRQ_MIPS_CPU |
a86497d6 | 188 | select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is |
d3991572 | 189 | select MIPS_FIXUP_BIGPHYS_ADDR if PCI |
42a4f17d ML |
190 | select SYS_HAS_CPU_MIPS32_R1 |
191 | select SYS_SUPPORTS_32BIT_KERNEL | |
192 | select SYS_SUPPORTS_APM_EMULATION | |
d30a2b47 | 193 | select GPIOLIB |
1b93b3c3 | 194 | select SYS_SUPPORTS_ZBOOT |
47440229 | 195 | select COMMON_CLK |
1da177e4 | 196 | |
7ca5dc14 FF |
197 | config AR7 |
198 | bool "Texas Instruments AR7" | |
199 | select BOOT_ELF32 | |
200 | select DMA_NONCOHERENT | |
201 | select CEVT_R4K | |
202 | select CSRC_R4K | |
67e38cf2 | 203 | select IRQ_MIPS_CPU |
7ca5dc14 FF |
204 | select NO_EXCEPT_FILL |
205 | select SWAP_IO_SPACE | |
206 | select SYS_HAS_CPU_MIPS32_R1 | |
207 | select SYS_HAS_EARLY_PRINTK | |
208 | select SYS_SUPPORTS_32BIT_KERNEL | |
209 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 210 | select SYS_SUPPORTS_MIPS16 |
1b93b3c3 | 211 | select SYS_SUPPORTS_ZBOOT_UART16550 |
d30a2b47 | 212 | select GPIOLIB |
7ca5dc14 | 213 | select VLYNQ |
bbd7ffdb | 214 | select HAVE_LEGACY_CLK |
7ca5dc14 FF |
215 | help |
216 | Support for the Texas Instruments AR7 System-on-a-Chip | |
217 | family: TNETD7100, 7200 and 7300. | |
218 | ||
43cc739f SR |
219 | config ATH25 |
220 | bool "Atheros AR231x/AR531x SoC support" | |
221 | select CEVT_R4K | |
222 | select CSRC_R4K | |
223 | select DMA_NONCOHERENT | |
67e38cf2 | 224 | select IRQ_MIPS_CPU |
1753e74e | 225 | select IRQ_DOMAIN |
43cc739f SR |
226 | select SYS_HAS_CPU_MIPS32_R1 |
227 | select SYS_SUPPORTS_BIG_ENDIAN | |
228 | select SYS_SUPPORTS_32BIT_KERNEL | |
8aaa7278 | 229 | select SYS_HAS_EARLY_PRINTK |
43cc739f SR |
230 | help |
231 | Support for Atheros AR231x and Atheros AR531x based boards | |
232 | ||
d4a67d9d GJ |
233 | config ATH79 |
234 | bool "Atheros AR71XX/AR724X/AR913X based boards" | |
ff591a91 | 235 | select ARCH_HAS_RESET_CONTROLLER |
d4a67d9d GJ |
236 | select BOOT_RAW |
237 | select CEVT_R4K | |
238 | select CSRC_R4K | |
239 | select DMA_NONCOHERENT | |
d30a2b47 | 240 | select GPIOLIB |
a08227a2 | 241 | select PINCTRL |
411520af | 242 | select COMMON_CLK |
67e38cf2 | 243 | select IRQ_MIPS_CPU |
d4a67d9d GJ |
244 | select SYS_HAS_CPU_MIPS32_R2 |
245 | select SYS_HAS_EARLY_PRINTK | |
246 | select SYS_SUPPORTS_32BIT_KERNEL | |
247 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 248 | select SYS_SUPPORTS_MIPS16 |
b3f0a250 | 249 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
03c8c407 | 250 | select USE_OF |
53d473fc | 251 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
d4a67d9d GJ |
252 | help |
253 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. | |
254 | ||
5f2d4459 KC |
255 | config BMIPS_GENERIC |
256 | bool "Broadcom Generic BMIPS kernel" | |
29906e1a | 257 | select ARCH_HAS_RESET_CONTROLLER |
d59098a0 CH |
258 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
259 | select ARCH_HAS_PHYS_TO_DMA | |
d666cd02 KC |
260 | select BOOT_RAW |
261 | select NO_EXCEPT_FILL | |
262 | select USE_OF | |
263 | select CEVT_R4K | |
264 | select CSRC_R4K | |
265 | select SYNC_R4K | |
266 | select COMMON_CLK | |
c7c42ec2 | 267 | select BCM6345_L1_IRQ |
60b858f2 KC |
268 | select BCM7038_L1_IRQ |
269 | select BCM7120_L2_IRQ | |
270 | select BRCMSTB_L2_IRQ | |
67e38cf2 | 271 | select IRQ_MIPS_CPU |
60b858f2 | 272 | select DMA_NONCOHERENT |
d666cd02 | 273 | select SYS_SUPPORTS_32BIT_KERNEL |
60b858f2 | 274 | select SYS_SUPPORTS_LITTLE_ENDIAN |
d666cd02 KC |
275 | select SYS_SUPPORTS_BIG_ENDIAN |
276 | select SYS_SUPPORTS_HIGHMEM | |
60b858f2 KC |
277 | select SYS_HAS_CPU_BMIPS32_3300 |
278 | select SYS_HAS_CPU_BMIPS4350 | |
279 | select SYS_HAS_CPU_BMIPS4380 | |
d666cd02 KC |
280 | select SYS_HAS_CPU_BMIPS5000 |
281 | select SWAP_IO_SPACE | |
60b858f2 KC |
282 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
283 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
284 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
285 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
4dc4704c | 286 | select HARDIRQS_SW_RESEND |
d666cd02 | 287 | help |
5f2d4459 KC |
288 | Build a generic DT-based kernel image that boots on select |
289 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top | |
290 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN | |
291 | must be set appropriately for your board. | |
d666cd02 | 292 | |
1c0c13eb | 293 | config BCM47XX |
c619366e | 294 | bool "Broadcom BCM47XX based boards" |
fe08f8c2 | 295 | select BOOT_RAW |
42f77542 | 296 | select CEVT_R4K |
940f6b48 | 297 | select CSRC_R4K |
1c0c13eb | 298 | select DMA_NONCOHERENT |
eb01d42a | 299 | select HAVE_PCI |
67e38cf2 | 300 | select IRQ_MIPS_CPU |
314878d2 | 301 | select SYS_HAS_CPU_MIPS32_R1 |
dd54dedd | 302 | select NO_EXCEPT_FILL |
1c0c13eb AJ |
303 | select SYS_SUPPORTS_32BIT_KERNEL |
304 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 305 | select SYS_SUPPORTS_MIPS16 |
6507831f | 306 | select SYS_SUPPORTS_ZBOOT |
25e5fb97 | 307 | select SYS_HAS_EARLY_PRINTK |
e6086557 | 308 | select USE_GENERIC_EARLY_PRINTK_8250 |
c949c0bc RM |
309 | select GPIOLIB |
310 | select LEDS_GPIO_REGISTER | |
f6e734a8 | 311 | select BCM47XX_NVRAM |
2ab71a02 | 312 | select BCM47XX_SPROM |
dfe00495 | 313 | select BCM47XX_SSB if !BCM47XX_BCMA |
1c0c13eb | 314 | help |
371a4151 | 315 | Support for BCM47XX based boards |
1c0c13eb | 316 | |
e7300d04 MB |
317 | config BCM63XX |
318 | bool "Broadcom BCM63XX based boards" | |
ae8de61c | 319 | select BOOT_RAW |
e7300d04 MB |
320 | select CEVT_R4K |
321 | select CSRC_R4K | |
fc264022 | 322 | select SYNC_R4K |
e7300d04 | 323 | select DMA_NONCOHERENT |
67e38cf2 | 324 | select IRQ_MIPS_CPU |
e7300d04 MB |
325 | select SYS_SUPPORTS_32BIT_KERNEL |
326 | select SYS_SUPPORTS_BIG_ENDIAN | |
327 | select SYS_HAS_EARLY_PRINTK | |
328 | select SWAP_IO_SPACE | |
d30a2b47 | 329 | select GPIOLIB |
af2418be | 330 | select MIPS_L1_CACHE_SHIFT_4 |
c5af3c2d | 331 | select CLKDEV_LOOKUP |
bbd7ffdb | 332 | select HAVE_LEGACY_CLK |
e7300d04 | 333 | help |
371a4151 | 334 | Support for BCM63XX based boards |
e7300d04 | 335 | |
1da177e4 | 336 | config MIPS_COBALT |
3fa986fa | 337 | bool "Cobalt Server" |
42f77542 | 338 | select CEVT_R4K |
940f6b48 | 339 | select CSRC_R4K |
1097c6ac | 340 | select CEVT_GT641XX |
1da177e4 | 341 | select DMA_NONCOHERENT |
eb01d42a | 342 | select FORCE_PCI |
d865bea4 | 343 | select I8253 |
1da177e4 | 344 | select I8259 |
67e38cf2 | 345 | select IRQ_MIPS_CPU |
d5ab1a69 | 346 | select IRQ_GT641XX |
252161ec | 347 | select PCI_GT64XXX_PCI0 |
7cf8053b | 348 | select SYS_HAS_CPU_NEVADA |
0a22e0d4 | 349 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 350 | select SYS_SUPPORTS_32BIT_KERNEL |
0e8774b6 | 351 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 352 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e6086557 | 353 | select USE_GENERIC_EARLY_PRINTK_8250 |
1da177e4 LT |
354 | |
355 | config MACH_DECSTATION | |
3fa986fa | 356 | bool "DECstations" |
1da177e4 | 357 | select BOOT_ELF32 |
6457d9fc | 358 | select CEVT_DS1287 |
81d10bad | 359 | select CEVT_R4K if CPU_R4X00 |
4247417d | 360 | select CSRC_IOASIC |
81d10bad | 361 | select CSRC_R4K if CPU_R4X00 |
20d60d99 MR |
362 | select CPU_DADDI_WORKAROUNDS if 64BIT |
363 | select CPU_R4000_WORKAROUNDS if 64BIT | |
364 | select CPU_R4400_WORKAROUNDS if 64BIT | |
1da177e4 | 365 | select DMA_NONCOHERENT |
ce816fa8 | 366 | select NO_IOPORT_MAP |
67e38cf2 | 367 | select IRQ_MIPS_CPU |
7cf8053b RB |
368 | select SYS_HAS_CPU_R3000 |
369 | select SYS_HAS_CPU_R4X00 | |
ed5ba2fb | 370 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 371 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 372 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1723b4a3 AN |
373 | select SYS_SUPPORTS_128HZ |
374 | select SYS_SUPPORTS_256HZ | |
375 | select SYS_SUPPORTS_1024HZ | |
930beb5a | 376 | select MIPS_L1_CACHE_SHIFT_4 |
5e83d430 | 377 | help |
1da177e4 LT |
378 | This enables support for DEC's MIPS based workstations. For details |
379 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the | |
380 | DECstation porting pages on <http://decstation.unix-ag.org/>. | |
381 | ||
382 | If you have one of the following DECstation Models you definitely | |
383 | want to choose R4xx0 for the CPU Type: | |
384 | ||
9308816c RB |
385 | DECstation 5000/50 |
386 | DECstation 5000/150 | |
387 | DECstation 5000/260 | |
388 | DECsystem 5900/260 | |
1da177e4 LT |
389 | |
390 | otherwise choose R3000. | |
391 | ||
5e83d430 | 392 | config MACH_JAZZ |
3fa986fa | 393 | bool "Jazz family of machines" |
39b2d756 TB |
394 | select ARC_MEMORY |
395 | select ARC_PROMLIB | |
a211a082 | 396 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 397 | select ARCH_MIGHT_HAVE_PC_SERIO |
2f9237d4 | 398 | select DMA_OPS |
0e2794b0 RB |
399 | select FW_ARC |
400 | select FW_ARC32 | |
5e83d430 | 401 | select ARCH_MAY_HAVE_PC_FDC |
42f77542 | 402 | select CEVT_R4K |
940f6b48 | 403 | select CSRC_R4K |
e2defae5 | 404 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
5e83d430 | 405 | select GENERIC_ISA_DMA |
8a118c38 | 406 | select HAVE_PCSPKR_PLATFORM |
67e38cf2 | 407 | select IRQ_MIPS_CPU |
d865bea4 | 408 | select I8253 |
5e83d430 RB |
409 | select I8259 |
410 | select ISA | |
7cf8053b | 411 | select SYS_HAS_CPU_R4X00 |
5e83d430 | 412 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 413 | select SYS_SUPPORTS_64BIT_KERNEL |
1723b4a3 | 414 | select SYS_SUPPORTS_100HZ |
aadfe4b5 | 415 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 416 | help |
371a4151 EWI |
417 | This a family of machines based on the MIPS R4030 chipset which was |
418 | used by several vendors to build RISC/os and Windows NT workstations. | |
419 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and | |
420 | Olivetti M700-10 workstations. | |
5e83d430 | 421 | |
f0f4a753 | 422 | config MACH_INGENIC_SOC |
de361e8b | 423 | bool "Ingenic SoC based machines" |
f0f4a753 PC |
424 | select MIPS_GENERIC |
425 | select MACH_INGENIC | |
f9c9affc | 426 | select SYS_SUPPORTS_ZBOOT_UART16550 |
5ebabe59 | 427 | |
171bb2f1 JC |
428 | config LANTIQ |
429 | bool "Lantiq based platforms" | |
430 | select DMA_NONCOHERENT | |
67e38cf2 | 431 | select IRQ_MIPS_CPU |
171bb2f1 JC |
432 | select CEVT_R4K |
433 | select CSRC_R4K | |
434 | select SYS_HAS_CPU_MIPS32_R1 | |
435 | select SYS_HAS_CPU_MIPS32_R2 | |
436 | select SYS_SUPPORTS_BIG_ENDIAN | |
437 | select SYS_SUPPORTS_32BIT_KERNEL | |
377cb1b6 | 438 | select SYS_SUPPORTS_MIPS16 |
171bb2f1 | 439 | select SYS_SUPPORTS_MULTITHREADING |
f35764e7 | 440 | select SYS_SUPPORTS_VPE_LOADER |
171bb2f1 | 441 | select SYS_HAS_EARLY_PRINTK |
d30a2b47 | 442 | select GPIOLIB |
171bb2f1 JC |
443 | select SWAP_IO_SPACE |
444 | select BOOT_RAW | |
287e3f3f | 445 | select CLKDEV_LOOKUP |
bbd7ffdb | 446 | select HAVE_LEGACY_CLK |
a0392222 | 447 | select USE_OF |
3f8c50c9 JC |
448 | select PINCTRL |
449 | select PINCTRL_LANTIQ | |
c530781c JC |
450 | select ARCH_HAS_RESET_CONTROLLER |
451 | select RESET_CONTROLLER | |
171bb2f1 | 452 | |
30ad29bb | 453 | config MACH_LOONGSON32 |
caed1d1b | 454 | bool "Loongson 32-bit family of machines" |
c7e8c668 | 455 | select SYS_SUPPORTS_ZBOOT |
ade299d8 | 456 | help |
30ad29bb | 457 | This enables support for the Loongson-1 family of machines. |
85749d24 | 458 | |
30ad29bb HC |
459 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
460 | the Institute of Computing Technology (ICT), Chinese Academy of | |
461 | Sciences (CAS). | |
ade299d8 | 462 | |
71e2f4dd JY |
463 | config MACH_LOONGSON2EF |
464 | bool "Loongson-2E/F family of machines" | |
ca585cf9 KC |
465 | select SYS_SUPPORTS_ZBOOT |
466 | help | |
71e2f4dd | 467 | This enables the support of early Loongson-2E/F family of machines. |
ca585cf9 | 468 | |
71e2f4dd | 469 | config MACH_LOONGSON64 |
caed1d1b | 470 | bool "Loongson 64-bit family of machines" |
6fbde6b4 JY |
471 | select ARCH_SPARSEMEM_ENABLE |
472 | select ARCH_MIGHT_HAVE_PC_PARPORT | |
473 | select ARCH_MIGHT_HAVE_PC_SERIO | |
474 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
475 | select BOOT_ELF32 | |
476 | select BOARD_SCACHE | |
477 | select CSRC_R4K | |
478 | select CEVT_R4K | |
479 | select CPU_HAS_WB | |
480 | select FORCE_PCI | |
481 | select ISA | |
482 | select I8259 | |
483 | select IRQ_MIPS_CPU | |
7d6d2837 | 484 | select NO_EXCEPT_FILL |
5125bfee | 485 | select NR_CPUS_DEFAULT_64 |
6fbde6b4 | 486 | select USE_GENERIC_EARLY_PRINTK_8250 |
6423e59a | 487 | select PCI_DRIVERS_GENERIC |
6fbde6b4 JY |
488 | select SYS_HAS_CPU_LOONGSON64 |
489 | select SYS_HAS_EARLY_PRINTK | |
490 | select SYS_SUPPORTS_SMP | |
491 | select SYS_SUPPORTS_HOTPLUG_CPU | |
492 | select SYS_SUPPORTS_NUMA | |
493 | select SYS_SUPPORTS_64BIT_KERNEL | |
494 | select SYS_SUPPORTS_HIGHMEM | |
495 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
71e2f4dd | 496 | select SYS_SUPPORTS_ZBOOT |
a307a4ce | 497 | select SYS_SUPPORTS_RELOCATABLE |
6fbde6b4 | 498 | select ZONE_DMA32 |
87fcfa7b JY |
499 | select COMMON_CLK |
500 | select USE_OF | |
501 | select BUILTIN_DTB | |
39c1485c | 502 | select PCI_HOST_GENERIC |
71e2f4dd | 503 | help |
caed1d1b HC |
504 | This enables the support of Loongson-2/3 family of machines. |
505 | ||
506 | Loongson-2 and Loongson-3 are 64-bit general-purpose processors with | |
507 | GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E | |
508 | and Loongson-2F which will be removed), developed by the Institute | |
509 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS). | |
ca585cf9 | 510 | |
6a438309 AB |
511 | config MACH_PISTACHIO |
512 | bool "IMG Pistachio SoC based boards" | |
6a438309 AB |
513 | select BOOT_ELF32 |
514 | select BOOT_RAW | |
515 | select CEVT_R4K | |
516 | select CLKSRC_MIPS_GIC | |
517 | select COMMON_CLK | |
518 | select CSRC_R4K | |
645c7827 | 519 | select DMA_NONCOHERENT |
d30a2b47 | 520 | select GPIOLIB |
67e38cf2 | 521 | select IRQ_MIPS_CPU |
6a438309 AB |
522 | select MFD_SYSCON |
523 | select MIPS_CPU_SCACHE | |
524 | select MIPS_GIC | |
525 | select PINCTRL | |
526 | select REGULATOR | |
527 | select SYS_HAS_CPU_MIPS32_R2 | |
528 | select SYS_SUPPORTS_32BIT_KERNEL | |
529 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
530 | select SYS_SUPPORTS_MIPS_CPS | |
531 | select SYS_SUPPORTS_MULTITHREADING | |
41cc07be | 532 | select SYS_SUPPORTS_RELOCATABLE |
6a438309 | 533 | select SYS_SUPPORTS_ZBOOT |
018f62ee EG |
534 | select SYS_HAS_EARLY_PRINTK |
535 | select USE_GENERIC_EARLY_PRINTK_8250 | |
6a438309 AB |
536 | select USE_OF |
537 | help | |
538 | This enables support for the IMG Pistachio SoC platform. | |
539 | ||
1da177e4 | 540 | config MIPS_MALTA |
3fa986fa | 541 | bool "MIPS Malta board" |
61ed242d | 542 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 543 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 544 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 545 | select BOOT_ELF32 |
fa71c960 | 546 | select BOOT_RAW |
e8823d26 | 547 | select BUILTIN_DTB |
42f77542 | 548 | select CEVT_R4K |
fa5635a2 | 549 | select CLKSRC_MIPS_GIC |
42b002ab | 550 | select COMMON_CLK |
47bf2b03 | 551 | select CSRC_R4K |
a86497d6 | 552 | select DMA_NONCOHERENT |
1da177e4 | 553 | select GENERIC_ISA_DMA |
8a118c38 | 554 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 555 | select HAVE_PCI |
d865bea4 | 556 | select I8253 |
1da177e4 | 557 | select I8259 |
47bf2b03 | 558 | select IRQ_MIPS_CPU |
5e83d430 | 559 | select MIPS_BONITO64 |
9318c51a | 560 | select MIPS_CPU_SCACHE |
47bf2b03 | 561 | select MIPS_GIC |
a7ef1ead | 562 | select MIPS_L1_CACHE_SHIFT_6 |
5e83d430 | 563 | select MIPS_MSC |
47bf2b03 | 564 | select PCI_GT64XXX_PCI0 |
ecafe3e9 | 565 | select SMP_UP if SMP |
1da177e4 | 566 | select SWAP_IO_SPACE |
7cf8053b RB |
567 | select SYS_HAS_CPU_MIPS32_R1 |
568 | select SYS_HAS_CPU_MIPS32_R2 | |
bfc3c5a6 | 569 | select SYS_HAS_CPU_MIPS32_R3_5 |
c5b36783 | 570 | select SYS_HAS_CPU_MIPS32_R5 |
575509b6 | 571 | select SYS_HAS_CPU_MIPS32_R6 |
7cf8053b | 572 | select SYS_HAS_CPU_MIPS64_R1 |
5d9fbed1 | 573 | select SYS_HAS_CPU_MIPS64_R2 |
575509b6 | 574 | select SYS_HAS_CPU_MIPS64_R6 |
7cf8053b RB |
575 | select SYS_HAS_CPU_NEVADA |
576 | select SYS_HAS_CPU_RM7000 | |
ed5ba2fb YY |
577 | select SYS_SUPPORTS_32BIT_KERNEL |
578 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 579 | select SYS_SUPPORTS_BIG_ENDIAN |
c5b36783 | 580 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 581 | select SYS_SUPPORTS_LITTLE_ENDIAN |
424ebcdf | 582 | select SYS_SUPPORTS_MICROMIPS |
47bf2b03 | 583 | select SYS_SUPPORTS_MIPS16 |
0365070f | 584 | select SYS_SUPPORTS_MIPS_CMP |
e56b6aa6 | 585 | select SYS_SUPPORTS_MIPS_CPS |
f41ae0b2 | 586 | select SYS_SUPPORTS_MULTITHREADING |
47bf2b03 | 587 | select SYS_SUPPORTS_RELOCATABLE |
9693a853 | 588 | select SYS_SUPPORTS_SMARTMIPS |
f35764e7 | 589 | select SYS_SUPPORTS_VPE_LOADER |
1b93b3c3 | 590 | select SYS_SUPPORTS_ZBOOT |
e8823d26 | 591 | select USE_OF |
886ee136 | 592 | select WAR_ICACHE_REFILLS |
abcc82b1 | 593 | select ZONE_DMA32 if 64BIT |
1da177e4 | 594 | help |
f638d197 | 595 | This enables support for the MIPS Technologies Malta evaluation |
1da177e4 LT |
596 | board. |
597 | ||
2572f00d JH |
598 | config MACH_PIC32 |
599 | bool "Microchip PIC32 Family" | |
600 | help | |
601 | This enables support for the Microchip PIC32 family of platforms. | |
602 | ||
603 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core | |
604 | microcontrollers. | |
605 | ||
5e83d430 | 606 | config MACH_VR41XX |
74142d65 | 607 | bool "NEC VR4100 series based machines" |
42f77542 | 608 | select CEVT_R4K |
940f6b48 | 609 | select CSRC_R4K |
7cf8053b | 610 | select SYS_HAS_CPU_VR41XX |
377cb1b6 | 611 | select SYS_SUPPORTS_MIPS16 |
d30a2b47 | 612 | select GPIOLIB |
5e83d430 | 613 | |
baec970a LK |
614 | config MACH_NINTENDO64 |
615 | bool "Nintendo 64 console" | |
616 | select CEVT_R4K | |
617 | select CSRC_R4K | |
618 | select SYS_HAS_CPU_R4300 | |
619 | select SYS_SUPPORTS_BIG_ENDIAN | |
620 | select SYS_SUPPORTS_ZBOOT | |
621 | select SYS_SUPPORTS_32BIT_KERNEL | |
622 | select SYS_SUPPORTS_64BIT_KERNEL | |
623 | select DMA_NONCOHERENT | |
624 | select IRQ_MIPS_CPU | |
625 | ||
ae2b5bb6 JC |
626 | config RALINK |
627 | bool "Ralink based machines" | |
628 | select CEVT_R4K | |
629 | select CSRC_R4K | |
630 | select BOOT_RAW | |
631 | select DMA_NONCOHERENT | |
67e38cf2 | 632 | select IRQ_MIPS_CPU |
ae2b5bb6 JC |
633 | select USE_OF |
634 | select SYS_HAS_CPU_MIPS32_R1 | |
635 | select SYS_HAS_CPU_MIPS32_R2 | |
636 | select SYS_SUPPORTS_32BIT_KERNEL | |
637 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 638 | select SYS_SUPPORTS_MIPS16 |
1f0400d0 | 639 | select SYS_SUPPORTS_ZBOOT |
ae2b5bb6 | 640 | select SYS_HAS_EARLY_PRINTK |
ae2b5bb6 | 641 | select CLKDEV_LOOKUP |
2a153f1c JC |
642 | select ARCH_HAS_RESET_CONTROLLER |
643 | select RESET_CONTROLLER | |
ae2b5bb6 | 644 | |
4042147a BV |
645 | config MACH_REALTEK_RTL |
646 | bool "Realtek RTL838x/RTL839x based machines" | |
647 | select MIPS_GENERIC | |
648 | select DMA_NONCOHERENT | |
649 | select IRQ_MIPS_CPU | |
650 | select CSRC_R4K | |
651 | select CEVT_R4K | |
652 | select SYS_HAS_CPU_MIPS32_R1 | |
653 | select SYS_HAS_CPU_MIPS32_R2 | |
654 | select SYS_SUPPORTS_BIG_ENDIAN | |
655 | select SYS_SUPPORTS_32BIT_KERNEL | |
656 | select SYS_SUPPORTS_MIPS16 | |
657 | select SYS_SUPPORTS_MULTITHREADING | |
658 | select SYS_SUPPORTS_VPE_LOADER | |
659 | select SYS_HAS_EARLY_PRINTK | |
660 | select SYS_HAS_EARLY_PRINTK_8250 | |
661 | select USE_GENERIC_EARLY_PRINTK_8250 | |
662 | select BOOT_RAW | |
663 | select PINCTRL | |
664 | select USE_OF | |
665 | ||
1da177e4 | 666 | config SGI_IP22 |
3fa986fa | 667 | bool "SGI IP22 (Indy/Indigo2)" |
c0de00b2 | 668 | select ARC_MEMORY |
39b2d756 | 669 | select ARC_PROMLIB |
0e2794b0 RB |
670 | select FW_ARC |
671 | select FW_ARC32 | |
7a407aa5 | 672 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 673 | select BOOT_ELF32 |
42f77542 | 674 | select CEVT_R4K |
940f6b48 | 675 | select CSRC_R4K |
e2defae5 | 676 | select DEFAULT_SGI_PARTITION |
1da177e4 | 677 | select DMA_NONCOHERENT |
6630a8e5 | 678 | select HAVE_EISA |
d865bea4 | 679 | select I8253 |
68de4803 | 680 | select I8259 |
1da177e4 | 681 | select IP22_CPU_SCACHE |
67e38cf2 | 682 | select IRQ_MIPS_CPU |
aa414dff | 683 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
e2defae5 TB |
684 | select SGI_HAS_I8042 |
685 | select SGI_HAS_INDYDOG | |
36e5c21d | 686 | select SGI_HAS_HAL2 |
e2defae5 TB |
687 | select SGI_HAS_SEEQ |
688 | select SGI_HAS_WD93 | |
689 | select SGI_HAS_ZILOG | |
1da177e4 | 690 | select SWAP_IO_SPACE |
7cf8053b RB |
691 | select SYS_HAS_CPU_R4X00 |
692 | select SYS_HAS_CPU_R5000 | |
c0de00b2 | 693 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb YY |
694 | select SYS_SUPPORTS_32BIT_KERNEL |
695 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 696 | select SYS_SUPPORTS_BIG_ENDIAN |
802b8362 | 697 | select WAR_R4600_V1_INDEX_ICACHEOP |
5e5b6527 | 698 | select WAR_R4600_V1_HIT_CACHEOP |
44def342 | 699 | select WAR_R4600_V2_HIT_CACHEOP |
930beb5a | 700 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
701 | help |
702 | This are the SGI Indy, Challenge S and Indigo2, as well as certain | |
703 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel | |
704 | that runs on these, say Y here. | |
705 | ||
706 | config SGI_IP27 | |
3fa986fa | 707 | bool "SGI IP27 (Origin200/2000)" |
54aed4dd | 708 | select ARCH_HAS_PHYS_TO_DMA |
397dc00e | 709 | select ARCH_SPARSEMEM_ENABLE |
0e2794b0 RB |
710 | select FW_ARC |
711 | select FW_ARC64 | |
e9422427 | 712 | select ARC_CMDLINE_ONLY |
5e83d430 | 713 | select BOOT_ELF64 |
e2defae5 | 714 | select DEFAULT_SGI_PARTITION |
36a88530 | 715 | select SYS_HAS_EARLY_PRINTK |
eb01d42a | 716 | select HAVE_PCI |
69a07a41 | 717 | select IRQ_MIPS_CPU |
e6308b6d | 718 | select IRQ_DOMAIN_HIERARCHY |
130e2fb7 | 719 | select NR_CPUS_DEFAULT_64 |
a57140e9 TB |
720 | select PCI_DRIVERS_GENERIC |
721 | select PCI_XTALK_BRIDGE | |
7cf8053b | 722 | select SYS_HAS_CPU_R10000 |
ed5ba2fb | 723 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 724 | select SYS_SUPPORTS_BIG_ENDIAN |
d8cb4e11 | 725 | select SYS_SUPPORTS_NUMA |
1a5c5de1 | 726 | select SYS_SUPPORTS_SMP |
256ec489 | 727 | select WAR_R10000_LLSC |
930beb5a | 728 | select MIPS_L1_CACHE_SHIFT_7 |
6c86a302 | 729 | select NUMA |
1da177e4 LT |
730 | help |
731 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics | |
732 | workstations. To compile a Linux kernel that runs on these, say Y | |
733 | here. | |
734 | ||
e2defae5 | 735 | config SGI_IP28 |
7d60717e | 736 | bool "SGI IP28 (Indigo2 R10k)" |
c0de00b2 | 737 | select ARC_MEMORY |
39b2d756 | 738 | select ARC_PROMLIB |
0e2794b0 RB |
739 | select FW_ARC |
740 | select FW_ARC64 | |
7a407aa5 | 741 | select ARCH_MIGHT_HAVE_PC_SERIO |
e2defae5 TB |
742 | select BOOT_ELF64 |
743 | select CEVT_R4K | |
744 | select CSRC_R4K | |
745 | select DEFAULT_SGI_PARTITION | |
746 | select DMA_NONCOHERENT | |
747 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
67e38cf2 | 748 | select IRQ_MIPS_CPU |
6630a8e5 | 749 | select HAVE_EISA |
e2defae5 TB |
750 | select I8253 |
751 | select I8259 | |
e2defae5 TB |
752 | select SGI_HAS_I8042 |
753 | select SGI_HAS_INDYDOG | |
5b438c44 | 754 | select SGI_HAS_HAL2 |
e2defae5 TB |
755 | select SGI_HAS_SEEQ |
756 | select SGI_HAS_WD93 | |
757 | select SGI_HAS_ZILOG | |
758 | select SWAP_IO_SPACE | |
759 | select SYS_HAS_CPU_R10000 | |
c0de00b2 | 760 | select SYS_HAS_EARLY_PRINTK |
e2defae5 TB |
761 | select SYS_SUPPORTS_64BIT_KERNEL |
762 | select SYS_SUPPORTS_BIG_ENDIAN | |
256ec489 | 763 | select WAR_R10000_LLSC |
dc24d68d | 764 | select MIPS_L1_CACHE_SHIFT_7 |
371a4151 EWI |
765 | help |
766 | This is the SGI Indigo2 with R10000 processor. To compile a Linux | |
767 | kernel that runs on these, say Y here. | |
e2defae5 | 768 | |
7505576d TB |
769 | config SGI_IP30 |
770 | bool "SGI IP30 (Octane/Octane2)" | |
771 | select ARCH_HAS_PHYS_TO_DMA | |
772 | select FW_ARC | |
773 | select FW_ARC64 | |
774 | select BOOT_ELF64 | |
775 | select CEVT_R4K | |
776 | select CSRC_R4K | |
777 | select SYNC_R4K if SMP | |
778 | select ZONE_DMA32 | |
779 | select HAVE_PCI | |
780 | select IRQ_MIPS_CPU | |
781 | select IRQ_DOMAIN_HIERARCHY | |
782 | select NR_CPUS_DEFAULT_2 | |
783 | select PCI_DRIVERS_GENERIC | |
784 | select PCI_XTALK_BRIDGE | |
785 | select SYS_HAS_EARLY_PRINTK | |
786 | select SYS_HAS_CPU_R10000 | |
787 | select SYS_SUPPORTS_64BIT_KERNEL | |
788 | select SYS_SUPPORTS_BIG_ENDIAN | |
789 | select SYS_SUPPORTS_SMP | |
256ec489 | 790 | select WAR_R10000_LLSC |
7505576d TB |
791 | select MIPS_L1_CACHE_SHIFT_7 |
792 | select ARC_MEMORY | |
793 | help | |
794 | These are the SGI Octane and Octane2 graphics workstations. To | |
795 | compile a Linux kernel that runs on these, say Y here. | |
796 | ||
1da177e4 | 797 | config SGI_IP32 |
cfd2afc0 | 798 | bool "SGI IP32 (O2)" |
39b2d756 TB |
799 | select ARC_MEMORY |
800 | select ARC_PROMLIB | |
03df8229 | 801 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
802 | select FW_ARC |
803 | select FW_ARC32 | |
1da177e4 | 804 | select BOOT_ELF32 |
42f77542 | 805 | select CEVT_R4K |
940f6b48 | 806 | select CSRC_R4K |
1da177e4 | 807 | select DMA_NONCOHERENT |
eb01d42a | 808 | select HAVE_PCI |
67e38cf2 | 809 | select IRQ_MIPS_CPU |
1da177e4 LT |
810 | select R5000_CPU_SCACHE |
811 | select RM7000_CPU_SCACHE | |
7cf8053b RB |
812 | select SYS_HAS_CPU_R5000 |
813 | select SYS_HAS_CPU_R10000 if BROKEN | |
814 | select SYS_HAS_CPU_RM7000 | |
dd2f18fe | 815 | select SYS_HAS_CPU_NEVADA |
ed5ba2fb | 816 | select SYS_SUPPORTS_64BIT_KERNEL |
23fbee9d | 817 | select SYS_SUPPORTS_BIG_ENDIAN |
886ee136 | 818 | select WAR_ICACHE_REFILLS |
23fbee9d | 819 | help |
5e83d430 | 820 | If you want this kernel to run on SGI O2 workstation, say Y here. |
1da177e4 | 821 | |
ade299d8 YY |
822 | config SIBYTE_CRHINE |
823 | bool "Sibyte BCM91120C-CRhine" | |
9a6dcea1 | 824 | select BOOT_ELF32 |
ade299d8 | 825 | select SIBYTE_BCM1120 |
9a6dcea1 | 826 | select SWAP_IO_SPACE |
7cf8053b | 827 | select SYS_HAS_CPU_SB1 |
9a6dcea1 AI |
828 | select SYS_SUPPORTS_BIG_ENDIAN |
829 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
830 | ||
ade299d8 YY |
831 | config SIBYTE_CARMEL |
832 | bool "Sibyte BCM91120x-Carmel" | |
5e83d430 | 833 | select BOOT_ELF32 |
ade299d8 | 834 | select SIBYTE_BCM1120 |
5e83d430 | 835 | select SWAP_IO_SPACE |
7cf8053b | 836 | select SYS_HAS_CPU_SB1 |
81731f79 | 837 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 838 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 839 | |
ade299d8 YY |
840 | config SIBYTE_CRHONE |
841 | bool "Sibyte BCM91125C-CRhone" | |
5e83d430 | 842 | select BOOT_ELF32 |
ade299d8 | 843 | select SIBYTE_BCM1125 |
5e83d430 | 844 | select SWAP_IO_SPACE |
7cf8053b | 845 | select SYS_HAS_CPU_SB1 |
5e83d430 | 846 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 847 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 848 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 849 | |
5e83d430 | 850 | config SIBYTE_RHONE |
3fa986fa | 851 | bool "Sibyte BCM91125E-Rhone" |
5e83d430 | 852 | select BOOT_ELF32 |
5e83d430 RB |
853 | select SIBYTE_BCM1125H |
854 | select SWAP_IO_SPACE | |
7cf8053b | 855 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
856 | select SYS_SUPPORTS_BIG_ENDIAN |
857 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1da177e4 | 858 | |
ade299d8 YY |
859 | config SIBYTE_SWARM |
860 | bool "Sibyte BCM91250A-SWARM" | |
5e83d430 | 861 | select BOOT_ELF32 |
fcf3ca4c | 862 | select HAVE_PATA_PLATFORM |
ade299d8 | 863 | select SIBYTE_SB1250 |
5e83d430 | 864 | select SWAP_IO_SPACE |
7cf8053b | 865 | select SYS_HAS_CPU_SB1 |
5e83d430 | 866 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 867 | select SYS_SUPPORTS_HIGHMEM |
e3ad1c23 | 868 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 869 | select ZONE_DMA32 if 64BIT |
e4849aff | 870 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
e3ad1c23 | 871 | |
ade299d8 YY |
872 | config SIBYTE_LITTLESUR |
873 | bool "Sibyte BCM91250C2-LittleSur" | |
5e83d430 | 874 | select BOOT_ELF32 |
fcf3ca4c | 875 | select HAVE_PATA_PLATFORM |
5e83d430 RB |
876 | select SIBYTE_SB1250 |
877 | select SWAP_IO_SPACE | |
7cf8053b | 878 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
879 | select SYS_SUPPORTS_BIG_ENDIAN |
880 | select SYS_SUPPORTS_HIGHMEM | |
881 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
756d6d83 | 882 | select ZONE_DMA32 if 64BIT |
1da177e4 | 883 | |
ade299d8 YY |
884 | config SIBYTE_SENTOSA |
885 | bool "Sibyte BCM91250E-Sentosa" | |
5e83d430 | 886 | select BOOT_ELF32 |
5e83d430 RB |
887 | select SIBYTE_SB1250 |
888 | select SWAP_IO_SPACE | |
7cf8053b | 889 | select SYS_HAS_CPU_SB1 |
5e83d430 | 890 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 891 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e4849aff | 892 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 893 | |
ade299d8 YY |
894 | config SIBYTE_BIGSUR |
895 | bool "Sibyte BCM91480B-BigSur" | |
5e83d430 | 896 | select BOOT_ELF32 |
ade299d8 | 897 | select NR_CPUS_DEFAULT_4 |
ade299d8 | 898 | select SIBYTE_BCM1x80 |
5e83d430 | 899 | select SWAP_IO_SPACE |
7cf8053b | 900 | select SYS_HAS_CPU_SB1 |
5e83d430 | 901 | select SYS_SUPPORTS_BIG_ENDIAN |
651194f8 | 902 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 903 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 904 | select ZONE_DMA32 if 64BIT |
e4849aff | 905 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 906 | |
14b36af4 TB |
907 | config SNI_RM |
908 | bool "SNI RM200/300/400" | |
39b2d756 TB |
909 | select ARC_MEMORY |
910 | select ARC_PROMLIB | |
0e2794b0 RB |
911 | select FW_ARC if CPU_LITTLE_ENDIAN |
912 | select FW_ARC32 if CPU_LITTLE_ENDIAN | |
aaa9fad3 | 913 | select FW_SNIPROM if CPU_BIG_ENDIAN |
61ed242d | 914 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 915 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 916 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 917 | select BOOT_ELF32 |
42f77542 | 918 | select CEVT_R4K |
940f6b48 | 919 | select CSRC_R4K |
e2defae5 | 920 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
1da177e4 LT |
921 | select DMA_NONCOHERENT |
922 | select GENERIC_ISA_DMA | |
6630a8e5 | 923 | select HAVE_EISA |
8a118c38 | 924 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 925 | select HAVE_PCI |
67e38cf2 | 926 | select IRQ_MIPS_CPU |
d865bea4 | 927 | select I8253 |
1da177e4 LT |
928 | select I8259 |
929 | select ISA | |
564c836f | 930 | select MIPS_L1_CACHE_SHIFT_6 |
4a0312fc | 931 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
7cf8053b | 932 | select SYS_HAS_CPU_R4X00 |
4a0312fc | 933 | select SYS_HAS_CPU_R5000 |
c066a32a | 934 | select SYS_HAS_CPU_R10000 |
4a0312fc | 935 | select R5000_CPU_SCACHE |
36a88530 | 936 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 937 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 938 | select SYS_SUPPORTS_64BIT_KERNEL |
4a0312fc | 939 | select SYS_SUPPORTS_BIG_ENDIAN |
797798c1 | 940 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 941 | select SYS_SUPPORTS_LITTLE_ENDIAN |
44def342 | 942 | select WAR_R4600_V2_HIT_CACHEOP |
1da177e4 | 943 | help |
14b36af4 TB |
944 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
945 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid | |
1da177e4 LT |
946 | Technology and now in turn merged with Fujitsu. Say Y here to |
947 | support this machine type. | |
948 | ||
edcaf1a6 AN |
949 | config MACH_TX39XX |
950 | bool "Toshiba TX39 series based machines" | |
5e83d430 | 951 | |
edcaf1a6 AN |
952 | config MACH_TX49XX |
953 | bool "Toshiba TX49 series based machines" | |
24a1c023 | 954 | select WAR_TX49XX_ICACHE_INDEX_INV |
5e83d430 | 955 | |
73b4390f RB |
956 | config MIKROTIK_RB532 |
957 | bool "Mikrotik RB532 boards" | |
958 | select CEVT_R4K | |
959 | select CSRC_R4K | |
960 | select DMA_NONCOHERENT | |
eb01d42a | 961 | select HAVE_PCI |
67e38cf2 | 962 | select IRQ_MIPS_CPU |
73b4390f RB |
963 | select SYS_HAS_CPU_MIPS32_R1 |
964 | select SYS_SUPPORTS_32BIT_KERNEL | |
965 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
966 | select SWAP_IO_SPACE | |
967 | select BOOT_RAW | |
d30a2b47 | 968 | select GPIOLIB |
930beb5a | 969 | select MIPS_L1_CACHE_SHIFT_4 |
73b4390f RB |
970 | help |
971 | Support the Mikrotik(tm) RouterBoard 532 series, | |
972 | based on the IDT RC32434 SoC. | |
973 | ||
9ddebc46 DD |
974 | config CAVIUM_OCTEON_SOC |
975 | bool "Cavium Networks Octeon SoC based boards" | |
a86c7f72 | 976 | select CEVT_R4K |
ea8c64ac | 977 | select ARCH_HAS_PHYS_TO_DMA |
1753d50c | 978 | select HAVE_RAPIDIO |
d4a451d5 | 979 | select PHYS_ADDR_T_64BIT |
a86c7f72 DD |
980 | select SYS_SUPPORTS_64BIT_KERNEL |
981 | select SYS_SUPPORTS_BIG_ENDIAN | |
f65aad41 | 982 | select EDAC_SUPPORT |
b01aec9b | 983 | select EDAC_ATOMIC_SCRUB |
73569d87 DD |
984 | select SYS_SUPPORTS_LITTLE_ENDIAN |
985 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN | |
a86c7f72 | 986 | select SYS_HAS_EARLY_PRINTK |
5e683389 | 987 | select SYS_HAS_CPU_CAVIUM_OCTEON |
eb01d42a | 988 | select HAVE_PCI |
78bdbbac MY |
989 | select HAVE_PLAT_DELAY |
990 | select HAVE_PLAT_FW_INIT_CMDLINE | |
991 | select HAVE_PLAT_MEMCPY | |
f00e001e | 992 | select ZONE_DMA32 |
465aaed0 | 993 | select HOLES_IN_ZONE |
d30a2b47 | 994 | select GPIOLIB |
6e511163 DD |
995 | select USE_OF |
996 | select ARCH_SPARSEMEM_ENABLE | |
997 | select SYS_SUPPORTS_SMP | |
7820b84b DD |
998 | select NR_CPUS_DEFAULT_64 |
999 | select MIPS_NR_CPU_NR_MAP_1024 | |
e326479f | 1000 | select BUILTIN_DTB |
8c1e6b14 | 1001 | select MTD_COMPLEX_MAPPINGS |
09230cbc | 1002 | select SWIOTLB |
3ff72be4 | 1003 | select SYS_SUPPORTS_RELOCATABLE |
a86c7f72 DD |
1004 | help |
1005 | This option supports all of the Octeon reference boards from Cavium | |
1006 | Networks. It builds a kernel that dynamically determines the Octeon | |
1007 | CPU type and supports all known board reference implementations. | |
1008 | Some of the supported boards are: | |
1009 | EBT3000 | |
1010 | EBH3000 | |
1011 | EBH3100 | |
1012 | Thunder | |
1013 | Kodama | |
1014 | Hikari | |
1015 | Say Y here for most Octeon reference boards. | |
1016 | ||
7f058e85 J |
1017 | config NLM_XLR_BOARD |
1018 | bool "Netlogic XLR/XLS based systems" | |
7f058e85 J |
1019 | select BOOT_ELF32 |
1020 | select NLM_COMMON | |
7f058e85 J |
1021 | select SYS_HAS_CPU_XLR |
1022 | select SYS_SUPPORTS_SMP | |
eb01d42a | 1023 | select HAVE_PCI |
7f058e85 J |
1024 | select SWAP_IO_SPACE |
1025 | select SYS_SUPPORTS_32BIT_KERNEL | |
1026 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 1027 | select PHYS_ADDR_T_64BIT |
7f058e85 J |
1028 | select SYS_SUPPORTS_BIG_ENDIAN |
1029 | select SYS_SUPPORTS_HIGHMEM | |
7f058e85 J |
1030 | select NR_CPUS_DEFAULT_32 |
1031 | select CEVT_R4K | |
1032 | select CSRC_R4K | |
67e38cf2 | 1033 | select IRQ_MIPS_CPU |
b97215fd | 1034 | select ZONE_DMA32 if 64BIT |
7f058e85 J |
1035 | select SYNC_R4K |
1036 | select SYS_HAS_EARLY_PRINTK | |
8f0b0430 J |
1037 | select SYS_SUPPORTS_ZBOOT |
1038 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
7f058e85 J |
1039 | help |
1040 | Support for systems based on Netlogic XLR and XLS processors. | |
1041 | Say Y here if you have a XLR or XLS based board. | |
1042 | ||
1c773ea4 J |
1043 | config NLM_XLP_BOARD |
1044 | bool "Netlogic XLP based systems" | |
1c773ea4 J |
1045 | select BOOT_ELF32 |
1046 | select NLM_COMMON | |
1047 | select SYS_HAS_CPU_XLP | |
1048 | select SYS_SUPPORTS_SMP | |
eb01d42a | 1049 | select HAVE_PCI |
1c773ea4 J |
1050 | select SYS_SUPPORTS_32BIT_KERNEL |
1051 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 1052 | select PHYS_ADDR_T_64BIT |
d30a2b47 | 1053 | select GPIOLIB |
1c773ea4 J |
1054 | select SYS_SUPPORTS_BIG_ENDIAN |
1055 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1056 | select SYS_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1057 | select NR_CPUS_DEFAULT_32 |
1058 | select CEVT_R4K | |
1059 | select CSRC_R4K | |
67e38cf2 | 1060 | select IRQ_MIPS_CPU |
b97215fd | 1061 | select ZONE_DMA32 if 64BIT |
1c773ea4 J |
1062 | select SYNC_R4K |
1063 | select SYS_HAS_EARLY_PRINTK | |
2f6528e1 | 1064 | select USE_OF |
8f0b0430 J |
1065 | select SYS_SUPPORTS_ZBOOT |
1066 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
1c773ea4 J |
1067 | help |
1068 | This board is based on Netlogic XLP Processor. | |
1069 | Say Y here if you have a XLP based board. | |
1070 | ||
5e83d430 | 1071 | endchoice |
1da177e4 | 1072 | |
e8c7c482 | 1073 | source "arch/mips/alchemy/Kconfig" |
3b12308f | 1074 | source "arch/mips/ath25/Kconfig" |
d4a67d9d | 1075 | source "arch/mips/ath79/Kconfig" |
a656ffcb | 1076 | source "arch/mips/bcm47xx/Kconfig" |
e7300d04 | 1077 | source "arch/mips/bcm63xx/Kconfig" |
8945e37e | 1078 | source "arch/mips/bmips/Kconfig" |
eed0eabd | 1079 | source "arch/mips/generic/Kconfig" |
a103e9b9 | 1080 | source "arch/mips/ingenic/Kconfig" |
5e83d430 | 1081 | source "arch/mips/jazz/Kconfig" |
8ec6d935 | 1082 | source "arch/mips/lantiq/Kconfig" |
2572f00d | 1083 | source "arch/mips/pic32/Kconfig" |
af0cfb2c | 1084 | source "arch/mips/pistachio/Kconfig" |
ae2b5bb6 | 1085 | source "arch/mips/ralink/Kconfig" |
29c48699 | 1086 | source "arch/mips/sgi-ip27/Kconfig" |
38b18f72 | 1087 | source "arch/mips/sibyte/Kconfig" |
22b1d707 | 1088 | source "arch/mips/txx9/Kconfig" |
5e83d430 | 1089 | source "arch/mips/vr41xx/Kconfig" |
a86c7f72 | 1090 | source "arch/mips/cavium-octeon/Kconfig" |
71e2f4dd | 1091 | source "arch/mips/loongson2ef/Kconfig" |
30ad29bb HC |
1092 | source "arch/mips/loongson32/Kconfig" |
1093 | source "arch/mips/loongson64/Kconfig" | |
7f058e85 | 1094 | source "arch/mips/netlogic/Kconfig" |
38b18f72 | 1095 | |
5e83d430 RB |
1096 | endmenu |
1097 | ||
3c9ee7ef AM |
1098 | config GENERIC_HWEIGHT |
1099 | bool | |
1100 | default y | |
1101 | ||
1da177e4 LT |
1102 | config GENERIC_CALIBRATE_DELAY |
1103 | bool | |
1104 | default y | |
1105 | ||
ae1e9130 | 1106 | config SCHED_OMIT_FRAME_POINTER |
1cc89038 AN |
1107 | bool |
1108 | default y | |
1109 | ||
1da177e4 LT |
1110 | # |
1111 | # Select some configuration options automatically based on user selections. | |
1112 | # | |
0e2794b0 | 1113 | config FW_ARC |
1da177e4 | 1114 | bool |
1da177e4 | 1115 | |
61ed242d RB |
1116 | config ARCH_MAY_HAVE_PC_FDC |
1117 | bool | |
1118 | ||
9267a30d MSJ |
1119 | config BOOT_RAW |
1120 | bool | |
1121 | ||
217dd11e RB |
1122 | config CEVT_BCM1480 |
1123 | bool | |
1124 | ||
6457d9fc YY |
1125 | config CEVT_DS1287 |
1126 | bool | |
1127 | ||
1097c6ac YY |
1128 | config CEVT_GT641XX |
1129 | bool | |
1130 | ||
42f77542 RB |
1131 | config CEVT_R4K |
1132 | bool | |
1133 | ||
217dd11e RB |
1134 | config CEVT_SB1250 |
1135 | bool | |
1136 | ||
229f773e AN |
1137 | config CEVT_TXX9 |
1138 | bool | |
1139 | ||
217dd11e RB |
1140 | config CSRC_BCM1480 |
1141 | bool | |
1142 | ||
4247417d YY |
1143 | config CSRC_IOASIC |
1144 | bool | |
1145 | ||
940f6b48 | 1146 | config CSRC_R4K |
38586428 | 1147 | select CLOCKSOURCE_WATCHDOG if CPU_FREQ |
940f6b48 RB |
1148 | bool |
1149 | ||
217dd11e RB |
1150 | config CSRC_SB1250 |
1151 | bool | |
1152 | ||
a7f4df4e AS |
1153 | config MIPS_CLOCK_VSYSCALL |
1154 | def_bool CSRC_R4K || CLKSRC_MIPS_GIC | |
1155 | ||
a9aec7fe | 1156 | config GPIO_TXX9 |
d30a2b47 | 1157 | select GPIOLIB |
a9aec7fe AN |
1158 | bool |
1159 | ||
0e2794b0 | 1160 | config FW_CFE |
df78b5c8 AJ |
1161 | bool |
1162 | ||
40e084a5 RB |
1163 | config ARCH_SUPPORTS_UPROBES |
1164 | bool | |
1165 | ||
20d33064 PB |
1166 | config DMA_PERDEV_COHERENT |
1167 | bool | |
347cb6af | 1168 | select ARCH_HAS_SETUP_DMA_OPS |
5748e1b3 | 1169 | select DMA_NONCOHERENT |
20d33064 | 1170 | |
4ce588cd RB |
1171 | config DMA_NONCOHERENT |
1172 | bool | |
db91427b CH |
1173 | # |
1174 | # MIPS allows mixing "slightly different" Cacheability and Coherency | |
1175 | # Attribute bits. It is believed that the uncached access through | |
1176 | # KSEG1 and the implementation specific "uncached accelerated" used | |
1177 | # by pgprot_writcombine can be mixed, and the latter sometimes provides | |
1178 | # significant advantages. | |
1179 | # | |
419e2f18 | 1180 | select ARCH_HAS_DMA_WRITE_COMBINE |
fa7e2247 | 1181 | select ARCH_HAS_DMA_PREP_COHERENT |
f8c55dc6 | 1182 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
fa7e2247 | 1183 | select ARCH_HAS_DMA_SET_UNCACHED |
34dc0ea6 | 1184 | select DMA_NONCOHERENT_MMAP |
34dc0ea6 | 1185 | select NEED_DMA_MAP_STATE |
4ce588cd | 1186 | |
36a88530 | 1187 | config SYS_HAS_EARLY_PRINTK |
1da177e4 | 1188 | bool |
1da177e4 | 1189 | |
1b2bc75c | 1190 | config SYS_SUPPORTS_HOTPLUG_CPU |
dbb74540 | 1191 | bool |
dbb74540 | 1192 | |
1da177e4 LT |
1193 | config MIPS_BONITO64 |
1194 | bool | |
1da177e4 LT |
1195 | |
1196 | config MIPS_MSC | |
1197 | bool | |
1da177e4 | 1198 | |
39b8d525 RB |
1199 | config SYNC_R4K |
1200 | bool | |
1201 | ||
ce816fa8 | 1202 | config NO_IOPORT_MAP |
d388d685 MR |
1203 | def_bool n |
1204 | ||
4e0748f5 | 1205 | config GENERIC_CSUM |
18d84e2e | 1206 | def_bool CPU_NO_LOAD_STORE_LR |
4e0748f5 | 1207 | |
8313da30 RB |
1208 | config GENERIC_ISA_DMA |
1209 | bool | |
1210 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n | |
a35bee8a | 1211 | select ISA_DMA_API |
8313da30 | 1212 | |
aa414dff RB |
1213 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
1214 | bool | |
8313da30 | 1215 | select GENERIC_ISA_DMA |
aa414dff | 1216 | |
78bdbbac MY |
1217 | config HAVE_PLAT_DELAY |
1218 | bool | |
1219 | ||
1220 | config HAVE_PLAT_FW_INIT_CMDLINE | |
1221 | bool | |
1222 | ||
1223 | config HAVE_PLAT_MEMCPY | |
1224 | bool | |
1225 | ||
a35bee8a NK |
1226 | config ISA_DMA_API |
1227 | bool | |
1228 | ||
465aaed0 DD |
1229 | config HOLES_IN_ZONE |
1230 | bool | |
1231 | ||
8c530ea3 MR |
1232 | config SYS_SUPPORTS_RELOCATABLE |
1233 | bool | |
1234 | help | |
371a4151 EWI |
1235 | Selected if the platform supports relocating the kernel. |
1236 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF | |
1237 | to allow access to command line and entropy sources. | |
8c530ea3 | 1238 | |
f381bf6d DD |
1239 | config MIPS_CBPF_JIT |
1240 | def_bool y | |
1241 | depends on BPF_JIT && HAVE_CBPF_JIT | |
1242 | ||
1243 | config MIPS_EBPF_JIT | |
1244 | def_bool y | |
1245 | depends on BPF_JIT && HAVE_EBPF_JIT | |
1246 | ||
1247 | ||
5e83d430 | 1248 | # |
6b2aac42 | 1249 | # Endianness selection. Sufficiently obscure so many users don't know what to |
5e83d430 RB |
1250 | # answer,so we try hard to limit the available choices. Also the use of a |
1251 | # choice statement should be more obvious to the user. | |
1252 | # | |
1253 | choice | |
6b2aac42 | 1254 | prompt "Endianness selection" |
1da177e4 LT |
1255 | help |
1256 | Some MIPS machines can be configured for either little or big endian | |
5e83d430 | 1257 | byte order. These modes require different kernels and a different |
3cb2fccc | 1258 | Linux distribution. In general there is one preferred byteorder for a |
5e83d430 | 1259 | particular system but some systems are just as commonly used in the |
3dde6ad8 | 1260 | one or the other endianness. |
5e83d430 RB |
1261 | |
1262 | config CPU_BIG_ENDIAN | |
1263 | bool "Big endian" | |
1264 | depends on SYS_SUPPORTS_BIG_ENDIAN | |
1265 | ||
1266 | config CPU_LITTLE_ENDIAN | |
1267 | bool "Little endian" | |
1268 | depends on SYS_SUPPORTS_LITTLE_ENDIAN | |
5e83d430 RB |
1269 | |
1270 | endchoice | |
1271 | ||
22b0763a DD |
1272 | config EXPORT_UASM |
1273 | bool | |
1274 | ||
2116245e RB |
1275 | config SYS_SUPPORTS_APM_EMULATION |
1276 | bool | |
1277 | ||
5e83d430 RB |
1278 | config SYS_SUPPORTS_BIG_ENDIAN |
1279 | bool | |
1280 | ||
1281 | config SYS_SUPPORTS_LITTLE_ENDIAN | |
1282 | bool | |
1da177e4 | 1283 | |
9cffd154 DD |
1284 | config SYS_SUPPORTS_HUGETLBFS |
1285 | bool | |
45e03e62 | 1286 | depends on CPU_SUPPORTS_HUGEPAGES |
9cffd154 DD |
1287 | default y |
1288 | ||
aa1762f4 DD |
1289 | config MIPS_HUGE_TLB_SUPPORT |
1290 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE | |
1291 | ||
9267a30d MSJ |
1292 | config IRQ_MSP_SLP |
1293 | bool | |
1294 | ||
1295 | config IRQ_MSP_CIC | |
1296 | bool | |
1297 | ||
8420fd00 AN |
1298 | config IRQ_TXX9 |
1299 | bool | |
1300 | ||
d5ab1a69 YY |
1301 | config IRQ_GT641XX |
1302 | bool | |
1303 | ||
252161ec | 1304 | config PCI_GT64XXX_PCI0 |
1da177e4 | 1305 | bool |
1da177e4 | 1306 | |
a57140e9 TB |
1307 | config PCI_XTALK_BRIDGE |
1308 | bool | |
1309 | ||
9267a30d MSJ |
1310 | config NO_EXCEPT_FILL |
1311 | bool | |
1312 | ||
a7e07b1a MC |
1313 | config MIPS_SPRAM |
1314 | bool | |
1315 | ||
1da177e4 LT |
1316 | config SWAP_IO_SPACE |
1317 | bool | |
1318 | ||
e2defae5 TB |
1319 | config SGI_HAS_INDYDOG |
1320 | bool | |
1321 | ||
5b438c44 TB |
1322 | config SGI_HAS_HAL2 |
1323 | bool | |
1324 | ||
e2defae5 TB |
1325 | config SGI_HAS_SEEQ |
1326 | bool | |
1327 | ||
1328 | config SGI_HAS_WD93 | |
1329 | bool | |
1330 | ||
1331 | config SGI_HAS_ZILOG | |
1332 | bool | |
1333 | ||
1334 | config SGI_HAS_I8042 | |
1335 | bool | |
1336 | ||
1337 | config DEFAULT_SGI_PARTITION | |
1338 | bool | |
1339 | ||
0e2794b0 | 1340 | config FW_ARC32 |
5e83d430 RB |
1341 | bool |
1342 | ||
aaa9fad3 | 1343 | config FW_SNIPROM |
231a35d3 TB |
1344 | bool |
1345 | ||
1da177e4 LT |
1346 | config BOOT_ELF32 |
1347 | bool | |
1da177e4 | 1348 | |
930beb5a FF |
1349 | config MIPS_L1_CACHE_SHIFT_4 |
1350 | bool | |
1351 | ||
1352 | config MIPS_L1_CACHE_SHIFT_5 | |
1353 | bool | |
1354 | ||
1355 | config MIPS_L1_CACHE_SHIFT_6 | |
1356 | bool | |
1357 | ||
1358 | config MIPS_L1_CACHE_SHIFT_7 | |
1359 | bool | |
1360 | ||
1da177e4 LT |
1361 | config MIPS_L1_CACHE_SHIFT |
1362 | int | |
a4c0201e | 1363 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
5432eeb6 KC |
1364 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
1365 | default "5" if MIPS_L1_CACHE_SHIFT_5 | |
1366 | default "4" if MIPS_L1_CACHE_SHIFT_4 | |
1da177e4 LT |
1367 | default "5" |
1368 | ||
e9422427 TB |
1369 | config ARC_CMDLINE_ONLY |
1370 | bool | |
1371 | ||
1da177e4 LT |
1372 | config ARC_CONSOLE |
1373 | bool "ARC console support" | |
e2defae5 | 1374 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
1da177e4 LT |
1375 | |
1376 | config ARC_MEMORY | |
1377 | bool | |
1da177e4 LT |
1378 | |
1379 | config ARC_PROMLIB | |
1380 | bool | |
1da177e4 | 1381 | |
0e2794b0 | 1382 | config FW_ARC64 |
1da177e4 | 1383 | bool |
1da177e4 LT |
1384 | |
1385 | config BOOT_ELF64 | |
1386 | bool | |
1da177e4 | 1387 | |
1da177e4 LT |
1388 | menu "CPU selection" |
1389 | ||
1390 | choice | |
1391 | prompt "CPU type" | |
1392 | default CPU_R4X00 | |
1393 | ||
268a2d60 | 1394 | config CPU_LOONGSON64 |
caed1d1b | 1395 | bool "Loongson 64-bit CPU" |
268a2d60 | 1396 | depends on SYS_HAS_CPU_LOONGSON64 |
d3bc81be | 1397 | select ARCH_HAS_PHYS_TO_DMA |
51522217 JY |
1398 | select CPU_MIPSR2 |
1399 | select CPU_HAS_PREFETCH | |
0e476d91 HC |
1400 | select CPU_SUPPORTS_64BIT_KERNEL |
1401 | select CPU_SUPPORTS_HIGHMEM | |
1402 | select CPU_SUPPORTS_HUGEPAGES | |
7507445b | 1403 | select CPU_SUPPORTS_MSA |
51522217 JY |
1404 | select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT |
1405 | select CPU_MIPSR2_IRQ_VI | |
0e476d91 HC |
1406 | select WEAK_ORDERING |
1407 | select WEAK_REORDERING_BEYOND_LLSC | |
7507445b | 1408 | select MIPS_ASID_BITS_VARIABLE |
b2edcfc8 | 1409 | select MIPS_PGD_C0_CONTEXT |
17c99d94 | 1410 | select MIPS_L1_CACHE_SHIFT_6 |
d30a2b47 | 1411 | select GPIOLIB |
09230cbc | 1412 | select SWIOTLB |
0f78355c | 1413 | select HAVE_KVM |
0e476d91 | 1414 | help |
caed1d1b HC |
1415 | The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor |
1416 | cores implements the MIPS64R2 instruction set with many extensions, | |
1417 | including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, | |
1418 | 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old | |
1419 | Loongson-2E/2F is not covered here and will be removed in future. | |
1420 | ||
1421 | config LOONGSON3_ENHANCEMENT | |
1422 | bool "New Loongson-3 CPU Enhancements" | |
1e820da3 | 1423 | default n |
268a2d60 | 1424 | depends on CPU_LOONGSON64 |
1e820da3 | 1425 | help |
caed1d1b | 1426 | New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A |
1e820da3 | 1427 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as |
268a2d60 | 1428 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User |
1e820da3 HC |
1429 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), |
1430 | Fast TLB refill support, etc. | |
1431 | ||
1432 | This option enable those enhancements which are not probed at run | |
1433 | time. If you want a generic kernel to run on all Loongson 3 machines, | |
1434 | please say 'N' here. If you want a high-performance kernel to run on | |
caed1d1b | 1435 | new Loongson-3 machines only, please say 'Y' here. |
1e820da3 | 1436 | |
e02e07e3 | 1437 | config CPU_LOONGSON3_WORKAROUNDS |
caed1d1b | 1438 | bool "Old Loongson-3 LLSC Workarounds" |
e02e07e3 | 1439 | default y if SMP |
268a2d60 | 1440 | depends on CPU_LOONGSON64 |
e02e07e3 | 1441 | help |
caed1d1b | 1442 | Loongson-3 processors have the llsc issues which require workarounds. |
e02e07e3 HC |
1443 | Without workarounds the system may hang unexpectedly. |
1444 | ||
caed1d1b | 1445 | Newer Loongson-3 will fix these issues and no workarounds are needed. |
e02e07e3 HC |
1446 | The workarounds have no significant side effect on them but may |
1447 | decrease the performance of the system so this option should be | |
1448 | disabled unless the kernel is intended to be run on old systems. | |
1449 | ||
1450 | If unsure, please say Y. | |
1451 | ||
ec7a9318 WX |
1452 | config CPU_LOONGSON3_CPUCFG_EMULATION |
1453 | bool "Emulate the CPUCFG instruction on older Loongson cores" | |
1454 | default y | |
1455 | depends on CPU_LOONGSON64 | |
1456 | help | |
1457 | Loongson-3A R4 and newer have the CPUCFG instruction available for | |
1458 | userland to query CPU capabilities, much like CPUID on x86. This | |
1459 | option provides emulation of the instruction on older Loongson | |
1460 | cores, back to Loongson-3A1000. | |
1461 | ||
1462 | If unsure, please say Y. | |
1463 | ||
3702bba5 WZ |
1464 | config CPU_LOONGSON2E |
1465 | bool "Loongson 2E" | |
1466 | depends on SYS_HAS_CPU_LOONGSON2E | |
268a2d60 | 1467 | select CPU_LOONGSON2EF |
2a21c730 FZ |
1468 | help |
1469 | The Loongson 2E processor implements the MIPS III instruction set | |
1470 | with many extensions. | |
1471 | ||
25985edc | 1472 | It has an internal FPGA northbridge, which is compatible to |
6f7a251a WZ |
1473 | bonito64. |
1474 | ||
1475 | config CPU_LOONGSON2F | |
1476 | bool "Loongson 2F" | |
1477 | depends on SYS_HAS_CPU_LOONGSON2F | |
268a2d60 | 1478 | select CPU_LOONGSON2EF |
d30a2b47 | 1479 | select GPIOLIB |
6f7a251a WZ |
1480 | help |
1481 | The Loongson 2F processor implements the MIPS III instruction set | |
1482 | with many extensions. | |
1483 | ||
1484 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | |
1485 | have a similar programming interface with FPGA northbridge used in | |
1486 | Loongson2E. | |
1487 | ||
ca585cf9 KC |
1488 | config CPU_LOONGSON1B |
1489 | bool "Loongson 1B" | |
1490 | depends on SYS_HAS_CPU_LOONGSON1B | |
b2afb64c | 1491 | select CPU_LOONGSON32 |
9ec88b60 | 1492 | select LEDS_GPIO_REGISTER |
ca585cf9 KC |
1493 | help |
1494 | The Loongson 1B is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1495 | Release 1 instruction set and part of the MIPS32 Release 2 |
1496 | instruction set. | |
ca585cf9 | 1497 | |
12e3280b YL |
1498 | config CPU_LOONGSON1C |
1499 | bool "Loongson 1C" | |
1500 | depends on SYS_HAS_CPU_LOONGSON1C | |
b2afb64c | 1501 | select CPU_LOONGSON32 |
12e3280b YL |
1502 | select LEDS_GPIO_REGISTER |
1503 | help | |
1504 | The Loongson 1C is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1505 | Release 1 instruction set and part of the MIPS32 Release 2 |
1506 | instruction set. | |
12e3280b | 1507 | |
6e760c8d RB |
1508 | config CPU_MIPS32_R1 |
1509 | bool "MIPS32 Release 1" | |
7cf8053b | 1510 | depends on SYS_HAS_CPU_MIPS32_R1 |
6e760c8d | 1511 | select CPU_HAS_PREFETCH |
797798c1 | 1512 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1513 | select CPU_SUPPORTS_HIGHMEM |
1e5f1caa | 1514 | help |
5e83d430 | 1515 | Choose this option to build a kernel for release 1 or later of the |
1e5f1caa RB |
1516 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1517 | MIPS processor are based on a MIPS32 processor. If you know the | |
1518 | specific type of processor in your system, choose those that one | |
1519 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1520 | Release 2 of the MIPS32 architecture is available since several | |
1521 | years so chances are you even have a MIPS32 Release 2 processor | |
1522 | in which case you should choose CPU_MIPS32_R2 instead for better | |
1523 | performance. | |
1524 | ||
1525 | config CPU_MIPS32_R2 | |
1526 | bool "MIPS32 Release 2" | |
7cf8053b | 1527 | depends on SYS_HAS_CPU_MIPS32_R2 |
1e5f1caa | 1528 | select CPU_HAS_PREFETCH |
797798c1 | 1529 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1530 | select CPU_SUPPORTS_HIGHMEM |
a5e9a69e | 1531 | select CPU_SUPPORTS_MSA |
2235a54d | 1532 | select HAVE_KVM |
6e760c8d | 1533 | help |
5e83d430 | 1534 | Choose this option to build a kernel for release 2 or later of the |
6e760c8d RB |
1535 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1536 | MIPS processor are based on a MIPS32 processor. If you know the | |
1537 | specific type of processor in your system, choose those that one | |
1538 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1539 | ||
ab7c01fd SS |
1540 | config CPU_MIPS32_R5 |
1541 | bool "MIPS32 Release 5" | |
1542 | depends on SYS_HAS_CPU_MIPS32_R5 | |
1543 | select CPU_HAS_PREFETCH | |
1544 | select CPU_SUPPORTS_32BIT_KERNEL | |
1545 | select CPU_SUPPORTS_HIGHMEM | |
1546 | select CPU_SUPPORTS_MSA | |
1547 | select HAVE_KVM | |
1548 | select MIPS_O32_FP64_SUPPORT | |
1549 | help | |
1550 | Choose this option to build a kernel for release 5 or later of the | |
1551 | MIPS32 architecture. New MIPS processors, starting with the Warrior | |
1552 | family, are based on a MIPS32r5 processor. If you own an older | |
1553 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. | |
1554 | ||
7fd08ca5 | 1555 | config CPU_MIPS32_R6 |
674d10e2 | 1556 | bool "MIPS32 Release 6" |
7fd08ca5 LY |
1557 | depends on SYS_HAS_CPU_MIPS32_R6 |
1558 | select CPU_HAS_PREFETCH | |
18d84e2e | 1559 | select CPU_NO_LOAD_STORE_LR |
7fd08ca5 LY |
1560 | select CPU_SUPPORTS_32BIT_KERNEL |
1561 | select CPU_SUPPORTS_HIGHMEM | |
1562 | select CPU_SUPPORTS_MSA | |
1563 | select HAVE_KVM | |
1564 | select MIPS_O32_FP64_SUPPORT | |
1565 | help | |
1566 | Choose this option to build a kernel for release 6 or later of the | |
1567 | MIPS32 architecture. New MIPS processors, starting with the Warrior | |
1568 | family, are based on a MIPS32r6 processor. If you own an older | |
1569 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. | |
1570 | ||
6e760c8d RB |
1571 | config CPU_MIPS64_R1 |
1572 | bool "MIPS64 Release 1" | |
7cf8053b | 1573 | depends on SYS_HAS_CPU_MIPS64_R1 |
797798c1 | 1574 | select CPU_HAS_PREFETCH |
ed5ba2fb YY |
1575 | select CPU_SUPPORTS_32BIT_KERNEL |
1576 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1577 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1578 | select CPU_SUPPORTS_HUGEPAGES |
6e760c8d RB |
1579 | help |
1580 | Choose this option to build a kernel for release 1 or later of the | |
1581 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1582 | MIPS processor are based on a MIPS64 processor. If you know the | |
1583 | specific type of processor in your system, choose those that one | |
1584 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1e5f1caa RB |
1585 | Release 2 of the MIPS64 architecture is available since several |
1586 | years so chances are you even have a MIPS64 Release 2 processor | |
1587 | in which case you should choose CPU_MIPS64_R2 instead for better | |
1588 | performance. | |
1589 | ||
1590 | config CPU_MIPS64_R2 | |
1591 | bool "MIPS64 Release 2" | |
7cf8053b | 1592 | depends on SYS_HAS_CPU_MIPS64_R2 |
797798c1 | 1593 | select CPU_HAS_PREFETCH |
1e5f1caa RB |
1594 | select CPU_SUPPORTS_32BIT_KERNEL |
1595 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1596 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1597 | select CPU_SUPPORTS_HUGEPAGES |
a5e9a69e | 1598 | select CPU_SUPPORTS_MSA |
40a2df49 | 1599 | select HAVE_KVM |
1e5f1caa RB |
1600 | help |
1601 | Choose this option to build a kernel for release 2 or later of the | |
1602 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1603 | MIPS processor are based on a MIPS64 processor. If you know the | |
1604 | specific type of processor in your system, choose those that one | |
1605 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1da177e4 | 1606 | |
ab7c01fd SS |
1607 | config CPU_MIPS64_R5 |
1608 | bool "MIPS64 Release 5" | |
1609 | depends on SYS_HAS_CPU_MIPS64_R5 | |
1610 | select CPU_HAS_PREFETCH | |
1611 | select CPU_SUPPORTS_32BIT_KERNEL | |
1612 | select CPU_SUPPORTS_64BIT_KERNEL | |
1613 | select CPU_SUPPORTS_HIGHMEM | |
1614 | select CPU_SUPPORTS_HUGEPAGES | |
1615 | select CPU_SUPPORTS_MSA | |
1616 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 | |
1617 | select HAVE_KVM | |
1618 | help | |
1619 | Choose this option to build a kernel for release 5 or later of the | |
1620 | MIPS64 architecture. This is a intermediate MIPS architecture | |
1621 | release partly implementing release 6 features. Though there is no | |
1622 | any hardware known to be based on this release. | |
1623 | ||
7fd08ca5 | 1624 | config CPU_MIPS64_R6 |
674d10e2 | 1625 | bool "MIPS64 Release 6" |
7fd08ca5 LY |
1626 | depends on SYS_HAS_CPU_MIPS64_R6 |
1627 | select CPU_HAS_PREFETCH | |
18d84e2e | 1628 | select CPU_NO_LOAD_STORE_LR |
7fd08ca5 LY |
1629 | select CPU_SUPPORTS_32BIT_KERNEL |
1630 | select CPU_SUPPORTS_64BIT_KERNEL | |
1631 | select CPU_SUPPORTS_HIGHMEM | |
afd375dc | 1632 | select CPU_SUPPORTS_HUGEPAGES |
7fd08ca5 | 1633 | select CPU_SUPPORTS_MSA |
2e6c7747 | 1634 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
40a2df49 | 1635 | select HAVE_KVM |
7fd08ca5 LY |
1636 | help |
1637 | Choose this option to build a kernel for release 6 or later of the | |
1638 | MIPS64 architecture. New MIPS processors, starting with the Warrior | |
1639 | family, are based on a MIPS64r6 processor. If you own an older | |
1640 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. | |
1641 | ||
281e3aea SS |
1642 | config CPU_P5600 |
1643 | bool "MIPS Warrior P5600" | |
1644 | depends on SYS_HAS_CPU_P5600 | |
1645 | select CPU_HAS_PREFETCH | |
1646 | select CPU_SUPPORTS_32BIT_KERNEL | |
1647 | select CPU_SUPPORTS_HIGHMEM | |
1648 | select CPU_SUPPORTS_MSA | |
281e3aea SS |
1649 | select CPU_SUPPORTS_CPUFREQ |
1650 | select CPU_MIPSR2_IRQ_VI | |
1651 | select CPU_MIPSR2_IRQ_EI | |
1652 | select HAVE_KVM | |
1653 | select MIPS_O32_FP64_SUPPORT | |
1654 | help | |
1655 | Choose this option to build a kernel for MIPS Warrior P5600 CPU. | |
1656 | It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes, | |
1657 | MMU with two-levels TLB, UCA, MSA, MDU core level features and system | |
1658 | level features like up to six P5600 calculation cores, CM2 with L2 | |
1659 | cache, IOCU/IOMMU (though might be unused depending on the system- | |
1660 | specific IP core configuration), GIC, CPC, virtualisation module, | |
1661 | eJTAG and PDtrace. | |
1662 | ||
1da177e4 LT |
1663 | config CPU_R3000 |
1664 | bool "R3000" | |
7cf8053b | 1665 | depends on SYS_HAS_CPU_R3000 |
f7062ddb | 1666 | select CPU_HAS_WB |
54746829 | 1667 | select CPU_R3K_TLB |
ed5ba2fb | 1668 | select CPU_SUPPORTS_32BIT_KERNEL |
797798c1 | 1669 | select CPU_SUPPORTS_HIGHMEM |
1da177e4 LT |
1670 | help |
1671 | Please make sure to pick the right CPU type. Linux/MIPS is not | |
1672 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will | |
1673 | *not* work on R4000 machines and vice versa. However, since most | |
1674 | of the supported machines have an R4000 (or similar) CPU, R4x00 | |
1675 | might be a safe bet. If the resulting kernel does not work, | |
1676 | try to recompile with R3000. | |
1677 | ||
1678 | config CPU_TX39XX | |
1679 | bool "R39XX" | |
7cf8053b | 1680 | depends on SYS_HAS_CPU_TX39XX |
ed5ba2fb | 1681 | select CPU_SUPPORTS_32BIT_KERNEL |
54746829 | 1682 | select CPU_R3K_TLB |
1da177e4 LT |
1683 | |
1684 | config CPU_VR41XX | |
1685 | bool "R41xx" | |
7cf8053b | 1686 | depends on SYS_HAS_CPU_VR41XX |
ed5ba2fb YY |
1687 | select CPU_SUPPORTS_32BIT_KERNEL |
1688 | select CPU_SUPPORTS_64BIT_KERNEL | |
1da177e4 | 1689 | help |
5e83d430 | 1690 | The options selects support for the NEC VR4100 series of processors. |
1da177e4 LT |
1691 | Only choose this option if you have one of these processors as a |
1692 | kernel built with this option will not run on any other type of | |
1693 | processor or vice versa. | |
1694 | ||
65ce6197 LK |
1695 | config CPU_R4300 |
1696 | bool "R4300" | |
1697 | depends on SYS_HAS_CPU_R4300 | |
1698 | select CPU_SUPPORTS_32BIT_KERNEL | |
1699 | select CPU_SUPPORTS_64BIT_KERNEL | |
1700 | select CPU_HAS_LOAD_STORE_LR | |
1701 | help | |
1702 | MIPS Technologies R4300-series processors. | |
1703 | ||
1da177e4 LT |
1704 | config CPU_R4X00 |
1705 | bool "R4x00" | |
7cf8053b | 1706 | depends on SYS_HAS_CPU_R4X00 |
ed5ba2fb YY |
1707 | select CPU_SUPPORTS_32BIT_KERNEL |
1708 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1709 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1710 | help |
1711 | MIPS Technologies R4000-series processors other than 4300, including | |
1712 | the R4000, R4400, R4600, and 4700. | |
1713 | ||
1714 | config CPU_TX49XX | |
1715 | bool "R49XX" | |
7cf8053b | 1716 | depends on SYS_HAS_CPU_TX49XX |
de862b48 | 1717 | select CPU_HAS_PREFETCH |
ed5ba2fb YY |
1718 | select CPU_SUPPORTS_32BIT_KERNEL |
1719 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1720 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1721 | |
1722 | config CPU_R5000 | |
1723 | bool "R5000" | |
7cf8053b | 1724 | depends on SYS_HAS_CPU_R5000 |
ed5ba2fb YY |
1725 | select CPU_SUPPORTS_32BIT_KERNEL |
1726 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1727 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1728 | help |
1729 | MIPS Technologies R5000-series processors other than the Nevada. | |
1730 | ||
542c1020 SK |
1731 | config CPU_R5500 |
1732 | bool "R5500" | |
1733 | depends on SYS_HAS_CPU_R5500 | |
542c1020 SK |
1734 | select CPU_SUPPORTS_32BIT_KERNEL |
1735 | select CPU_SUPPORTS_64BIT_KERNEL | |
9cffd154 | 1736 | select CPU_SUPPORTS_HUGEPAGES |
542c1020 SK |
1737 | help |
1738 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV | |
1739 | instruction set. | |
1740 | ||
1da177e4 LT |
1741 | config CPU_NEVADA |
1742 | bool "RM52xx" | |
7cf8053b | 1743 | depends on SYS_HAS_CPU_NEVADA |
ed5ba2fb YY |
1744 | select CPU_SUPPORTS_32BIT_KERNEL |
1745 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1746 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1747 | help |
1748 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. | |
1749 | ||
1da177e4 LT |
1750 | config CPU_R10000 |
1751 | bool "R10000" | |
7cf8053b | 1752 | depends on SYS_HAS_CPU_R10000 |
5e83d430 | 1753 | select CPU_HAS_PREFETCH |
ed5ba2fb YY |
1754 | select CPU_SUPPORTS_32BIT_KERNEL |
1755 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1756 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1757 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1758 | help |
1759 | MIPS Technologies R10000-series processors. | |
1760 | ||
1761 | config CPU_RM7000 | |
1762 | bool "RM7000" | |
7cf8053b | 1763 | depends on SYS_HAS_CPU_RM7000 |
5e83d430 | 1764 | select CPU_HAS_PREFETCH |
ed5ba2fb YY |
1765 | select CPU_SUPPORTS_32BIT_KERNEL |
1766 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1767 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1768 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1769 | |
1770 | config CPU_SB1 | |
1771 | bool "SB1" | |
7cf8053b | 1772 | depends on SYS_HAS_CPU_SB1 |
ed5ba2fb YY |
1773 | select CPU_SUPPORTS_32BIT_KERNEL |
1774 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1775 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1776 | select CPU_SUPPORTS_HUGEPAGES |
0004a9df | 1777 | select WEAK_ORDERING |
1da177e4 | 1778 | |
a86c7f72 DD |
1779 | config CPU_CAVIUM_OCTEON |
1780 | bool "Cavium Octeon processor" | |
5e683389 | 1781 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
a86c7f72 DD |
1782 | select CPU_HAS_PREFETCH |
1783 | select CPU_SUPPORTS_64BIT_KERNEL | |
a86c7f72 | 1784 | select WEAK_ORDERING |
a86c7f72 | 1785 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1786 | select CPU_SUPPORTS_HUGEPAGES |
df115f3e BH |
1787 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
1788 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
930beb5a | 1789 | select MIPS_L1_CACHE_SHIFT_7 |
0ae3abcd | 1790 | select HAVE_KVM |
a86c7f72 DD |
1791 | help |
1792 | The Cavium Octeon processor is a highly integrated chip containing | |
1793 | many ethernet hardware widgets for networking tasks. The processor | |
1794 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. | |
1795 | Full details can be found at http://www.caviumnetworks.com. | |
1796 | ||
cd746249 JG |
1797 | config CPU_BMIPS |
1798 | bool "Broadcom BMIPS" | |
1799 | depends on SYS_HAS_CPU_BMIPS | |
1800 | select CPU_MIPS32 | |
fe7f62c0 | 1801 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
cd746249 JG |
1802 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
1803 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 | |
1804 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 | |
1805 | select CPU_SUPPORTS_32BIT_KERNEL | |
1806 | select DMA_NONCOHERENT | |
67e38cf2 | 1807 | select IRQ_MIPS_CPU |
cd746249 JG |
1808 | select SWAP_IO_SPACE |
1809 | select WEAK_ORDERING | |
c1c0c461 | 1810 | select CPU_SUPPORTS_HIGHMEM |
69aaf9c8 | 1811 | select CPU_HAS_PREFETCH |
a8d709b0 MM |
1812 | select CPU_SUPPORTS_CPUFREQ |
1813 | select MIPS_EXTERNAL_TIMER | |
c1c0c461 | 1814 | help |
fe7f62c0 | 1815 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
c1c0c461 | 1816 | |
7f058e85 J |
1817 | config CPU_XLR |
1818 | bool "Netlogic XLR SoC" | |
1819 | depends on SYS_HAS_CPU_XLR | |
1820 | select CPU_SUPPORTS_32BIT_KERNEL | |
1821 | select CPU_SUPPORTS_64BIT_KERNEL | |
1822 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1823 | select CPU_SUPPORTS_HUGEPAGES |
7f058e85 J |
1824 | select WEAK_ORDERING |
1825 | select WEAK_REORDERING_BEYOND_LLSC | |
7f058e85 J |
1826 | help |
1827 | Netlogic Microsystems XLR/XLS processors. | |
1c773ea4 J |
1828 | |
1829 | config CPU_XLP | |
1830 | bool "Netlogic XLP SoC" | |
1831 | depends on SYS_HAS_CPU_XLP | |
1832 | select CPU_SUPPORTS_32BIT_KERNEL | |
1833 | select CPU_SUPPORTS_64BIT_KERNEL | |
1834 | select CPU_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1835 | select WEAK_ORDERING |
1836 | select WEAK_REORDERING_BEYOND_LLSC | |
1837 | select CPU_HAS_PREFETCH | |
d6504846 | 1838 | select CPU_MIPSR2 |
ddba6833 | 1839 | select CPU_SUPPORTS_HUGEPAGES |
2db003a5 | 1840 | select MIPS_ASID_BITS_VARIABLE |
1c773ea4 J |
1841 | help |
1842 | Netlogic Microsystems XLP processors. | |
1da177e4 LT |
1843 | endchoice |
1844 | ||
a6e18781 LY |
1845 | config CPU_MIPS32_3_5_FEATURES |
1846 | bool "MIPS32 Release 3.5 Features" | |
1847 | depends on SYS_HAS_CPU_MIPS32_R3_5 | |
281e3aea SS |
1848 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \ |
1849 | CPU_P5600 | |
a6e18781 LY |
1850 | help |
1851 | Choose this option to build a kernel for release 2 or later of the | |
1852 | MIPS32 architecture including features from the 3.5 release such as | |
1853 | support for Enhanced Virtual Addressing (EVA). | |
1854 | ||
1855 | config CPU_MIPS32_3_5_EVA | |
1856 | bool "Enhanced Virtual Addressing (EVA)" | |
1857 | depends on CPU_MIPS32_3_5_FEATURES | |
1858 | select EVA | |
1859 | default y | |
1860 | help | |
1861 | Choose this option if you want to enable the Enhanced Virtual | |
1862 | Addressing (EVA) on your MIPS32 core (such as proAptiv). | |
1863 | One of its primary benefits is an increase in the maximum size | |
1864 | of lowmem (up to 3GB). If unsure, say 'N' here. | |
1865 | ||
c5b36783 SH |
1866 | config CPU_MIPS32_R5_FEATURES |
1867 | bool "MIPS32 Release 5 Features" | |
1868 | depends on SYS_HAS_CPU_MIPS32_R5 | |
281e3aea | 1869 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600 |
c5b36783 SH |
1870 | help |
1871 | Choose this option to build a kernel for release 2 or later of the | |
1872 | MIPS32 architecture including features from release 5 such as | |
1873 | support for Extended Physical Addressing (XPA). | |
1874 | ||
1875 | config CPU_MIPS32_R5_XPA | |
1876 | bool "Extended Physical Addressing (XPA)" | |
1877 | depends on CPU_MIPS32_R5_FEATURES | |
1878 | depends on !EVA | |
1879 | depends on !PAGE_SIZE_4KB | |
1880 | depends on SYS_SUPPORTS_HIGHMEM | |
1881 | select XPA | |
1882 | select HIGHMEM | |
d4a451d5 | 1883 | select PHYS_ADDR_T_64BIT |
c5b36783 SH |
1884 | default n |
1885 | help | |
1886 | Choose this option if you want to enable the Extended Physical | |
1887 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The | |
1888 | benefit is to increase physical addressing equal to or greater | |
1889 | than 40 bits. Note that this has the side effect of turning on | |
1890 | 64-bit addressing which in turn makes the PTEs 64-bit in size. | |
1891 | If unsure, say 'N' here. | |
1892 | ||
622844bf WZ |
1893 | if CPU_LOONGSON2F |
1894 | config CPU_NOP_WORKAROUNDS | |
1895 | bool | |
1896 | ||
1897 | config CPU_JUMP_WORKAROUNDS | |
1898 | bool | |
1899 | ||
1900 | config CPU_LOONGSON2F_WORKAROUNDS | |
1901 | bool "Loongson 2F Workarounds" | |
1902 | default y | |
1903 | select CPU_NOP_WORKAROUNDS | |
1904 | select CPU_JUMP_WORKAROUNDS | |
1905 | help | |
1906 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which | |
1907 | require workarounds. Without workarounds the system may hang | |
1908 | unexpectedly. For more information please refer to the gas | |
1909 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. | |
1910 | ||
1911 | Loongson 2F03 and later have fixed these issues and no workarounds | |
1912 | are needed. The workarounds have no significant side effect on them | |
1913 | but may decrease the performance of the system so this option should | |
1914 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 | |
1915 | systems. | |
1916 | ||
1917 | If unsure, please say Y. | |
1918 | endif # CPU_LOONGSON2F | |
1919 | ||
1b93b3c3 WZ |
1920 | config SYS_SUPPORTS_ZBOOT |
1921 | bool | |
1922 | select HAVE_KERNEL_GZIP | |
1923 | select HAVE_KERNEL_BZIP2 | |
31c4867d | 1924 | select HAVE_KERNEL_LZ4 |
1b93b3c3 | 1925 | select HAVE_KERNEL_LZMA |
fe1d45e0 | 1926 | select HAVE_KERNEL_LZO |
4e23eb63 | 1927 | select HAVE_KERNEL_XZ |
a510b616 | 1928 | select HAVE_KERNEL_ZSTD |
1b93b3c3 WZ |
1929 | |
1930 | config SYS_SUPPORTS_ZBOOT_UART16550 | |
1931 | bool | |
1932 | select SYS_SUPPORTS_ZBOOT | |
1933 | ||
dbb98314 AB |
1934 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
1935 | bool | |
1936 | select SYS_SUPPORTS_ZBOOT | |
1937 | ||
268a2d60 | 1938 | config CPU_LOONGSON2EF |
3702bba5 WZ |
1939 | bool |
1940 | select CPU_SUPPORTS_32BIT_KERNEL | |
1941 | select CPU_SUPPORTS_64BIT_KERNEL | |
1942 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1943 | select CPU_SUPPORTS_HUGEPAGES |
e905086e | 1944 | select ARCH_HAS_PHYS_TO_DMA |
3702bba5 | 1945 | |
b2afb64c | 1946 | config CPU_LOONGSON32 |
ca585cf9 KC |
1947 | bool |
1948 | select CPU_MIPS32 | |
7e280f6b | 1949 | select CPU_MIPSR2 |
ca585cf9 KC |
1950 | select CPU_HAS_PREFETCH |
1951 | select CPU_SUPPORTS_32BIT_KERNEL | |
1952 | select CPU_SUPPORTS_HIGHMEM | |
f29ad10d | 1953 | select CPU_SUPPORTS_CPUFREQ |
ca585cf9 | 1954 | |
fe7f62c0 | 1955 | config CPU_BMIPS32_3300 |
04fa8bf7 | 1956 | select SMP_UP if SMP |
1bbb6c1b | 1957 | bool |
cd746249 JG |
1958 | |
1959 | config CPU_BMIPS4350 | |
1960 | bool | |
1961 | select SYS_SUPPORTS_SMP | |
1962 | select SYS_SUPPORTS_HOTPLUG_CPU | |
1963 | ||
1964 | config CPU_BMIPS4380 | |
1965 | bool | |
bbf2ba67 | 1966 | select MIPS_L1_CACHE_SHIFT_6 |
cd746249 JG |
1967 | select SYS_SUPPORTS_SMP |
1968 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1969 | select CPU_HAS_RIXI |
cd746249 JG |
1970 | |
1971 | config CPU_BMIPS5000 | |
1972 | bool | |
cd746249 | 1973 | select MIPS_CPU_SCACHE |
bbf2ba67 | 1974 | select MIPS_L1_CACHE_SHIFT_7 |
cd746249 JG |
1975 | select SYS_SUPPORTS_SMP |
1976 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1977 | select CPU_HAS_RIXI |
1bbb6c1b | 1978 | |
268a2d60 | 1979 | config SYS_HAS_CPU_LOONGSON64 |
0e476d91 HC |
1980 | bool |
1981 | select CPU_SUPPORTS_CPUFREQ | |
b2edcfc8 | 1982 | select CPU_HAS_RIXI |
0e476d91 | 1983 | |
3702bba5 | 1984 | config SYS_HAS_CPU_LOONGSON2E |
2a21c730 FZ |
1985 | bool |
1986 | ||
6f7a251a WZ |
1987 | config SYS_HAS_CPU_LOONGSON2F |
1988 | bool | |
55045ff5 WZ |
1989 | select CPU_SUPPORTS_CPUFREQ |
1990 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT | |
6f7a251a | 1991 | |
ca585cf9 KC |
1992 | config SYS_HAS_CPU_LOONGSON1B |
1993 | bool | |
1994 | ||
12e3280b YL |
1995 | config SYS_HAS_CPU_LOONGSON1C |
1996 | bool | |
1997 | ||
7cf8053b RB |
1998 | config SYS_HAS_CPU_MIPS32_R1 |
1999 | bool | |
2000 | ||
2001 | config SYS_HAS_CPU_MIPS32_R2 | |
2002 | bool | |
2003 | ||
a6e18781 LY |
2004 | config SYS_HAS_CPU_MIPS32_R3_5 |
2005 | bool | |
2006 | ||
c5b36783 SH |
2007 | config SYS_HAS_CPU_MIPS32_R5 |
2008 | bool | |
9ae1f262 | 2009 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
c5b36783 | 2010 | |
7fd08ca5 LY |
2011 | config SYS_HAS_CPU_MIPS32_R6 |
2012 | bool | |
9ae1f262 | 2013 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 2014 | |
7cf8053b RB |
2015 | config SYS_HAS_CPU_MIPS64_R1 |
2016 | bool | |
2017 | ||
2018 | config SYS_HAS_CPU_MIPS64_R2 | |
2019 | bool | |
2020 | ||
7fd08ca5 LY |
2021 | config SYS_HAS_CPU_MIPS64_R6 |
2022 | bool | |
9ae1f262 | 2023 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 2024 | |
281e3aea SS |
2025 | config SYS_HAS_CPU_P5600 |
2026 | bool | |
2027 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT | |
2028 | ||
7cf8053b RB |
2029 | config SYS_HAS_CPU_R3000 |
2030 | bool | |
2031 | ||
2032 | config SYS_HAS_CPU_TX39XX | |
2033 | bool | |
2034 | ||
2035 | config SYS_HAS_CPU_VR41XX | |
2036 | bool | |
2037 | ||
65ce6197 LK |
2038 | config SYS_HAS_CPU_R4300 |
2039 | bool | |
2040 | ||
7cf8053b RB |
2041 | config SYS_HAS_CPU_R4X00 |
2042 | bool | |
2043 | ||
2044 | config SYS_HAS_CPU_TX49XX | |
2045 | bool | |
2046 | ||
2047 | config SYS_HAS_CPU_R5000 | |
2048 | bool | |
2049 | ||
542c1020 SK |
2050 | config SYS_HAS_CPU_R5500 |
2051 | bool | |
2052 | ||
7cf8053b RB |
2053 | config SYS_HAS_CPU_NEVADA |
2054 | bool | |
2055 | ||
7cf8053b RB |
2056 | config SYS_HAS_CPU_R10000 |
2057 | bool | |
9ae1f262 | 2058 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7cf8053b RB |
2059 | |
2060 | config SYS_HAS_CPU_RM7000 | |
2061 | bool | |
2062 | ||
7cf8053b RB |
2063 | config SYS_HAS_CPU_SB1 |
2064 | bool | |
2065 | ||
5e683389 DD |
2066 | config SYS_HAS_CPU_CAVIUM_OCTEON |
2067 | bool | |
2068 | ||
cd746249 | 2069 | config SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2070 | bool |
2071 | ||
fe7f62c0 | 2072 | config SYS_HAS_CPU_BMIPS32_3300 |
c1c0c461 | 2073 | bool |
cd746249 | 2074 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2075 | |
2076 | config SYS_HAS_CPU_BMIPS4350 | |
2077 | bool | |
cd746249 | 2078 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2079 | |
2080 | config SYS_HAS_CPU_BMIPS4380 | |
2081 | bool | |
cd746249 | 2082 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2083 | |
2084 | config SYS_HAS_CPU_BMIPS5000 | |
2085 | bool | |
cd746249 | 2086 | select SYS_HAS_CPU_BMIPS |
f263f2a2 | 2087 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
c1c0c461 | 2088 | |
7f058e85 J |
2089 | config SYS_HAS_CPU_XLR |
2090 | bool | |
2091 | ||
1c773ea4 J |
2092 | config SYS_HAS_CPU_XLP |
2093 | bool | |
2094 | ||
17099b11 RB |
2095 | # |
2096 | # CPU may reorder R->R, R->W, W->R, W->W | |
2097 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC | |
2098 | # | |
0004a9df RB |
2099 | config WEAK_ORDERING |
2100 | bool | |
17099b11 RB |
2101 | |
2102 | # | |
2103 | # CPU may reorder reads and writes beyond LL/SC | |
2104 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC | |
2105 | # | |
2106 | config WEAK_REORDERING_BEYOND_LLSC | |
2107 | bool | |
5e83d430 RB |
2108 | endmenu |
2109 | ||
2110 | # | |
c09b47d8 | 2111 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
5e83d430 RB |
2112 | # |
2113 | config CPU_MIPS32 | |
2114 | bool | |
ab7c01fd | 2115 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \ |
281e3aea | 2116 | CPU_MIPS32_R6 || CPU_P5600 |
5e83d430 RB |
2117 | |
2118 | config CPU_MIPS64 | |
2119 | bool | |
ab7c01fd SS |
2120 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \ |
2121 | CPU_MIPS64_R6 | |
5e83d430 RB |
2122 | |
2123 | # | |
57eeaced | 2124 | # These indicate the revision of the architecture |
5e83d430 RB |
2125 | # |
2126 | config CPU_MIPSR1 | |
2127 | bool | |
2128 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 | |
2129 | ||
2130 | config CPU_MIPSR2 | |
2131 | bool | |
a86c7f72 | 2132 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
8256b17e | 2133 | select CPU_HAS_RIXI |
ba9196d2 | 2134 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
a7e07b1a | 2135 | select MIPS_SPRAM |
5e83d430 | 2136 | |
ab7c01fd SS |
2137 | config CPU_MIPSR5 |
2138 | bool | |
281e3aea | 2139 | default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600 |
ab7c01fd SS |
2140 | select CPU_HAS_RIXI |
2141 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN | |
2142 | select MIPS_SPRAM | |
2143 | ||
7fd08ca5 LY |
2144 | config CPU_MIPSR6 |
2145 | bool | |
2146 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 | |
8256b17e | 2147 | select CPU_HAS_RIXI |
ba9196d2 | 2148 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
87321fdd | 2149 | select HAVE_ARCH_BITREVERSE |
2db003a5 | 2150 | select MIPS_ASID_BITS_VARIABLE |
4a5dc51e | 2151 | select MIPS_CRC_SUPPORT |
a7e07b1a | 2152 | select MIPS_SPRAM |
5e83d430 | 2153 | |
57eeaced PB |
2154 | config TARGET_ISA_REV |
2155 | int | |
2156 | default 1 if CPU_MIPSR1 | |
2157 | default 2 if CPU_MIPSR2 | |
ab7c01fd | 2158 | default 5 if CPU_MIPSR5 |
57eeaced PB |
2159 | default 6 if CPU_MIPSR6 |
2160 | default 0 | |
2161 | help | |
2162 | Reflects the ISA revision being targeted by the kernel build. This | |
2163 | is effectively the Kconfig equivalent of MIPS_ISA_REV. | |
2164 | ||
a6e18781 LY |
2165 | config EVA |
2166 | bool | |
2167 | ||
c5b36783 SH |
2168 | config XPA |
2169 | bool | |
2170 | ||
5e83d430 RB |
2171 | config SYS_SUPPORTS_32BIT_KERNEL |
2172 | bool | |
2173 | config SYS_SUPPORTS_64BIT_KERNEL | |
2174 | bool | |
2175 | config CPU_SUPPORTS_32BIT_KERNEL | |
2176 | bool | |
2177 | config CPU_SUPPORTS_64BIT_KERNEL | |
2178 | bool | |
55045ff5 WZ |
2179 | config CPU_SUPPORTS_CPUFREQ |
2180 | bool | |
2181 | config CPU_SUPPORTS_ADDRWINCFG | |
2182 | bool | |
9cffd154 DD |
2183 | config CPU_SUPPORTS_HUGEPAGES |
2184 | bool | |
171543e7 | 2185 | depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA)) |
82622284 DD |
2186 | config MIPS_PGD_C0_CONTEXT |
2187 | bool | |
cebf8c0f | 2188 | default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP |
5e83d430 | 2189 | |
8192c9ea DD |
2190 | # |
2191 | # Set to y for ptrace access to watch registers. | |
2192 | # | |
2193 | config HARDWARE_WATCHPOINTS | |
371a4151 EWI |
2194 | bool |
2195 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 | |
8192c9ea | 2196 | |
5e83d430 RB |
2197 | menu "Kernel type" |
2198 | ||
2199 | choice | |
5e83d430 RB |
2200 | prompt "Kernel code model" |
2201 | help | |
2202 | You should only select this option if you have a workload that | |
2203 | actually benefits from 64-bit processing or if your machine has | |
2204 | large memory. You will only be presented a single option in this | |
2205 | menu if your system does not support both 32-bit and 64-bit kernels. | |
2206 | ||
2207 | config 32BIT | |
2208 | bool "32-bit kernel" | |
2209 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL | |
2210 | select TRAD_SIGNALS | |
2211 | help | |
2212 | Select this option if you want to build a 32-bit kernel. | |
f17c4ca3 | 2213 | |
5e83d430 RB |
2214 | config 64BIT |
2215 | bool "64-bit kernel" | |
2216 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL | |
2217 | help | |
2218 | Select this option if you want to build a 64-bit kernel. | |
2219 | ||
2220 | endchoice | |
2221 | ||
2235a54d SL |
2222 | config KVM_GUEST |
2223 | bool "KVM Guest Kernel" | |
01edc5e7 | 2224 | depends on CPU_MIPS32_R2 |
fd624c71 | 2225 | depends on !64BIT && BROKEN_ON_SMP |
2235a54d | 2226 | help |
caa1faa7 JH |
2227 | Select this option if building a guest kernel for KVM (Trap & Emulate) |
2228 | mode. | |
2235a54d | 2229 | |
eda3d33c JH |
2230 | config KVM_GUEST_TIMER_FREQ |
2231 | int "Count/Compare Timer Frequency (MHz)" | |
2235a54d | 2232 | depends on KVM_GUEST |
eda3d33c | 2233 | default 100 |
2235a54d | 2234 | help |
eda3d33c JH |
2235 | Set this to non-zero if building a guest kernel for KVM to skip RTC |
2236 | emulation when determining guest CPU Frequency. Instead, the guest's | |
2237 | timer frequency is specified directly. | |
2235a54d | 2238 | |
1e321fa9 LY |
2239 | config MIPS_VA_BITS_48 |
2240 | bool "48 bits virtual memory" | |
2241 | depends on 64BIT | |
2242 | help | |
3377e227 AB |
2243 | Support a maximum at least 48 bits of application virtual |
2244 | memory. Default is 40 bits or less, depending on the CPU. | |
2245 | For page sizes 16k and above, this option results in a small | |
2246 | memory overhead for page tables. For 4k page size, a fourth | |
2247 | level of page tables is added which imposes both a memory | |
2248 | overhead as well as slower TLB fault handling. | |
2249 | ||
1e321fa9 LY |
2250 | If unsure, say N. |
2251 | ||
1da177e4 LT |
2252 | choice |
2253 | prompt "Kernel page size" | |
2254 | default PAGE_SIZE_4KB | |
2255 | ||
2256 | config PAGE_SIZE_4KB | |
2257 | bool "4kB" | |
268a2d60 | 2258 | depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64 |
1da177e4 | 2259 | help |
371a4151 EWI |
2260 | This option select the standard 4kB Linux page size. On some |
2261 | R3000-family processors this is the only available page size. Using | |
2262 | 4kB page size will minimize memory consumption and is therefore | |
2263 | recommended for low memory systems. | |
1da177e4 LT |
2264 | |
2265 | config PAGE_SIZE_8KB | |
2266 | bool "8kB" | |
c2aeaaea | 2267 | depends on CPU_CAVIUM_OCTEON |
1e321fa9 | 2268 | depends on !MIPS_VA_BITS_48 |
1da177e4 LT |
2269 | help |
2270 | Using 8kB page size will result in higher performance kernel at | |
2271 | the price of higher memory consumption. This option is available | |
c2aeaaea PB |
2272 | only on cnMIPS processors. Note that you will need a suitable Linux |
2273 | distribution to support this. | |
1da177e4 LT |
2274 | |
2275 | config PAGE_SIZE_16KB | |
2276 | bool "16kB" | |
714bfad6 | 2277 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2278 | help |
2279 | Using 16kB page size will result in higher performance kernel at | |
2280 | the price of higher memory consumption. This option is available on | |
714bfad6 RB |
2281 | all non-R3000 family processors. Note that you will need a suitable |
2282 | Linux distribution to support this. | |
1da177e4 | 2283 | |
c52399be RB |
2284 | config PAGE_SIZE_32KB |
2285 | bool "32kB" | |
2286 | depends on CPU_CAVIUM_OCTEON | |
1e321fa9 | 2287 | depends on !MIPS_VA_BITS_48 |
c52399be RB |
2288 | help |
2289 | Using 32kB page size will result in higher performance kernel at | |
2290 | the price of higher memory consumption. This option is available | |
2291 | only on cnMIPS cores. Note that you will need a suitable Linux | |
2292 | distribution to support this. | |
2293 | ||
1da177e4 LT |
2294 | config PAGE_SIZE_64KB |
2295 | bool "64kB" | |
3b2db173 | 2296 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2297 | help |
2298 | Using 64kB page size will result in higher performance kernel at | |
2299 | the price of higher memory consumption. This option is available on | |
2300 | all non-R3000 family processor. Not that at the time of this | |
714bfad6 | 2301 | writing this option is still high experimental. |
1da177e4 LT |
2302 | |
2303 | endchoice | |
2304 | ||
c9bace7c DD |
2305 | config FORCE_MAX_ZONEORDER |
2306 | int "Maximum zone order" | |
e4362d1e AS |
2307 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
2308 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB | |
2309 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2310 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2311 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
2312 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
ef923a76 | 2313 | range 0 64 |
c9bace7c DD |
2314 | default "11" |
2315 | help | |
2316 | The kernel memory allocator divides physically contiguous memory | |
2317 | blocks into "zones", where each zone is a power of two number of | |
2318 | pages. This option selects the largest power of two that the kernel | |
2319 | keeps in the memory allocator. If you need to allocate very large | |
2320 | blocks of physically contiguous memory, then you may need to | |
2321 | increase this value. | |
2322 | ||
2323 | This config option is actually maximum order plus one. For example, | |
2324 | a value of 11 means that the largest free memory block is 2^10 pages. | |
2325 | ||
2326 | The page size is not necessarily 4KB. Keep this in mind | |
2327 | when choosing a value for this option. | |
2328 | ||
1da177e4 LT |
2329 | config BOARD_SCACHE |
2330 | bool | |
2331 | ||
2332 | config IP22_CPU_SCACHE | |
2333 | bool | |
2334 | select BOARD_SCACHE | |
2335 | ||
9318c51a CD |
2336 | # |
2337 | # Support for a MIPS32 / MIPS64 style S-caches | |
2338 | # | |
2339 | config MIPS_CPU_SCACHE | |
2340 | bool | |
2341 | select BOARD_SCACHE | |
2342 | ||
1da177e4 LT |
2343 | config R5000_CPU_SCACHE |
2344 | bool | |
2345 | select BOARD_SCACHE | |
2346 | ||
2347 | config RM7000_CPU_SCACHE | |
2348 | bool | |
2349 | select BOARD_SCACHE | |
2350 | ||
2351 | config SIBYTE_DMA_PAGEOPS | |
2352 | bool "Use DMA to clear/copy pages" | |
2353 | depends on CPU_SB1 | |
2354 | help | |
2355 | Instead of using the CPU to zero and copy pages, use a Data Mover | |
2356 | channel. These DMA channels are otherwise unused by the standard | |
2357 | SiByte Linux port. Seems to give a small performance benefit. | |
2358 | ||
2359 | config CPU_HAS_PREFETCH | |
c8094b53 | 2360 | bool |
1da177e4 | 2361 | |
3165c846 FF |
2362 | config CPU_GENERIC_DUMP_TLB |
2363 | bool | |
c2aeaaea | 2364 | default y if !(CPU_R3000 || CPU_TX39XX) |
3165c846 | 2365 | |
c92e47e5 | 2366 | config MIPS_FP_SUPPORT |
183b40f9 PB |
2367 | bool "Floating Point support" if EXPERT |
2368 | default y | |
2369 | help | |
2370 | Select y to include support for floating point in the kernel | |
2371 | including initialization of FPU hardware, FP context save & restore | |
2372 | and emulation of an FPU where necessary. Without this support any | |
2373 | userland program attempting to use floating point instructions will | |
2374 | receive a SIGILL. | |
2375 | ||
2376 | If you know that your userland will not attempt to use floating point | |
2377 | instructions then you can say n here to shrink the kernel a little. | |
2378 | ||
2379 | If unsure, say y. | |
c92e47e5 | 2380 | |
97f7dcbf PB |
2381 | config CPU_R2300_FPU |
2382 | bool | |
c92e47e5 | 2383 | depends on MIPS_FP_SUPPORT |
97f7dcbf PB |
2384 | default y if CPU_R3000 || CPU_TX39XX |
2385 | ||
54746829 PB |
2386 | config CPU_R3K_TLB |
2387 | bool | |
2388 | ||
91405eb6 FF |
2389 | config CPU_R4K_FPU |
2390 | bool | |
c92e47e5 | 2391 | depends on MIPS_FP_SUPPORT |
97f7dcbf | 2392 | default y if !CPU_R2300_FPU |
91405eb6 | 2393 | |
62cedc4f FF |
2394 | config CPU_R4K_CACHE_TLB |
2395 | bool | |
54746829 | 2396 | default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) |
62cedc4f | 2397 | |
59d6ab86 | 2398 | config MIPS_MT_SMP |
a92b7f87 | 2399 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
5cbf9688 | 2400 | default y |
527f1028 | 2401 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS |
f7062ddb | 2402 | select CPU_MIPSR2_IRQ_VI |
d725cf38 | 2403 | select CPU_MIPSR2_IRQ_EI |
c080faa5 | 2404 | select SYNC_R4K |
f41ae0b2 | 2405 | select MIPS_MT |
41c594ab | 2406 | select SMP |
87353d8a | 2407 | select SMP_UP |
c080faa5 SH |
2408 | select SYS_SUPPORTS_SMP |
2409 | select SYS_SUPPORTS_SCHED_SMT | |
399aaa25 | 2410 | select MIPS_PERF_SHARED_TC_COUNTERS |
f41ae0b2 | 2411 | help |
c080faa5 SH |
2412 | This is a kernel model which is known as SMVP. This is supported |
2413 | on cores with the MT ASE and uses the available VPEs to implement | |
2414 | virtual processors which supports SMP. This is equivalent to the | |
2415 | Intel Hyperthreading feature. For further information go to | |
2416 | <http://www.imgtec.com/mips/mips-multithreading.asp>. | |
41c594ab | 2417 | |
f41ae0b2 RB |
2418 | config MIPS_MT |
2419 | bool | |
2420 | ||
0ab7aefc RB |
2421 | config SCHED_SMT |
2422 | bool "SMT (multithreading) scheduler support" | |
2423 | depends on SYS_SUPPORTS_SCHED_SMT | |
2424 | default n | |
2425 | help | |
2426 | SMT scheduler support improves the CPU scheduler's decision making | |
2427 | when dealing with MIPS MT enabled cores at a cost of slightly | |
2428 | increased overhead in some places. If unsure say N here. | |
2429 | ||
2430 | config SYS_SUPPORTS_SCHED_SMT | |
2431 | bool | |
2432 | ||
f41ae0b2 RB |
2433 | config SYS_SUPPORTS_MULTITHREADING |
2434 | bool | |
2435 | ||
f088fc84 RB |
2436 | config MIPS_MT_FPAFF |
2437 | bool "Dynamic FPU affinity for FP-intensive threads" | |
f088fc84 | 2438 | default y |
b633648c | 2439 | depends on MIPS_MT_SMP |
07cc0c9e | 2440 | |
b0a668fb LY |
2441 | config MIPSR2_TO_R6_EMULATOR |
2442 | bool "MIPS R2-to-R6 emulator" | |
9eaa9a82 | 2443 | depends on CPU_MIPSR6 |
c92e47e5 | 2444 | depends on MIPS_FP_SUPPORT |
b0a668fb LY |
2445 | default y |
2446 | help | |
2447 | Choose this option if you want to run non-R6 MIPS userland code. | |
2448 | Even if you say 'Y' here, the emulator will still be disabled by | |
07edf0d4 | 2449 | default. You can enable it using the 'mipsr2emu' kernel option. |
b0a668fb LY |
2450 | The only reason this is a build-time option is to save ~14K from the |
2451 | final kernel image. | |
b0a668fb | 2452 | |
f35764e7 JH |
2453 | config SYS_SUPPORTS_VPE_LOADER |
2454 | bool | |
2455 | depends on SYS_SUPPORTS_MULTITHREADING | |
2456 | help | |
2457 | Indicates that the platform supports the VPE loader, and provides | |
2458 | physical_memsize. | |
2459 | ||
07cc0c9e RB |
2460 | config MIPS_VPE_LOADER |
2461 | bool "VPE loader support." | |
f35764e7 | 2462 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
07cc0c9e RB |
2463 | select CPU_MIPSR2_IRQ_VI |
2464 | select CPU_MIPSR2_IRQ_EI | |
07cc0c9e RB |
2465 | select MIPS_MT |
2466 | help | |
2467 | Includes a loader for loading an elf relocatable object | |
2468 | onto another VPE and running it. | |
f088fc84 | 2469 | |
17a1d523 DCZ |
2470 | config MIPS_VPE_LOADER_CMP |
2471 | bool | |
2472 | default "y" | |
2473 | depends on MIPS_VPE_LOADER && MIPS_CMP | |
2474 | ||
1a2a6d7e DCZ |
2475 | config MIPS_VPE_LOADER_MT |
2476 | bool | |
2477 | default "y" | |
2478 | depends on MIPS_VPE_LOADER && !MIPS_CMP | |
2479 | ||
e01402b1 RB |
2480 | config MIPS_VPE_LOADER_TOM |
2481 | bool "Load VPE program into memory hidden from linux" | |
2482 | depends on MIPS_VPE_LOADER | |
2483 | default y | |
2484 | help | |
2485 | The loader can use memory that is present but has been hidden from | |
2486 | Linux using the kernel command line option "mem=xxMB". It's up to | |
2487 | you to ensure the amount you put in the option and the space your | |
2488 | program requires is less or equal to the amount physically present. | |
2489 | ||
e01402b1 | 2490 | config MIPS_VPE_APSP_API |
5e83d430 RB |
2491 | bool "Enable support for AP/SP API (RTLX)" |
2492 | depends on MIPS_VPE_LOADER | |
e01402b1 | 2493 | |
da615cf6 DCZ |
2494 | config MIPS_VPE_APSP_API_CMP |
2495 | bool | |
2496 | default "y" | |
2497 | depends on MIPS_VPE_APSP_API && MIPS_CMP | |
2498 | ||
2c973ef0 DCZ |
2499 | config MIPS_VPE_APSP_API_MT |
2500 | bool | |
2501 | default "y" | |
2502 | depends on MIPS_VPE_APSP_API && !MIPS_CMP | |
2503 | ||
4a16ff4c | 2504 | config MIPS_CMP |
5cac93b3 | 2505 | bool "MIPS CMP framework support (DEPRECATED)" |
5676319c | 2506 | depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
b10b43ba | 2507 | select SMP |
eb9b5141 | 2508 | select SYNC_R4K |
b10b43ba | 2509 | select SYS_SUPPORTS_SMP |
4a16ff4c RB |
2510 | select WEAK_ORDERING |
2511 | default n | |
2512 | help | |
044505c7 PB |
2513 | Select this if you are using a bootloader which implements the "CMP |
2514 | framework" protocol (ie. YAMON) and want your kernel to make use of | |
2515 | its ability to start secondary CPUs. | |
4a16ff4c | 2516 | |
5cac93b3 PB |
2517 | Unless you have a specific need, you should use CONFIG_MIPS_CPS |
2518 | instead of this. | |
2519 | ||
0ee958e1 PB |
2520 | config MIPS_CPS |
2521 | bool "MIPS Coherent Processing System support" | |
5a3e7c02 | 2522 | depends on SYS_SUPPORTS_MIPS_CPS |
0ee958e1 | 2523 | select MIPS_CM |
1d8f1f5a | 2524 | select MIPS_CPS_PM if HOTPLUG_CPU |
0ee958e1 PB |
2525 | select SMP |
2526 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) | |
1d8f1f5a | 2527 | select SYS_SUPPORTS_HOTPLUG_CPU |
c8b7712c | 2528 | select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
0ee958e1 PB |
2529 | select SYS_SUPPORTS_SMP |
2530 | select WEAK_ORDERING | |
d8d3276b | 2531 | select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU |
0ee958e1 PB |
2532 | help |
2533 | Select this if you wish to run an SMP kernel across multiple cores | |
2534 | within a MIPS Coherent Processing System. When this option is | |
2535 | enabled the kernel will probe for other cores and boot them with | |
2536 | no external assistance. It is safe to enable this when hardware | |
2537 | support is unavailable. | |
2538 | ||
3179d37e | 2539 | config MIPS_CPS_PM |
39a59593 | 2540 | depends on MIPS_CPS |
3179d37e PB |
2541 | bool |
2542 | ||
9f98f3dd PB |
2543 | config MIPS_CM |
2544 | bool | |
3c9b4166 | 2545 | select MIPS_CPC |
9f98f3dd | 2546 | |
9c38cf44 PB |
2547 | config MIPS_CPC |
2548 | bool | |
4a16ff4c | 2549 | |
1da177e4 LT |
2550 | config SB1_PASS_2_WORKAROUNDS |
2551 | bool | |
2552 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) | |
2553 | default y | |
2554 | ||
2555 | config SB1_PASS_2_1_WORKAROUNDS | |
2556 | bool | |
2557 | depends on CPU_SB1 && CPU_SB1_PASS_2 | |
2558 | default y | |
2559 | ||
9e2b5372 MC |
2560 | choice |
2561 | prompt "SmartMIPS or microMIPS ASE support" | |
2562 | ||
2563 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS | |
2564 | bool "None" | |
2565 | help | |
2566 | Select this if you want neither microMIPS nor SmartMIPS support | |
2567 | ||
9693a853 FBH |
2568 | config CPU_HAS_SMARTMIPS |
2569 | depends on SYS_SUPPORTS_SMARTMIPS | |
9e2b5372 | 2570 | bool "SmartMIPS" |
9693a853 FBH |
2571 | help |
2572 | SmartMIPS is a extension of the MIPS32 architecture aimed at | |
2573 | increased security at both hardware and software level for | |
2574 | smartcards. Enabling this option will allow proper use of the | |
2575 | SmartMIPS instructions by Linux applications. However a kernel with | |
2576 | this option will not work on a MIPS core without SmartMIPS core. If | |
2577 | you don't know you probably don't have SmartMIPS and should say N | |
2578 | here. | |
2579 | ||
bce86083 | 2580 | config CPU_MICROMIPS |
7fd08ca5 | 2581 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
9e2b5372 | 2582 | bool "microMIPS" |
bce86083 SH |
2583 | help |
2584 | When this option is enabled the kernel will be built using the | |
2585 | microMIPS ISA | |
2586 | ||
9e2b5372 MC |
2587 | endchoice |
2588 | ||
a5e9a69e | 2589 | config CPU_HAS_MSA |
0ce3417e | 2590 | bool "Support for the MIPS SIMD Architecture" |
a5e9a69e | 2591 | depends on CPU_SUPPORTS_MSA |
c92e47e5 | 2592 | depends on MIPS_FP_SUPPORT |
2a6cb669 | 2593 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
a5e9a69e PB |
2594 | help |
2595 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers | |
2596 | and a set of SIMD instructions to operate on them. When this option | |
1db1af84 PB |
2597 | is enabled the kernel will support allocating & switching MSA |
2598 | vector register contexts. If you know that your kernel will only be | |
2599 | running on CPUs which do not support MSA or that your userland will | |
2600 | not be making use of it then you may wish to say N here to reduce | |
2601 | the size & complexity of your kernel. | |
a5e9a69e PB |
2602 | |
2603 | If unsure, say Y. | |
2604 | ||
1da177e4 | 2605 | config CPU_HAS_WB |
f7062ddb | 2606 | bool |
e01402b1 | 2607 | |
df0ac8a4 KC |
2608 | config XKS01 |
2609 | bool | |
2610 | ||
ba9196d2 JY |
2611 | config CPU_HAS_DIEI |
2612 | depends on !CPU_DIEI_BROKEN | |
2613 | bool | |
2614 | ||
2615 | config CPU_DIEI_BROKEN | |
2616 | bool | |
2617 | ||
8256b17e FF |
2618 | config CPU_HAS_RIXI |
2619 | bool | |
2620 | ||
18d84e2e | 2621 | config CPU_NO_LOAD_STORE_LR |
932afdee YC |
2622 | bool |
2623 | help | |
18d84e2e | 2624 | CPU lacks support for unaligned load and store instructions: |
932afdee | 2625 | LWL, LWR, SWL, SWR (Load/store word left/right). |
18d84e2e AL |
2626 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit |
2627 | systems). | |
932afdee | 2628 | |
f41ae0b2 RB |
2629 | # |
2630 | # Vectored interrupt mode is an R2 feature | |
2631 | # | |
e01402b1 | 2632 | config CPU_MIPSR2_IRQ_VI |
f41ae0b2 | 2633 | bool |
e01402b1 | 2634 | |
f41ae0b2 RB |
2635 | # |
2636 | # Extended interrupt mode is an R2 feature | |
2637 | # | |
e01402b1 | 2638 | config CPU_MIPSR2_IRQ_EI |
f41ae0b2 | 2639 | bool |
e01402b1 | 2640 | |
1da177e4 LT |
2641 | config CPU_HAS_SYNC |
2642 | bool | |
2643 | depends on !CPU_R3000 | |
2644 | default y | |
2645 | ||
20d60d99 MR |
2646 | # |
2647 | # CPU non-features | |
2648 | # | |
2649 | config CPU_DADDI_WORKAROUNDS | |
2650 | bool | |
2651 | ||
2652 | config CPU_R4000_WORKAROUNDS | |
2653 | bool | |
2654 | select CPU_R4400_WORKAROUNDS | |
2655 | ||
2656 | config CPU_R4400_WORKAROUNDS | |
2657 | bool | |
2658 | ||
071d2f0b PB |
2659 | config CPU_R4X00_BUGS64 |
2660 | bool | |
2661 | default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1) | |
2662 | ||
4edf00a4 PB |
2663 | config MIPS_ASID_SHIFT |
2664 | int | |
2665 | default 6 if CPU_R3000 || CPU_TX39XX | |
4edf00a4 PB |
2666 | default 0 |
2667 | ||
2668 | config MIPS_ASID_BITS | |
2669 | int | |
2db003a5 | 2670 | default 0 if MIPS_ASID_BITS_VARIABLE |
4edf00a4 PB |
2671 | default 6 if CPU_R3000 || CPU_TX39XX |
2672 | default 8 | |
2673 | ||
2db003a5 PB |
2674 | config MIPS_ASID_BITS_VARIABLE |
2675 | bool | |
2676 | ||
4a5dc51e MN |
2677 | config MIPS_CRC_SUPPORT |
2678 | bool | |
2679 | ||
802b8362 TB |
2680 | # R4600 erratum. Due to the lack of errata information the exact |
2681 | # technical details aren't known. I've experimentally found that disabling | |
2682 | # interrupts during indexed I-cache flushes seems to be sufficient to deal | |
2683 | # with the issue. | |
2684 | config WAR_R4600_V1_INDEX_ICACHEOP | |
2685 | bool | |
2686 | ||
5e5b6527 TB |
2687 | # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: |
2688 | # | |
2689 | # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D, | |
2690 | # Hit_Invalidate_D and Create_Dirty_Excl_D should only be | |
2691 | # executed if there is no other dcache activity. If the dcache is | |
18ff14c8 | 2692 | # accessed for another instruction immediately preceding when these |
5e5b6527 TB |
2693 | # cache instructions are executing, it is possible that the dcache |
2694 | # tag match outputs used by these cache instructions will be | |
2695 | # incorrect. These cache instructions should be preceded by at least | |
2696 | # four instructions that are not any kind of load or store | |
2697 | # instruction. | |
2698 | # | |
2699 | # This is not allowed: lw | |
2700 | # nop | |
2701 | # nop | |
2702 | # nop | |
2703 | # cache Hit_Writeback_Invalidate_D | |
2704 | # | |
2705 | # This is allowed: lw | |
2706 | # nop | |
2707 | # nop | |
2708 | # nop | |
2709 | # nop | |
2710 | # cache Hit_Writeback_Invalidate_D | |
2711 | config WAR_R4600_V1_HIT_CACHEOP | |
2712 | bool | |
2713 | ||
44def342 TB |
2714 | # Writeback and invalidate the primary cache dcache before DMA. |
2715 | # | |
2716 | # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D, | |
2717 | # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only | |
2718 | # operate correctly if the internal data cache refill buffer is empty. These | |
2719 | # CACHE instructions should be separated from any potential data cache miss | |
2720 | # by a load instruction to an uncached address to empty the response buffer." | |
2721 | # (Revision 2.0 device errata from IDT available on https://www.idt.com/ | |
2722 | # in .pdf format.) | |
2723 | config WAR_R4600_V2_HIT_CACHEOP | |
2724 | bool | |
2725 | ||
24a1c023 TB |
2726 | # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for |
2727 | # the line which this instruction itself exists, the following | |
2728 | # operation is not guaranteed." | |
2729 | # | |
2730 | # Workaround: do two phase flushing for Index_Invalidate_I | |
2731 | config WAR_TX49XX_ICACHE_INDEX_INV | |
2732 | bool | |
2733 | ||
886ee136 TB |
2734 | # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra |
2735 | # opposes it being called that) where invalid instructions in the same | |
2736 | # I-cache line worth of instructions being fetched may case spurious | |
2737 | # exceptions. | |
2738 | config WAR_ICACHE_REFILLS | |
2739 | bool | |
2740 | ||
256ec489 TB |
2741 | # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that |
2742 | # may cause ll / sc and lld / scd sequences to execute non-atomically. | |
2743 | config WAR_R10000_LLSC | |
2744 | bool | |
2745 | ||
a7fbed98 TB |
2746 | # 34K core erratum: "Problems Executing the TLBR Instruction" |
2747 | config WAR_MIPS34K_MISSED_ITLB | |
2748 | bool | |
2749 | ||
1da177e4 LT |
2750 | # |
2751 | # - Highmem only makes sense for the 32-bit kernel. | |
2752 | # - The current highmem code will only work properly on physically indexed | |
2753 | # caches such as R3000, SB1, R7000 or those that look like they're virtually | |
2754 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the | |
2755 | # moment we protect the user and offer the highmem option only on machines | |
2756 | # where it's known to be safe. This will not offer highmem on a few systems | |
2757 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically | |
2758 | # indexed CPUs but we're playing safe. | |
797798c1 RB |
2759 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
2760 | # know they might have memory configurations that could make use of highmem | |
2761 | # support. | |
1da177e4 LT |
2762 | # |
2763 | config HIGHMEM | |
2764 | bool "High Memory Support" | |
a6e18781 | 2765 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
a4c33e83 | 2766 | select KMAP_LOCAL |
797798c1 RB |
2767 | |
2768 | config CPU_SUPPORTS_HIGHMEM | |
2769 | bool | |
2770 | ||
2771 | config SYS_SUPPORTS_HIGHMEM | |
2772 | bool | |
1da177e4 | 2773 | |
9693a853 FBH |
2774 | config SYS_SUPPORTS_SMARTMIPS |
2775 | bool | |
2776 | ||
a6a4834c SH |
2777 | config SYS_SUPPORTS_MICROMIPS |
2778 | bool | |
2779 | ||
377cb1b6 RB |
2780 | config SYS_SUPPORTS_MIPS16 |
2781 | bool | |
2782 | help | |
2783 | This option must be set if a kernel might be executed on a MIPS16- | |
2784 | enabled CPU even if MIPS16 is not actually being used. In other | |
2785 | words, it makes the kernel MIPS16-tolerant. | |
2786 | ||
a5e9a69e PB |
2787 | config CPU_SUPPORTS_MSA |
2788 | bool | |
2789 | ||
b4819b59 YY |
2790 | config ARCH_FLATMEM_ENABLE |
2791 | def_bool y | |
268a2d60 | 2792 | depends on !NUMA && !CPU_LOONGSON2EF |
b4819b59 | 2793 | |
31473747 AN |
2794 | config ARCH_SPARSEMEM_ENABLE |
2795 | bool | |
397dc00e | 2796 | select SPARSEMEM_STATIC if !SGI_IP27 |
31473747 | 2797 | |
d8cb4e11 RB |
2798 | config NUMA |
2799 | bool "NUMA Support" | |
2800 | depends on SYS_SUPPORTS_NUMA | |
cf8194e4 | 2801 | select SMP |
d8cb4e11 RB |
2802 | help |
2803 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory | |
2804 | Access). This option improves performance on systems with more | |
2805 | than two nodes; on two node systems it is generally better to | |
172a37e9 | 2806 | leave it disabled; on single node systems leave this option |
d8cb4e11 RB |
2807 | disabled. |
2808 | ||
2809 | config SYS_SUPPORTS_NUMA | |
2810 | bool | |
2811 | ||
f3c560a6 TB |
2812 | config HAVE_SETUP_PER_CPU_AREA |
2813 | def_bool y | |
2814 | depends on NUMA | |
2815 | ||
2816 | config NEED_PER_CPU_EMBED_FIRST_CHUNK | |
2817 | def_bool y | |
2818 | depends on NUMA | |
2819 | ||
8c530ea3 MR |
2820 | config RELOCATABLE |
2821 | bool "Relocatable kernel" | |
ab7c01fd SS |
2822 | depends on SYS_SUPPORTS_RELOCATABLE |
2823 | depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \ | |
2824 | CPU_MIPS32_R5 || CPU_MIPS64_R5 || \ | |
2825 | CPU_MIPS32_R6 || CPU_MIPS64_R6 || \ | |
a307a4ce JH |
2826 | CPU_P5600 || CAVIUM_OCTEON_SOC || \ |
2827 | CPU_LOONGSON64 | |
8c530ea3 MR |
2828 | help |
2829 | This builds a kernel image that retains relocation information | |
2830 | so it can be loaded someplace besides the default 1MB. | |
2831 | The relocations make the kernel binary about 15% larger, | |
2832 | but are discarded at runtime | |
2833 | ||
069fd766 MR |
2834 | config RELOCATION_TABLE_SIZE |
2835 | hex "Relocation table size" | |
2836 | depends on RELOCATABLE | |
2837 | range 0x0 0x01000000 | |
a307a4ce | 2838 | default "0x00200000" if CPU_LOONGSON64 |
069fd766 | 2839 | default "0x00100000" |
a7f7f624 | 2840 | help |
069fd766 MR |
2841 | A table of relocation data will be appended to the kernel binary |
2842 | and parsed at boot to fix up the relocated kernel. | |
2843 | ||
2844 | This option allows the amount of space reserved for the table to be | |
2845 | adjusted, although the default of 1Mb should be ok in most cases. | |
2846 | ||
2847 | The build will fail and a valid size suggested if this is too small. | |
2848 | ||
2849 | If unsure, leave at the default value. | |
2850 | ||
405bc8fd MR |
2851 | config RANDOMIZE_BASE |
2852 | bool "Randomize the address of the kernel image" | |
2853 | depends on RELOCATABLE | |
a7f7f624 | 2854 | help |
371a4151 EWI |
2855 | Randomizes the physical and virtual address at which the |
2856 | kernel image is loaded, as a security feature that | |
2857 | deters exploit attempts relying on knowledge of the location | |
2858 | of kernel internals. | |
405bc8fd | 2859 | |
371a4151 | 2860 | Entropy is generated using any coprocessor 0 registers available. |
405bc8fd | 2861 | |
371a4151 | 2862 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
405bc8fd | 2863 | |
371a4151 | 2864 | If unsure, say N. |
405bc8fd MR |
2865 | |
2866 | config RANDOMIZE_BASE_MAX_OFFSET | |
2867 | hex "Maximum kASLR offset" if EXPERT | |
2868 | depends on RANDOMIZE_BASE | |
2869 | range 0x0 0x40000000 if EVA || 64BIT | |
2870 | range 0x0 0x08000000 | |
2871 | default "0x01000000" | |
a7f7f624 | 2872 | help |
405bc8fd MR |
2873 | When kASLR is active, this provides the maximum offset that will |
2874 | be applied to the kernel image. It should be set according to the | |
2875 | amount of physical RAM available in the target system minus | |
2876 | PHYSICAL_START and must be a power of 2. | |
2877 | ||
2878 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with | |
2879 | EVA or 64-bit. The default is 16Mb. | |
2880 | ||
c80d79d7 YG |
2881 | config NODES_SHIFT |
2882 | int | |
2883 | default "6" | |
2884 | depends on NEED_MULTIPLE_NODES | |
2885 | ||
14f70012 DCZ |
2886 | config HW_PERF_EVENTS |
2887 | bool "Enable hardware performance counter support for perf events" | |
e2589589 | 2888 | depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64) |
14f70012 DCZ |
2889 | default y |
2890 | help | |
2891 | Enable hardware performance counter support for perf events. If | |
2892 | disabled, perf events will use software events only. | |
2893 | ||
be8fa1cb TY |
2894 | config DMI |
2895 | bool "Enable DMI scanning" | |
2896 | depends on MACH_LOONGSON64 | |
2897 | select DMI_SCAN_MACHINE_NON_EFI_FALLBACK | |
2898 | default y | |
2899 | help | |
2900 | Enabled scanning of DMI to identify machine quirks. Say Y | |
2901 | here unless you have verified that your setup is not | |
2902 | affected by entries in the DMI blacklist. Required by PNP | |
2903 | BIOS code. | |
2904 | ||
1da177e4 LT |
2905 | config SMP |
2906 | bool "Multi-Processing support" | |
e73ea273 RB |
2907 | depends on SYS_SUPPORTS_SMP |
2908 | help | |
1da177e4 | 2909 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
2910 | a system with only one CPU, say N. If you have a system with more |
2911 | than one CPU, say Y. | |
1da177e4 | 2912 | |
4a474157 | 2913 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
2914 | machines, but will use only one CPU of a multiprocessor machine. If |
2915 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 2916 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
2917 | will run faster if you say N here. |
2918 | ||
2919 | People using multiprocessor machines who say Y here should also say | |
2920 | Y to "Enhanced Real Time Clock Support", below. | |
2921 | ||
03502faa | 2922 | See also the SMP-HOWTO available at |
ef054ad3 | 2923 | <https://www.tldp.org/docs.html#howto>. |
1da177e4 LT |
2924 | |
2925 | If you don't know what to do here, say N. | |
2926 | ||
7840d618 MR |
2927 | config HOTPLUG_CPU |
2928 | bool "Support for hot-pluggable CPUs" | |
2929 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU | |
2930 | help | |
2931 | Say Y here to allow turning CPUs off and on. CPUs can be | |
2932 | controlled through /sys/devices/system/cpu. | |
2933 | (Note: power management support will enable this option | |
2934 | automatically on SMP systems. ) | |
2935 | Say N if you want to disable CPU hotplug. | |
2936 | ||
87353d8a RB |
2937 | config SMP_UP |
2938 | bool | |
2939 | ||
4a16ff4c RB |
2940 | config SYS_SUPPORTS_MIPS_CMP |
2941 | bool | |
2942 | ||
0ee958e1 PB |
2943 | config SYS_SUPPORTS_MIPS_CPS |
2944 | bool | |
2945 | ||
e73ea273 RB |
2946 | config SYS_SUPPORTS_SMP |
2947 | bool | |
2948 | ||
130e2fb7 RB |
2949 | config NR_CPUS_DEFAULT_4 |
2950 | bool | |
2951 | ||
2952 | config NR_CPUS_DEFAULT_8 | |
2953 | bool | |
2954 | ||
2955 | config NR_CPUS_DEFAULT_16 | |
2956 | bool | |
2957 | ||
2958 | config NR_CPUS_DEFAULT_32 | |
2959 | bool | |
2960 | ||
2961 | config NR_CPUS_DEFAULT_64 | |
2962 | bool | |
2963 | ||
1da177e4 | 2964 | config NR_CPUS |
a91796a9 J |
2965 | int "Maximum number of CPUs (2-256)" |
2966 | range 2 256 | |
1da177e4 | 2967 | depends on SMP |
130e2fb7 RB |
2968 | default "4" if NR_CPUS_DEFAULT_4 |
2969 | default "8" if NR_CPUS_DEFAULT_8 | |
2970 | default "16" if NR_CPUS_DEFAULT_16 | |
2971 | default "32" if NR_CPUS_DEFAULT_32 | |
2972 | default "64" if NR_CPUS_DEFAULT_64 | |
1da177e4 LT |
2973 | help |
2974 | This allows you to specify the maximum number of CPUs which this | |
2975 | kernel will support. The maximum supported value is 32 for 32-bit | |
2976 | kernel and 64 for 64-bit kernels; the minimum value which makes | |
72ede9b1 AN |
2977 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
2978 | and 2 for all others. | |
1da177e4 LT |
2979 | |
2980 | This is purely to save memory - each supported CPU adds | |
72ede9b1 AN |
2981 | approximately eight kilobytes to the kernel image. For best |
2982 | performance should round up your number of processors to the next | |
2983 | power of two. | |
1da177e4 | 2984 | |
399aaa25 AC |
2985 | config MIPS_PERF_SHARED_TC_COUNTERS |
2986 | bool | |
7820b84b DD |
2987 | |
2988 | config MIPS_NR_CPU_NR_MAP_1024 | |
2989 | bool | |
2990 | ||
2991 | config MIPS_NR_CPU_NR_MAP | |
2992 | int | |
2993 | depends on SMP | |
2994 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 | |
2995 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 | |
399aaa25 | 2996 | |
1723b4a3 AN |
2997 | # |
2998 | # Timer Interrupt Frequency Configuration | |
2999 | # | |
3000 | ||
3001 | choice | |
3002 | prompt "Timer frequency" | |
3003 | default HZ_250 | |
3004 | help | |
371a4151 | 3005 | Allows the configuration of the timer frequency. |
1723b4a3 | 3006 | |
67596573 PB |
3007 | config HZ_24 |
3008 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ | |
3009 | ||
1723b4a3 | 3010 | config HZ_48 |
0f873585 | 3011 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
1723b4a3 AN |
3012 | |
3013 | config HZ_100 | |
3014 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ | |
3015 | ||
3016 | config HZ_128 | |
3017 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ | |
3018 | ||
3019 | config HZ_250 | |
3020 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ | |
3021 | ||
3022 | config HZ_256 | |
3023 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ | |
3024 | ||
3025 | config HZ_1000 | |
3026 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ | |
3027 | ||
3028 | config HZ_1024 | |
3029 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ | |
3030 | ||
3031 | endchoice | |
3032 | ||
67596573 PB |
3033 | config SYS_SUPPORTS_24HZ |
3034 | bool | |
3035 | ||
1723b4a3 AN |
3036 | config SYS_SUPPORTS_48HZ |
3037 | bool | |
3038 | ||
3039 | config SYS_SUPPORTS_100HZ | |
3040 | bool | |
3041 | ||
3042 | config SYS_SUPPORTS_128HZ | |
3043 | bool | |
3044 | ||
3045 | config SYS_SUPPORTS_250HZ | |
3046 | bool | |
3047 | ||
3048 | config SYS_SUPPORTS_256HZ | |
3049 | bool | |
3050 | ||
3051 | config SYS_SUPPORTS_1000HZ | |
3052 | bool | |
3053 | ||
3054 | config SYS_SUPPORTS_1024HZ | |
3055 | bool | |
3056 | ||
3057 | config SYS_SUPPORTS_ARBIT_HZ | |
3058 | bool | |
67596573 PB |
3059 | default y if !SYS_SUPPORTS_24HZ && \ |
3060 | !SYS_SUPPORTS_48HZ && \ | |
3061 | !SYS_SUPPORTS_100HZ && \ | |
3062 | !SYS_SUPPORTS_128HZ && \ | |
3063 | !SYS_SUPPORTS_250HZ && \ | |
3064 | !SYS_SUPPORTS_256HZ && \ | |
3065 | !SYS_SUPPORTS_1000HZ && \ | |
1723b4a3 AN |
3066 | !SYS_SUPPORTS_1024HZ |
3067 | ||
3068 | config HZ | |
3069 | int | |
67596573 | 3070 | default 24 if HZ_24 |
1723b4a3 AN |
3071 | default 48 if HZ_48 |
3072 | default 100 if HZ_100 | |
3073 | default 128 if HZ_128 | |
3074 | default 250 if HZ_250 | |
3075 | default 256 if HZ_256 | |
3076 | default 1000 if HZ_1000 | |
3077 | default 1024 if HZ_1024 | |
3078 | ||
96685b17 DCZ |
3079 | config SCHED_HRTICK |
3080 | def_bool HIGH_RES_TIMERS | |
3081 | ||
ea6e942b | 3082 | config KEXEC |
7d60717e | 3083 | bool "Kexec system call" |
2965faa5 | 3084 | select KEXEC_CORE |
ea6e942b AN |
3085 | help |
3086 | kexec is a system call that implements the ability to shutdown your | |
3087 | current kernel, and to start another kernel. It is like a reboot | |
3dde6ad8 | 3088 | but it is independent of the system firmware. And like a reboot |
ea6e942b AN |
3089 | you can start any kernel with it, not just Linux. |
3090 | ||
01dd2fbf | 3091 | The name comes from the similarity to the exec system call. |
ea6e942b AN |
3092 | |
3093 | It is an ongoing process to be certain the hardware in a machine | |
3094 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
3095 | initially work for you. As of this writing the exact hardware |
3096 | interface is strongly in flux, so no good recommendation can be | |
3097 | made. | |
ea6e942b | 3098 | |
7aa1c8f4 | 3099 | config CRASH_DUMP |
bff323d5 MN |
3100 | bool "Kernel crash dumps" |
3101 | help | |
7aa1c8f4 RB |
3102 | Generate crash dump after being started by kexec. |
3103 | This should be normally only set in special crash dump kernels | |
3104 | which are loaded in the main kernel with kexec-tools into | |
3105 | a specially reserved region and then later executed after | |
3106 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
3107 | to a memory address not used by the main kernel or firmware using | |
3108 | PHYSICAL_START. | |
3109 | ||
3110 | config PHYSICAL_START | |
bff323d5 | 3111 | hex "Physical address where the kernel is loaded" |
8bda3e26 | 3112 | default "0xffffffff84000000" |
bff323d5 MN |
3113 | depends on CRASH_DUMP |
3114 | help | |
7aa1c8f4 RB |
3115 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
3116 | If you plan to use kernel for capturing the crash dump change | |
3117 | this value to start of the reserved region (the "X" value as | |
3118 | specified in the "crashkernel=YM@XM" command line boot parameter | |
3119 | passed to the panic-ed kernel). | |
3120 | ||
597ce172 | 3121 | config MIPS_O32_FP64_SUPPORT |
b7f1e273 | 3122 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
597ce172 | 3123 | depends on 32BIT || MIPS32_O32 |
597ce172 PB |
3124 | help |
3125 | When this is enabled, the kernel will support use of 64-bit floating | |
3126 | point registers with binaries using the O32 ABI along with the | |
3127 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On | |
3128 | 32-bit MIPS systems this support is at the cost of increasing the | |
3129 | size and complexity of the compiled FPU emulator. Thus if you are | |
3130 | running a MIPS32 system and know that none of your userland binaries | |
3131 | will require 64-bit floating point, you may wish to reduce the size | |
3132 | of your kernel & potentially improve FP emulation performance by | |
3133 | saying N here. | |
3134 | ||
06e2e882 PB |
3135 | Although binutils currently supports use of this flag the details |
3136 | concerning its effect upon the O32 ABI in userland are still being | |
18ff14c8 | 3137 | worked on. In order to avoid userland becoming dependent upon current |
06e2e882 PB |
3138 | behaviour before the details have been finalised, this option should |
3139 | be considered experimental and only enabled by those working upon | |
3140 | said details. | |
3141 | ||
3142 | If unsure, say N. | |
597ce172 | 3143 | |
f2ffa5ab | 3144 | config USE_OF |
0b3e06fd | 3145 | bool |
f2ffa5ab | 3146 | select OF |
e6ce1324 | 3147 | select OF_EARLY_FLATTREE |
abd2363f | 3148 | select IRQ_DOMAIN |
f2ffa5ab | 3149 | |
2fe8ea39 DZ |
3150 | config UHI_BOOT |
3151 | bool | |
3152 | ||
7fafb068 AB |
3153 | config BUILTIN_DTB |
3154 | bool | |
3155 | ||
1da8f179 | 3156 | choice |
5b24d52c | 3157 | prompt "Kernel appended dtb support" if USE_OF |
1da8f179 JG |
3158 | default MIPS_NO_APPENDED_DTB |
3159 | ||
3160 | config MIPS_NO_APPENDED_DTB | |
3161 | bool "None" | |
3162 | help | |
3163 | Do not enable appended dtb support. | |
3164 | ||
87db537d AK |
3165 | config MIPS_ELF_APPENDED_DTB |
3166 | bool "vmlinux" | |
3167 | help | |
3168 | With this option, the boot code will look for a device tree binary | |
3169 | DTB) included in the vmlinux ELF section .appended_dtb. By default | |
3170 | it is empty and the DTB can be appended using binutils command | |
3171 | objcopy: | |
3172 | ||
3173 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux | |
3174 | ||
18ff14c8 | 3175 | This is meant as a backward compatibility convenience for those |
87db537d AK |
3176 | systems with a bootloader that can't be upgraded to accommodate |
3177 | the documented boot protocol using a device tree. | |
3178 | ||
1da8f179 | 3179 | config MIPS_RAW_APPENDED_DTB |
b8f54f2c | 3180 | bool "vmlinux.bin or vmlinuz.bin" |
1da8f179 JG |
3181 | help |
3182 | With this option, the boot code will look for a device tree binary | |
b8f54f2c | 3183 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
1da8f179 JG |
3184 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
3185 | ||
3186 | This is meant as a backward compatibility convenience for those | |
3187 | systems with a bootloader that can't be upgraded to accommodate | |
3188 | the documented boot protocol using a device tree. | |
3189 | ||
3190 | Beware that there is very little in terms of protection against | |
3191 | this option being confused by leftover garbage in memory that might | |
3192 | look like a DTB header after a reboot if no actual DTB is appended | |
3193 | to vmlinux.bin. Do not leave this option active in a production kernel | |
3194 | if you don't intend to always append a DTB. | |
3195 | endchoice | |
3196 | ||
2024972e JG |
3197 | choice |
3198 | prompt "Kernel command line type" if !CMDLINE_OVERRIDE | |
2bcef9b4 | 3199 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
87fcfa7b | 3200 | !MACH_LOONGSON64 && !MIPS_MALTA && \ |
2bcef9b4 | 3201 | !CAVIUM_OCTEON_SOC |
2024972e JG |
3202 | default MIPS_CMDLINE_FROM_BOOTLOADER |
3203 | ||
3204 | config MIPS_CMDLINE_FROM_DTB | |
3205 | depends on USE_OF | |
3206 | bool "Dtb kernel arguments if available" | |
3207 | ||
3208 | config MIPS_CMDLINE_DTB_EXTEND | |
3209 | depends on USE_OF | |
3210 | bool "Extend dtb kernel arguments with bootloader arguments" | |
3211 | ||
3212 | config MIPS_CMDLINE_FROM_BOOTLOADER | |
3213 | bool "Bootloader kernel arguments if available" | |
ed47e153 RV |
3214 | |
3215 | config MIPS_CMDLINE_BUILTIN_EXTEND | |
3216 | depends on CMDLINE_BOOL | |
3217 | bool "Extend builtin kernel arguments with bootloader arguments" | |
2024972e JG |
3218 | endchoice |
3219 | ||
5e83d430 RB |
3220 | endmenu |
3221 | ||
1df0f0ff AN |
3222 | config LOCKDEP_SUPPORT |
3223 | bool | |
3224 | default y | |
3225 | ||
3226 | config STACKTRACE_SUPPORT | |
3227 | bool | |
3228 | default y | |
3229 | ||
a728ab52 KS |
3230 | config PGTABLE_LEVELS |
3231 | int | |
3377e227 | 3232 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
a728ab52 KS |
3233 | default 3 if 64BIT && !PAGE_SIZE_64KB |
3234 | default 2 | |
3235 | ||
6c359eb1 PB |
3236 | config MIPS_AUTO_PFN_OFFSET |
3237 | bool | |
3238 | ||
1da177e4 LT |
3239 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
3240 | ||
c5611df9 | 3241 | config PCI_DRIVERS_GENERIC |
2eac9c2d | 3242 | select PCI_DOMAINS_GENERIC if PCI |
c5611df9 PB |
3243 | bool |
3244 | ||
3245 | config PCI_DRIVERS_LEGACY | |
3246 | def_bool !PCI_DRIVERS_GENERIC | |
3247 | select NO_GENERIC_PCI_IOPORT_MAP | |
2eac9c2d | 3248 | select PCI_DOMAINS if PCI |
1da177e4 LT |
3249 | |
3250 | # | |
3251 | # ISA support is now enabled via select. Too many systems still have the one | |
3252 | # or other ISA chip on the board that users don't know about so don't expect | |
3253 | # users to choose the right thing ... | |
3254 | # | |
3255 | config ISA | |
3256 | bool | |
3257 | ||
1da177e4 LT |
3258 | config TC |
3259 | bool "TURBOchannel support" | |
3260 | depends on MACH_DECSTATION | |
3261 | help | |
50a23e6e JM |
3262 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
3263 | processors. TURBOchannel programming specifications are available | |
3264 | at: | |
3265 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> | |
3266 | and: | |
3267 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> | |
3268 | Linux driver support status is documented at: | |
3269 | <http://www.linux-mips.org/wiki/DECstation> | |
1da177e4 | 3270 | |
1da177e4 LT |
3271 | config MMU |
3272 | bool | |
3273 | default y | |
3274 | ||
109c32ff MR |
3275 | config ARCH_MMAP_RND_BITS_MIN |
3276 | default 12 if 64BIT | |
3277 | default 8 | |
3278 | ||
3279 | config ARCH_MMAP_RND_BITS_MAX | |
3280 | default 18 if 64BIT | |
3281 | default 15 | |
3282 | ||
3283 | config ARCH_MMAP_RND_COMPAT_BITS_MIN | |
371a4151 | 3284 | default 8 |
109c32ff MR |
3285 | |
3286 | config ARCH_MMAP_RND_COMPAT_BITS_MAX | |
371a4151 | 3287 | default 15 |
109c32ff | 3288 | |
d865bea4 RB |
3289 | config I8253 |
3290 | bool | |
798778b8 | 3291 | select CLKSRC_I8253 |
2d02612f | 3292 | select CLKEVT_I8253 |
9726b43a | 3293 | select MIPS_EXTERNAL_TIMER |
d865bea4 | 3294 | |
e05eb3f8 RB |
3295 | config ZONE_DMA |
3296 | bool | |
3297 | ||
cce335ae RB |
3298 | config ZONE_DMA32 |
3299 | bool | |
3300 | ||
1da177e4 LT |
3301 | endmenu |
3302 | ||
1da177e4 LT |
3303 | config TRAD_SIGNALS |
3304 | bool | |
1da177e4 | 3305 | |
1da177e4 | 3306 | config MIPS32_COMPAT |
78aaf956 | 3307 | bool |
1da177e4 LT |
3308 | |
3309 | config COMPAT | |
3310 | bool | |
1da177e4 | 3311 | |
05e43966 AN |
3312 | config SYSVIPC_COMPAT |
3313 | bool | |
05e43966 | 3314 | |
1da177e4 LT |
3315 | config MIPS32_O32 |
3316 | bool "Kernel support for o32 binaries" | |
78aaf956 RB |
3317 | depends on 64BIT |
3318 | select ARCH_WANT_OLD_COMPAT_IPC | |
3319 | select COMPAT | |
3320 | select MIPS32_COMPAT | |
3321 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3322 | help |
3323 | Select this option if you want to run o32 binaries. These are pure | |
3324 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of | |
3325 | existing binaries are in this format. | |
3326 | ||
3327 | If unsure, say Y. | |
3328 | ||
3329 | config MIPS32_N32 | |
3330 | bool "Kernel support for n32 binaries" | |
c22eacfe | 3331 | depends on 64BIT |
5a9372f7 | 3332 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
78aaf956 RB |
3333 | select COMPAT |
3334 | select MIPS32_COMPAT | |
3335 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3336 | help |
3337 | Select this option if you want to run n32 binaries. These are | |
3338 | 64-bit binaries using 32-bit quantities for addressing and certain | |
3339 | data that would normally be 64-bit. They are used in special | |
3340 | cases. | |
3341 | ||
3342 | If unsure, say N. | |
3343 | ||
2116245e RB |
3344 | menu "Power management options" |
3345 | ||
363c55ca WZ |
3346 | config ARCH_HIBERNATION_POSSIBLE |
3347 | def_bool y | |
3f5b3e17 | 3348 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
363c55ca | 3349 | |
f4cb5700 JB |
3350 | config ARCH_SUSPEND_POSSIBLE |
3351 | def_bool y | |
3f5b3e17 | 3352 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
f4cb5700 | 3353 | |
2116245e | 3354 | source "kernel/power/Kconfig" |
952fa954 | 3355 | |
1da177e4 LT |
3356 | endmenu |
3357 | ||
7a998935 VK |
3358 | config MIPS_EXTERNAL_TIMER |
3359 | bool | |
3360 | ||
7a998935 | 3361 | menu "CPU Power Management" |
c095ebaf PB |
3362 | |
3363 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER | |
7a998935 | 3364 | source "drivers/cpufreq/Kconfig" |
7a998935 | 3365 | endif |
9726b43a | 3366 | |
c095ebaf PB |
3367 | source "drivers/cpuidle/Kconfig" |
3368 | ||
3369 | endmenu | |
3370 | ||
98cdee0e RB |
3371 | source "drivers/firmware/Kconfig" |
3372 | ||
2235a54d | 3373 | source "arch/mips/kvm/Kconfig" |
e91946d6 NC |
3374 | |
3375 | source "arch/mips/vdso/Kconfig" |