Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | config MIPS |
3 | bool | |
4 | default y | |
942fa985 | 5 | select ARCH_32BIT_OFF_T if !64BIT |
ea6a3737 | 6 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
12597988 | 7 | select ARCH_CLOCKSOURCE_DATA |
12597988 | 8 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
1e35918a | 9 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
a2ecb233 | 10 | select ARCH_HAS_FORTIFY_SOURCE |
12597988 | 11 | select ARCH_SUPPORTS_UPROBES |
1ee3630a | 12 | select ARCH_USE_BUILTIN_BSWAP |
12597988 | 13 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
25da4e9d | 14 | select ARCH_USE_QUEUED_RWLOCKS |
0b17c967 | 15 | select ARCH_USE_QUEUED_SPINLOCKS |
9035bd29 | 16 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
12597988 MR |
17 | select ARCH_WANT_IPC_PARSE_VERSION |
18 | select BUILDTIME_EXTABLE_SORT | |
19 | select CLONE_BACKWARDS | |
57eeaced | 20 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
12597988 MR |
21 | select CPU_PM if CPU_IDLE |
22 | select GENERIC_ATOMIC64 if !64BIT | |
23 | select GENERIC_CLOCKEVENTS | |
24 | select GENERIC_CMOS_UPDATE | |
25 | select GENERIC_CPU_AUTOPROBE | |
24640f23 | 26 | select GENERIC_GETTIMEOFDAY |
b962aeb0 | 27 | select GENERIC_IOMAP |
12597988 MR |
28 | select GENERIC_IRQ_PROBE |
29 | select GENERIC_IRQ_SHOW | |
6630a8e5 | 30 | select GENERIC_ISA_DMA if EISA |
740129b3 AP |
31 | select GENERIC_LIB_ASHLDI3 |
32 | select GENERIC_LIB_ASHRDI3 | |
33 | select GENERIC_LIB_CMPDI2 | |
34 | select GENERIC_LIB_LSHRDI3 | |
35 | select GENERIC_LIB_UCMPDI2 | |
12597988 MR |
36 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
37 | select GENERIC_SMP_IDLE_THREAD | |
38 | select GENERIC_TIME_VSYSCALL | |
446f062b | 39 | select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT |
12597988 | 40 | select HANDLE_DOMAIN_IRQ |
906d441f | 41 | select HAVE_ARCH_COMPILER_H |
12597988 | 42 | select HAVE_ARCH_JUMP_LABEL |
88547001 | 43 | select HAVE_ARCH_KGDB |
109c32ff MR |
44 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
45 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT | |
490b004f | 46 | select HAVE_ARCH_SECCOMP_FILTER |
c0ff3c53 | 47 | select HAVE_ARCH_TRACEHOOK |
45e03e62 | 48 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES |
2ff2b7ec | 49 | select HAVE_ASM_MODVERSIONS |
716850ab | 50 | select HAVE_EBPF_JIT if (!CPU_MICROMIPS) |
12597988 MR |
51 | select HAVE_CONTEXT_TRACKING |
52 | select HAVE_COPY_THREAD_TLS | |
53 | select HAVE_C_RECORDMCOUNT | |
54 | select HAVE_DEBUG_KMEMLEAK | |
55 | select HAVE_DEBUG_STACKOVERFLOW | |
12597988 | 56 | select HAVE_DMA_CONTIGUOUS |
538f1952 | 57 | select HAVE_DYNAMIC_FTRACE |
12597988 | 58 | select HAVE_EXIT_THREAD |
67a929e0 | 59 | select HAVE_FAST_GUP |
538f1952 | 60 | select HAVE_FTRACE_MCOUNT_RECORD |
29c5d346 | 61 | select HAVE_FUNCTION_GRAPH_TRACER |
12597988 | 62 | select HAVE_FUNCTION_TRACER |
12597988 | 63 | select HAVE_IDE |
b3a428b4 | 64 | select HAVE_IOREMAP_PROT |
12597988 MR |
65 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
66 | select HAVE_IRQ_TIME_ACCOUNTING | |
c1bf207d DD |
67 | select HAVE_KPROBES |
68 | select HAVE_KRETPROBES | |
c0436b50 | 69 | select HAVE_LD_DEAD_CODE_DATA_ELIMINATION |
9d15ffc8 | 70 | select HAVE_MEMBLOCK_NODE_MAP |
786d35d4 | 71 | select HAVE_MOD_ARCH_SPECIFIC |
42a0bb3f | 72 | select HAVE_NMI |
12597988 MR |
73 | select HAVE_OPROFILE |
74 | select HAVE_PERF_EVENTS | |
75 | select HAVE_REGS_AND_STACK_ACCESS_API | |
9ea141ad | 76 | select HAVE_RSEQ |
16c0f03f | 77 | select HAVE_SPARSE_SYSCALL_NR |
d148eac0 | 78 | select HAVE_STACKPROTECTOR |
12597988 | 79 | select HAVE_SYSCALL_TRACEPOINTS |
a3f14310 | 80 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
24640f23 | 81 | select HAVE_GENERIC_VDSO |
12597988 | 82 | select IRQ_FORCED_THREADING |
6630a8e5 | 83 | select ISA if EISA |
2f12fb20 | 84 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
12597988 MR |
85 | select MODULES_USE_ELF_REL if MODULES |
86 | select PERF_USE_VMALLOC | |
05a0a344 | 87 | select RTC_LIB |
d79d853d | 88 | select SYSCTL_EXCEPTION_TRACE |
12597988 | 89 | select VIRT_TO_BUS |
d1af2ab3 | 90 | select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) |
dcf78ee6 AK |
91 | select ARCH_HAS_KCOV |
92 | select HAVE_GCC_PLUGINS | |
1da177e4 | 93 | |
1da177e4 LT |
94 | menu "Machine selection" |
95 | ||
5e83d430 RB |
96 | choice |
97 | prompt "System type" | |
d41e6858 | 98 | default MIPS_GENERIC |
1da177e4 | 99 | |
eed0eabd PB |
100 | config MIPS_GENERIC |
101 | bool "Generic board-agnostic MIPS kernel" | |
102 | select BOOT_RAW | |
103 | select BUILTIN_DTB | |
104 | select CEVT_R4K | |
105 | select CLKSRC_MIPS_GIC | |
106 | select COMMON_CLK | |
107 | select CPU_MIPSR2_IRQ_VI | |
108 | select CPU_MIPSR2_IRQ_EI | |
109 | select CSRC_R4K | |
110 | select DMA_PERDEV_COHERENT | |
eb01d42a | 111 | select HAVE_PCI |
eed0eabd PB |
112 | select IRQ_MIPS_CPU |
113 | select LIBFDT | |
0211d49e | 114 | select MIPS_AUTO_PFN_OFFSET |
eed0eabd PB |
115 | select MIPS_CPU_SCACHE |
116 | select MIPS_GIC | |
117 | select MIPS_L1_CACHE_SHIFT_7 | |
118 | select NO_EXCEPT_FILL | |
119 | select PCI_DRIVERS_GENERIC | |
120 | select PINCTRL | |
121 | select SMP_UP if SMP | |
a3078e59 | 122 | select SWAP_IO_SPACE |
eed0eabd PB |
123 | select SYS_HAS_CPU_MIPS32_R1 |
124 | select SYS_HAS_CPU_MIPS32_R2 | |
125 | select SYS_HAS_CPU_MIPS32_R6 | |
126 | select SYS_HAS_CPU_MIPS64_R1 | |
127 | select SYS_HAS_CPU_MIPS64_R2 | |
128 | select SYS_HAS_CPU_MIPS64_R6 | |
129 | select SYS_SUPPORTS_32BIT_KERNEL | |
130 | select SYS_SUPPORTS_64BIT_KERNEL | |
131 | select SYS_SUPPORTS_BIG_ENDIAN | |
132 | select SYS_SUPPORTS_HIGHMEM | |
133 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
134 | select SYS_SUPPORTS_MICROMIPS | |
135 | select SYS_SUPPORTS_MIPS_CPS | |
136 | select SYS_SUPPORTS_MIPS16 | |
137 | select SYS_SUPPORTS_MULTITHREADING | |
138 | select SYS_SUPPORTS_RELOCATABLE | |
139 | select SYS_SUPPORTS_SMARTMIPS | |
2e6522c5 CL |
140 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
141 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
142 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
143 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
144 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
145 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
eed0eabd | 146 | select USE_OF |
2fe8ea39 | 147 | select UHI_BOOT |
eed0eabd PB |
148 | help |
149 | Select this to build a kernel which aims to support multiple boards, | |
150 | generally using a flattened device tree passed from the bootloader | |
151 | using the boot protocol defined in the UHI (Unified Hosting | |
152 | Interface) specification. | |
153 | ||
42a4f17d | 154 | config MIPS_ALCHEMY |
c3543e25 | 155 | bool "Alchemy processor based machines" |
d4a451d5 | 156 | select PHYS_ADDR_T_64BIT |
f772cdb2 | 157 | select CEVT_R4K |
d7ea335c | 158 | select CSRC_R4K |
67e38cf2 | 159 | select IRQ_MIPS_CPU |
88e9a93c | 160 | select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is |
42a4f17d ML |
161 | select SYS_HAS_CPU_MIPS32_R1 |
162 | select SYS_SUPPORTS_32BIT_KERNEL | |
163 | select SYS_SUPPORTS_APM_EMULATION | |
d30a2b47 | 164 | select GPIOLIB |
1b93b3c3 | 165 | select SYS_SUPPORTS_ZBOOT |
47440229 | 166 | select COMMON_CLK |
1da177e4 | 167 | |
7ca5dc14 FF |
168 | config AR7 |
169 | bool "Texas Instruments AR7" | |
170 | select BOOT_ELF32 | |
171 | select DMA_NONCOHERENT | |
172 | select CEVT_R4K | |
173 | select CSRC_R4K | |
67e38cf2 | 174 | select IRQ_MIPS_CPU |
7ca5dc14 FF |
175 | select NO_EXCEPT_FILL |
176 | select SWAP_IO_SPACE | |
177 | select SYS_HAS_CPU_MIPS32_R1 | |
178 | select SYS_HAS_EARLY_PRINTK | |
179 | select SYS_SUPPORTS_32BIT_KERNEL | |
180 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 181 | select SYS_SUPPORTS_MIPS16 |
1b93b3c3 | 182 | select SYS_SUPPORTS_ZBOOT_UART16550 |
d30a2b47 | 183 | select GPIOLIB |
7ca5dc14 | 184 | select VLYNQ |
8551fb64 | 185 | select HAVE_CLK |
7ca5dc14 FF |
186 | help |
187 | Support for the Texas Instruments AR7 System-on-a-Chip | |
188 | family: TNETD7100, 7200 and 7300. | |
189 | ||
43cc739f SR |
190 | config ATH25 |
191 | bool "Atheros AR231x/AR531x SoC support" | |
192 | select CEVT_R4K | |
193 | select CSRC_R4K | |
194 | select DMA_NONCOHERENT | |
67e38cf2 | 195 | select IRQ_MIPS_CPU |
1753e74e | 196 | select IRQ_DOMAIN |
43cc739f SR |
197 | select SYS_HAS_CPU_MIPS32_R1 |
198 | select SYS_SUPPORTS_BIG_ENDIAN | |
199 | select SYS_SUPPORTS_32BIT_KERNEL | |
8aaa7278 | 200 | select SYS_HAS_EARLY_PRINTK |
43cc739f SR |
201 | help |
202 | Support for Atheros AR231x and Atheros AR531x based boards | |
203 | ||
d4a67d9d GJ |
204 | config ATH79 |
205 | bool "Atheros AR71XX/AR724X/AR913X based boards" | |
ff591a91 | 206 | select ARCH_HAS_RESET_CONTROLLER |
d4a67d9d GJ |
207 | select BOOT_RAW |
208 | select CEVT_R4K | |
209 | select CSRC_R4K | |
210 | select DMA_NONCOHERENT | |
d30a2b47 | 211 | select GPIOLIB |
a08227a2 | 212 | select PINCTRL |
94638067 | 213 | select HAVE_CLK |
411520af | 214 | select COMMON_CLK |
2c4f1ac5 | 215 | select CLKDEV_LOOKUP |
67e38cf2 | 216 | select IRQ_MIPS_CPU |
d4a67d9d GJ |
217 | select SYS_HAS_CPU_MIPS32_R2 |
218 | select SYS_HAS_EARLY_PRINTK | |
219 | select SYS_SUPPORTS_32BIT_KERNEL | |
220 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 221 | select SYS_SUPPORTS_MIPS16 |
b3f0a250 | 222 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
03c8c407 | 223 | select USE_OF |
53d473fc | 224 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
d4a67d9d GJ |
225 | help |
226 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. | |
227 | ||
5f2d4459 KC |
228 | config BMIPS_GENERIC |
229 | bool "Broadcom Generic BMIPS kernel" | |
d59098a0 CH |
230 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
231 | select ARCH_HAS_PHYS_TO_DMA | |
d666cd02 KC |
232 | select BOOT_RAW |
233 | select NO_EXCEPT_FILL | |
234 | select USE_OF | |
235 | select CEVT_R4K | |
236 | select CSRC_R4K | |
237 | select SYNC_R4K | |
238 | select COMMON_CLK | |
c7c42ec2 | 239 | select BCM6345_L1_IRQ |
60b858f2 KC |
240 | select BCM7038_L1_IRQ |
241 | select BCM7120_L2_IRQ | |
242 | select BRCMSTB_L2_IRQ | |
67e38cf2 | 243 | select IRQ_MIPS_CPU |
60b858f2 | 244 | select DMA_NONCOHERENT |
d666cd02 | 245 | select SYS_SUPPORTS_32BIT_KERNEL |
60b858f2 | 246 | select SYS_SUPPORTS_LITTLE_ENDIAN |
d666cd02 KC |
247 | select SYS_SUPPORTS_BIG_ENDIAN |
248 | select SYS_SUPPORTS_HIGHMEM | |
60b858f2 KC |
249 | select SYS_HAS_CPU_BMIPS32_3300 |
250 | select SYS_HAS_CPU_BMIPS4350 | |
251 | select SYS_HAS_CPU_BMIPS4380 | |
d666cd02 KC |
252 | select SYS_HAS_CPU_BMIPS5000 |
253 | select SWAP_IO_SPACE | |
60b858f2 KC |
254 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
255 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
256 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
257 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
4dc4704c | 258 | select HARDIRQS_SW_RESEND |
d666cd02 | 259 | help |
5f2d4459 KC |
260 | Build a generic DT-based kernel image that boots on select |
261 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top | |
262 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN | |
263 | must be set appropriately for your board. | |
d666cd02 | 264 | |
1c0c13eb | 265 | config BCM47XX |
c619366e | 266 | bool "Broadcom BCM47XX based boards" |
fe08f8c2 | 267 | select BOOT_RAW |
42f77542 | 268 | select CEVT_R4K |
940f6b48 | 269 | select CSRC_R4K |
1c0c13eb | 270 | select DMA_NONCOHERENT |
eb01d42a | 271 | select HAVE_PCI |
67e38cf2 | 272 | select IRQ_MIPS_CPU |
314878d2 | 273 | select SYS_HAS_CPU_MIPS32_R1 |
dd54dedd | 274 | select NO_EXCEPT_FILL |
1c0c13eb AJ |
275 | select SYS_SUPPORTS_32BIT_KERNEL |
276 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 277 | select SYS_SUPPORTS_MIPS16 |
6507831f | 278 | select SYS_SUPPORTS_ZBOOT |
25e5fb97 | 279 | select SYS_HAS_EARLY_PRINTK |
e6086557 | 280 | select USE_GENERIC_EARLY_PRINTK_8250 |
c949c0bc RM |
281 | select GPIOLIB |
282 | select LEDS_GPIO_REGISTER | |
f6e734a8 | 283 | select BCM47XX_NVRAM |
2ab71a02 | 284 | select BCM47XX_SPROM |
dfe00495 | 285 | select BCM47XX_SSB if !BCM47XX_BCMA |
1c0c13eb | 286 | help |
371a4151 | 287 | Support for BCM47XX based boards |
1c0c13eb | 288 | |
e7300d04 MB |
289 | config BCM63XX |
290 | bool "Broadcom BCM63XX based boards" | |
ae8de61c | 291 | select BOOT_RAW |
e7300d04 MB |
292 | select CEVT_R4K |
293 | select CSRC_R4K | |
fc264022 | 294 | select SYNC_R4K |
e7300d04 | 295 | select DMA_NONCOHERENT |
67e38cf2 | 296 | select IRQ_MIPS_CPU |
e7300d04 MB |
297 | select SYS_SUPPORTS_32BIT_KERNEL |
298 | select SYS_SUPPORTS_BIG_ENDIAN | |
299 | select SYS_HAS_EARLY_PRINTK | |
300 | select SWAP_IO_SPACE | |
d30a2b47 | 301 | select GPIOLIB |
3e82eeeb | 302 | select HAVE_CLK |
af2418be | 303 | select MIPS_L1_CACHE_SHIFT_4 |
c5af3c2d | 304 | select CLKDEV_LOOKUP |
e7300d04 | 305 | help |
371a4151 | 306 | Support for BCM63XX based boards |
e7300d04 | 307 | |
1da177e4 | 308 | config MIPS_COBALT |
3fa986fa | 309 | bool "Cobalt Server" |
42f77542 | 310 | select CEVT_R4K |
940f6b48 | 311 | select CSRC_R4K |
1097c6ac | 312 | select CEVT_GT641XX |
1da177e4 | 313 | select DMA_NONCOHERENT |
eb01d42a | 314 | select FORCE_PCI |
d865bea4 | 315 | select I8253 |
1da177e4 | 316 | select I8259 |
67e38cf2 | 317 | select IRQ_MIPS_CPU |
d5ab1a69 | 318 | select IRQ_GT641XX |
252161ec | 319 | select PCI_GT64XXX_PCI0 |
7cf8053b | 320 | select SYS_HAS_CPU_NEVADA |
0a22e0d4 | 321 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 322 | select SYS_SUPPORTS_32BIT_KERNEL |
0e8774b6 | 323 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 324 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e6086557 | 325 | select USE_GENERIC_EARLY_PRINTK_8250 |
1da177e4 LT |
326 | |
327 | config MACH_DECSTATION | |
3fa986fa | 328 | bool "DECstations" |
1da177e4 | 329 | select BOOT_ELF32 |
6457d9fc | 330 | select CEVT_DS1287 |
81d10bad | 331 | select CEVT_R4K if CPU_R4X00 |
4247417d | 332 | select CSRC_IOASIC |
81d10bad | 333 | select CSRC_R4K if CPU_R4X00 |
20d60d99 MR |
334 | select CPU_DADDI_WORKAROUNDS if 64BIT |
335 | select CPU_R4000_WORKAROUNDS if 64BIT | |
336 | select CPU_R4400_WORKAROUNDS if 64BIT | |
1da177e4 | 337 | select DMA_NONCOHERENT |
ce816fa8 | 338 | select NO_IOPORT_MAP |
67e38cf2 | 339 | select IRQ_MIPS_CPU |
7cf8053b RB |
340 | select SYS_HAS_CPU_R3000 |
341 | select SYS_HAS_CPU_R4X00 | |
ed5ba2fb | 342 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 343 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 344 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1723b4a3 AN |
345 | select SYS_SUPPORTS_128HZ |
346 | select SYS_SUPPORTS_256HZ | |
347 | select SYS_SUPPORTS_1024HZ | |
930beb5a | 348 | select MIPS_L1_CACHE_SHIFT_4 |
5e83d430 | 349 | help |
1da177e4 LT |
350 | This enables support for DEC's MIPS based workstations. For details |
351 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the | |
352 | DECstation porting pages on <http://decstation.unix-ag.org/>. | |
353 | ||
354 | If you have one of the following DECstation Models you definitely | |
355 | want to choose R4xx0 for the CPU Type: | |
356 | ||
9308816c RB |
357 | DECstation 5000/50 |
358 | DECstation 5000/150 | |
359 | DECstation 5000/260 | |
360 | DECsystem 5900/260 | |
1da177e4 LT |
361 | |
362 | otherwise choose R3000. | |
363 | ||
5e83d430 | 364 | config MACH_JAZZ |
3fa986fa | 365 | bool "Jazz family of machines" |
39b2d756 TB |
366 | select ARC_MEMORY |
367 | select ARC_PROMLIB | |
a211a082 | 368 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 369 | select ARCH_MIGHT_HAVE_PC_SERIO |
0e2794b0 RB |
370 | select FW_ARC |
371 | select FW_ARC32 | |
5e83d430 | 372 | select ARCH_MAY_HAVE_PC_FDC |
42f77542 | 373 | select CEVT_R4K |
940f6b48 | 374 | select CSRC_R4K |
e2defae5 | 375 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
5e83d430 | 376 | select GENERIC_ISA_DMA |
8a118c38 | 377 | select HAVE_PCSPKR_PLATFORM |
67e38cf2 | 378 | select IRQ_MIPS_CPU |
d865bea4 | 379 | select I8253 |
5e83d430 RB |
380 | select I8259 |
381 | select ISA | |
7cf8053b | 382 | select SYS_HAS_CPU_R4X00 |
5e83d430 | 383 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 384 | select SYS_SUPPORTS_64BIT_KERNEL |
1723b4a3 | 385 | select SYS_SUPPORTS_100HZ |
1da177e4 | 386 | help |
371a4151 EWI |
387 | This a family of machines based on the MIPS R4030 chipset which was |
388 | used by several vendors to build RISC/os and Windows NT workstations. | |
389 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and | |
390 | Olivetti M700-10 workstations. | |
5e83d430 | 391 | |
de361e8b PB |
392 | config MACH_INGENIC |
393 | bool "Ingenic SoC based machines" | |
5ebabe59 LPC |
394 | select SYS_SUPPORTS_32BIT_KERNEL |
395 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
f9c9affc | 396 | select SYS_SUPPORTS_ZBOOT_UART16550 |
b35d2653 | 397 | select CPU_SUPPORTS_HUGEPAGES |
5ebabe59 | 398 | select DMA_NONCOHERENT |
67e38cf2 | 399 | select IRQ_MIPS_CPU |
37b4c3ca | 400 | select PINCTRL |
d30a2b47 | 401 | select GPIOLIB |
ff1930c6 | 402 | select COMMON_CLK |
83bc7692 | 403 | select GENERIC_IRQ_CHIP |
15205fc0 | 404 | select BUILTIN_DTB if MIPS_NO_APPENDED_DTB |
ffb1843d | 405 | select USE_OF |
6ec127fb | 406 | select LIBFDT |
5ebabe59 | 407 | |
171bb2f1 JC |
408 | config LANTIQ |
409 | bool "Lantiq based platforms" | |
410 | select DMA_NONCOHERENT | |
67e38cf2 | 411 | select IRQ_MIPS_CPU |
171bb2f1 JC |
412 | select CEVT_R4K |
413 | select CSRC_R4K | |
414 | select SYS_HAS_CPU_MIPS32_R1 | |
415 | select SYS_HAS_CPU_MIPS32_R2 | |
416 | select SYS_SUPPORTS_BIG_ENDIAN | |
417 | select SYS_SUPPORTS_32BIT_KERNEL | |
377cb1b6 | 418 | select SYS_SUPPORTS_MIPS16 |
171bb2f1 | 419 | select SYS_SUPPORTS_MULTITHREADING |
f35764e7 | 420 | select SYS_SUPPORTS_VPE_LOADER |
171bb2f1 | 421 | select SYS_HAS_EARLY_PRINTK |
d30a2b47 | 422 | select GPIOLIB |
171bb2f1 JC |
423 | select SWAP_IO_SPACE |
424 | select BOOT_RAW | |
287e3f3f | 425 | select CLKDEV_LOOKUP |
a0392222 | 426 | select USE_OF |
3f8c50c9 JC |
427 | select PINCTRL |
428 | select PINCTRL_LANTIQ | |
c530781c JC |
429 | select ARCH_HAS_RESET_CONTROLLER |
430 | select RESET_CONTROLLER | |
171bb2f1 | 431 | |
1f21d2bd BM |
432 | config LASAT |
433 | bool "LASAT Networks platforms" | |
42f77542 | 434 | select CEVT_R4K |
16f0bbbc | 435 | select CRC32 |
940f6b48 | 436 | select CSRC_R4K |
1f21d2bd BM |
437 | select DMA_NONCOHERENT |
438 | select SYS_HAS_EARLY_PRINTK | |
eb01d42a | 439 | select HAVE_PCI |
67e38cf2 | 440 | select IRQ_MIPS_CPU |
1f21d2bd BM |
441 | select PCI_GT64XXX_PCI0 |
442 | select MIPS_NILE4 | |
443 | select R5000_CPU_SCACHE | |
444 | select SYS_HAS_CPU_R5000 | |
445 | select SYS_SUPPORTS_32BIT_KERNEL | |
446 | select SYS_SUPPORTS_64BIT_KERNEL if BROKEN | |
447 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1f21d2bd | 448 | |
30ad29bb | 449 | config MACH_LOONGSON32 |
caed1d1b | 450 | bool "Loongson 32-bit family of machines" |
c7e8c668 | 451 | select SYS_SUPPORTS_ZBOOT |
ade299d8 | 452 | help |
30ad29bb | 453 | This enables support for the Loongson-1 family of machines. |
85749d24 | 454 | |
30ad29bb HC |
455 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
456 | the Institute of Computing Technology (ICT), Chinese Academy of | |
457 | Sciences (CAS). | |
ade299d8 | 458 | |
71e2f4dd JY |
459 | config MACH_LOONGSON2EF |
460 | bool "Loongson-2E/F family of machines" | |
ca585cf9 KC |
461 | select SYS_SUPPORTS_ZBOOT |
462 | help | |
71e2f4dd | 463 | This enables the support of early Loongson-2E/F family of machines. |
ca585cf9 | 464 | |
71e2f4dd | 465 | config MACH_LOONGSON64 |
caed1d1b | 466 | bool "Loongson 64-bit family of machines" |
6fbde6b4 JY |
467 | select ARCH_SPARSEMEM_ENABLE |
468 | select ARCH_MIGHT_HAVE_PC_PARPORT | |
469 | select ARCH_MIGHT_HAVE_PC_SERIO | |
470 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
471 | select BOOT_ELF32 | |
472 | select BOARD_SCACHE | |
473 | select CSRC_R4K | |
474 | select CEVT_R4K | |
475 | select CPU_HAS_WB | |
476 | select FORCE_PCI | |
477 | select ISA | |
478 | select I8259 | |
479 | select IRQ_MIPS_CPU | |
480 | select NR_CPUS_DEFAULT_4 | |
481 | select USE_GENERIC_EARLY_PRINTK_8250 | |
482 | select SYS_HAS_CPU_LOONGSON64 | |
483 | select SYS_HAS_EARLY_PRINTK | |
484 | select SYS_SUPPORTS_SMP | |
485 | select SYS_SUPPORTS_HOTPLUG_CPU | |
486 | select SYS_SUPPORTS_NUMA | |
487 | select SYS_SUPPORTS_64BIT_KERNEL | |
488 | select SYS_SUPPORTS_HIGHMEM | |
489 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
71e2f4dd | 490 | select SYS_SUPPORTS_ZBOOT |
6fbde6b4 JY |
491 | select LOONGSON_MC146818 |
492 | select ZONE_DMA32 | |
493 | select NUMA | |
71e2f4dd | 494 | help |
caed1d1b HC |
495 | This enables the support of Loongson-2/3 family of machines. |
496 | ||
497 | Loongson-2 and Loongson-3 are 64-bit general-purpose processors with | |
498 | GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E | |
499 | and Loongson-2F which will be removed), developed by the Institute | |
500 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS). | |
ca585cf9 | 501 | |
6a438309 AB |
502 | config MACH_PISTACHIO |
503 | bool "IMG Pistachio SoC based boards" | |
6a438309 AB |
504 | select BOOT_ELF32 |
505 | select BOOT_RAW | |
506 | select CEVT_R4K | |
507 | select CLKSRC_MIPS_GIC | |
508 | select COMMON_CLK | |
509 | select CSRC_R4K | |
645c7827 | 510 | select DMA_NONCOHERENT |
d30a2b47 | 511 | select GPIOLIB |
67e38cf2 | 512 | select IRQ_MIPS_CPU |
6a438309 AB |
513 | select LIBFDT |
514 | select MFD_SYSCON | |
515 | select MIPS_CPU_SCACHE | |
516 | select MIPS_GIC | |
517 | select PINCTRL | |
518 | select REGULATOR | |
519 | select SYS_HAS_CPU_MIPS32_R2 | |
520 | select SYS_SUPPORTS_32BIT_KERNEL | |
521 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
522 | select SYS_SUPPORTS_MIPS_CPS | |
523 | select SYS_SUPPORTS_MULTITHREADING | |
41cc07be | 524 | select SYS_SUPPORTS_RELOCATABLE |
6a438309 | 525 | select SYS_SUPPORTS_ZBOOT |
018f62ee EG |
526 | select SYS_HAS_EARLY_PRINTK |
527 | select USE_GENERIC_EARLY_PRINTK_8250 | |
6a438309 AB |
528 | select USE_OF |
529 | help | |
530 | This enables support for the IMG Pistachio SoC platform. | |
531 | ||
1da177e4 | 532 | config MIPS_MALTA |
3fa986fa | 533 | bool "MIPS Malta board" |
61ed242d | 534 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 535 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 536 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 537 | select BOOT_ELF32 |
fa71c960 | 538 | select BOOT_RAW |
e8823d26 | 539 | select BUILTIN_DTB |
42f77542 | 540 | select CEVT_R4K |
fa5635a2 | 541 | select CLKSRC_MIPS_GIC |
42b002ab | 542 | select COMMON_CLK |
47bf2b03 | 543 | select CSRC_R4K |
885014bc | 544 | select DMA_MAYBE_COHERENT |
1da177e4 | 545 | select GENERIC_ISA_DMA |
8a118c38 | 546 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 547 | select HAVE_PCI |
d865bea4 | 548 | select I8253 |
1da177e4 | 549 | select I8259 |
47bf2b03 MK |
550 | select IRQ_MIPS_CPU |
551 | select LIBFDT | |
5e83d430 | 552 | select MIPS_BONITO64 |
9318c51a | 553 | select MIPS_CPU_SCACHE |
47bf2b03 | 554 | select MIPS_GIC |
a7ef1ead | 555 | select MIPS_L1_CACHE_SHIFT_6 |
5e83d430 | 556 | select MIPS_MSC |
47bf2b03 | 557 | select PCI_GT64XXX_PCI0 |
ecafe3e9 | 558 | select SMP_UP if SMP |
1da177e4 | 559 | select SWAP_IO_SPACE |
7cf8053b RB |
560 | select SYS_HAS_CPU_MIPS32_R1 |
561 | select SYS_HAS_CPU_MIPS32_R2 | |
bfc3c5a6 | 562 | select SYS_HAS_CPU_MIPS32_R3_5 |
c5b36783 | 563 | select SYS_HAS_CPU_MIPS32_R5 |
575509b6 | 564 | select SYS_HAS_CPU_MIPS32_R6 |
7cf8053b | 565 | select SYS_HAS_CPU_MIPS64_R1 |
5d9fbed1 | 566 | select SYS_HAS_CPU_MIPS64_R2 |
575509b6 | 567 | select SYS_HAS_CPU_MIPS64_R6 |
7cf8053b RB |
568 | select SYS_HAS_CPU_NEVADA |
569 | select SYS_HAS_CPU_RM7000 | |
ed5ba2fb YY |
570 | select SYS_SUPPORTS_32BIT_KERNEL |
571 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 572 | select SYS_SUPPORTS_BIG_ENDIAN |
c5b36783 | 573 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 574 | select SYS_SUPPORTS_LITTLE_ENDIAN |
424ebcdf | 575 | select SYS_SUPPORTS_MICROMIPS |
47bf2b03 | 576 | select SYS_SUPPORTS_MIPS16 |
0365070f | 577 | select SYS_SUPPORTS_MIPS_CMP |
e56b6aa6 | 578 | select SYS_SUPPORTS_MIPS_CPS |
f41ae0b2 | 579 | select SYS_SUPPORTS_MULTITHREADING |
47bf2b03 | 580 | select SYS_SUPPORTS_RELOCATABLE |
9693a853 | 581 | select SYS_SUPPORTS_SMARTMIPS |
f35764e7 | 582 | select SYS_SUPPORTS_VPE_LOADER |
1b93b3c3 | 583 | select SYS_SUPPORTS_ZBOOT |
e8823d26 | 584 | select USE_OF |
abcc82b1 | 585 | select ZONE_DMA32 if 64BIT |
1da177e4 | 586 | help |
f638d197 | 587 | This enables support for the MIPS Technologies Malta evaluation |
1da177e4 LT |
588 | board. |
589 | ||
2572f00d JH |
590 | config MACH_PIC32 |
591 | bool "Microchip PIC32 Family" | |
592 | help | |
593 | This enables support for the Microchip PIC32 family of platforms. | |
594 | ||
595 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core | |
596 | microcontrollers. | |
597 | ||
a83860c2 RB |
598 | config NEC_MARKEINS |
599 | bool "NEC EMMA2RH Mark-eins board" | |
600 | select SOC_EMMA2RH | |
eb01d42a | 601 | select HAVE_PCI |
a83860c2 RB |
602 | help |
603 | This enables support for the NEC Electronics Mark-eins boards. | |
ade299d8 | 604 | |
5e83d430 | 605 | config MACH_VR41XX |
74142d65 | 606 | bool "NEC VR4100 series based machines" |
42f77542 | 607 | select CEVT_R4K |
940f6b48 | 608 | select CSRC_R4K |
7cf8053b | 609 | select SYS_HAS_CPU_VR41XX |
377cb1b6 | 610 | select SYS_SUPPORTS_MIPS16 |
d30a2b47 | 611 | select GPIOLIB |
5e83d430 | 612 | |
edb6310a DL |
613 | config NXP_STB220 |
614 | bool "NXP STB220 board" | |
615 | select SOC_PNX833X | |
616 | help | |
371a4151 | 617 | Support for NXP Semiconductors STB220 Development Board. |
edb6310a DL |
618 | |
619 | config NXP_STB225 | |
620 | bool "NXP 225 board" | |
621 | select SOC_PNX833X | |
622 | select SOC_PNX8335 | |
623 | help | |
371a4151 | 624 | Support for NXP Semiconductors STB225 Development Board. |
edb6310a | 625 | |
9267a30d MSJ |
626 | config PMC_MSP |
627 | bool "PMC-Sierra MSP chipsets" | |
39d30c13 A |
628 | select CEVT_R4K |
629 | select CSRC_R4K | |
9267a30d MSJ |
630 | select DMA_NONCOHERENT |
631 | select SWAP_IO_SPACE | |
632 | select NO_EXCEPT_FILL | |
633 | select BOOT_RAW | |
634 | select SYS_HAS_CPU_MIPS32_R1 | |
635 | select SYS_HAS_CPU_MIPS32_R2 | |
636 | select SYS_SUPPORTS_32BIT_KERNEL | |
637 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 638 | select SYS_SUPPORTS_MIPS16 |
67e38cf2 | 639 | select IRQ_MIPS_CPU |
9267a30d MSJ |
640 | select SERIAL_8250 |
641 | select SERIAL_8250_CONSOLE | |
9296d94d FF |
642 | select USB_EHCI_BIG_ENDIAN_MMIO |
643 | select USB_EHCI_BIG_ENDIAN_DESC | |
9267a30d MSJ |
644 | help |
645 | This adds support for the PMC-Sierra family of Multi-Service | |
646 | Processor System-On-A-Chips. These parts include a number | |
647 | of integrated peripherals, interfaces and DSPs in addition to | |
648 | a variety of MIPS cores. | |
649 | ||
ae2b5bb6 JC |
650 | config RALINK |
651 | bool "Ralink based machines" | |
652 | select CEVT_R4K | |
653 | select CSRC_R4K | |
654 | select BOOT_RAW | |
655 | select DMA_NONCOHERENT | |
67e38cf2 | 656 | select IRQ_MIPS_CPU |
ae2b5bb6 JC |
657 | select USE_OF |
658 | select SYS_HAS_CPU_MIPS32_R1 | |
659 | select SYS_HAS_CPU_MIPS32_R2 | |
660 | select SYS_SUPPORTS_32BIT_KERNEL | |
661 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 662 | select SYS_SUPPORTS_MIPS16 |
ae2b5bb6 | 663 | select SYS_HAS_EARLY_PRINTK |
ae2b5bb6 | 664 | select CLKDEV_LOOKUP |
2a153f1c JC |
665 | select ARCH_HAS_RESET_CONTROLLER |
666 | select RESET_CONTROLLER | |
ae2b5bb6 | 667 | |
1da177e4 | 668 | config SGI_IP22 |
3fa986fa | 669 | bool "SGI IP22 (Indy/Indigo2)" |
c0de00b2 | 670 | select ARC_MEMORY |
39b2d756 | 671 | select ARC_PROMLIB |
0e2794b0 RB |
672 | select FW_ARC |
673 | select FW_ARC32 | |
7a407aa5 | 674 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 675 | select BOOT_ELF32 |
42f77542 | 676 | select CEVT_R4K |
940f6b48 | 677 | select CSRC_R4K |
e2defae5 | 678 | select DEFAULT_SGI_PARTITION |
1da177e4 | 679 | select DMA_NONCOHERENT |
6630a8e5 | 680 | select HAVE_EISA |
d865bea4 | 681 | select I8253 |
68de4803 | 682 | select I8259 |
1da177e4 | 683 | select IP22_CPU_SCACHE |
67e38cf2 | 684 | select IRQ_MIPS_CPU |
aa414dff | 685 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
e2defae5 TB |
686 | select SGI_HAS_I8042 |
687 | select SGI_HAS_INDYDOG | |
36e5c21d | 688 | select SGI_HAS_HAL2 |
e2defae5 TB |
689 | select SGI_HAS_SEEQ |
690 | select SGI_HAS_WD93 | |
691 | select SGI_HAS_ZILOG | |
1da177e4 | 692 | select SWAP_IO_SPACE |
7cf8053b RB |
693 | select SYS_HAS_CPU_R4X00 |
694 | select SYS_HAS_CPU_R5000 | |
c0de00b2 | 695 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb YY |
696 | select SYS_SUPPORTS_32BIT_KERNEL |
697 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 698 | select SYS_SUPPORTS_BIG_ENDIAN |
930beb5a | 699 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
700 | help |
701 | This are the SGI Indy, Challenge S and Indigo2, as well as certain | |
702 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel | |
703 | that runs on these, say Y here. | |
704 | ||
705 | config SGI_IP27 | |
3fa986fa | 706 | bool "SGI IP27 (Origin200/2000)" |
54aed4dd | 707 | select ARCH_HAS_PHYS_TO_DMA |
397dc00e | 708 | select ARCH_SPARSEMEM_ENABLE |
0e2794b0 RB |
709 | select FW_ARC |
710 | select FW_ARC64 | |
e9422427 | 711 | select ARC_CMDLINE_ONLY |
5e83d430 | 712 | select BOOT_ELF64 |
e2defae5 | 713 | select DEFAULT_SGI_PARTITION |
36a88530 | 714 | select SYS_HAS_EARLY_PRINTK |
eb01d42a | 715 | select HAVE_PCI |
69a07a41 | 716 | select IRQ_MIPS_CPU |
e6308b6d | 717 | select IRQ_DOMAIN_HIERARCHY |
130e2fb7 | 718 | select NR_CPUS_DEFAULT_64 |
a57140e9 TB |
719 | select PCI_DRIVERS_GENERIC |
720 | select PCI_XTALK_BRIDGE | |
7cf8053b | 721 | select SYS_HAS_CPU_R10000 |
ed5ba2fb | 722 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 723 | select SYS_SUPPORTS_BIG_ENDIAN |
d8cb4e11 | 724 | select SYS_SUPPORTS_NUMA |
1a5c5de1 | 725 | select SYS_SUPPORTS_SMP |
930beb5a | 726 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
727 | help |
728 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics | |
729 | workstations. To compile a Linux kernel that runs on these, say Y | |
730 | here. | |
731 | ||
e2defae5 | 732 | config SGI_IP28 |
7d60717e | 733 | bool "SGI IP28 (Indigo2 R10k)" |
c0de00b2 | 734 | select ARC_MEMORY |
39b2d756 | 735 | select ARC_PROMLIB |
0e2794b0 RB |
736 | select FW_ARC |
737 | select FW_ARC64 | |
7a407aa5 | 738 | select ARCH_MIGHT_HAVE_PC_SERIO |
e2defae5 TB |
739 | select BOOT_ELF64 |
740 | select CEVT_R4K | |
741 | select CSRC_R4K | |
742 | select DEFAULT_SGI_PARTITION | |
743 | select DMA_NONCOHERENT | |
744 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
67e38cf2 | 745 | select IRQ_MIPS_CPU |
6630a8e5 | 746 | select HAVE_EISA |
e2defae5 TB |
747 | select I8253 |
748 | select I8259 | |
e2defae5 TB |
749 | select SGI_HAS_I8042 |
750 | select SGI_HAS_INDYDOG | |
5b438c44 | 751 | select SGI_HAS_HAL2 |
e2defae5 TB |
752 | select SGI_HAS_SEEQ |
753 | select SGI_HAS_WD93 | |
754 | select SGI_HAS_ZILOG | |
755 | select SWAP_IO_SPACE | |
756 | select SYS_HAS_CPU_R10000 | |
c0de00b2 | 757 | select SYS_HAS_EARLY_PRINTK |
e2defae5 TB |
758 | select SYS_SUPPORTS_64BIT_KERNEL |
759 | select SYS_SUPPORTS_BIG_ENDIAN | |
dc24d68d | 760 | select MIPS_L1_CACHE_SHIFT_7 |
371a4151 EWI |
761 | help |
762 | This is the SGI Indigo2 with R10000 processor. To compile a Linux | |
763 | kernel that runs on these, say Y here. | |
e2defae5 | 764 | |
7505576d TB |
765 | config SGI_IP30 |
766 | bool "SGI IP30 (Octane/Octane2)" | |
767 | select ARCH_HAS_PHYS_TO_DMA | |
768 | select FW_ARC | |
769 | select FW_ARC64 | |
770 | select BOOT_ELF64 | |
771 | select CEVT_R4K | |
772 | select CSRC_R4K | |
773 | select SYNC_R4K if SMP | |
774 | select ZONE_DMA32 | |
775 | select HAVE_PCI | |
776 | select IRQ_MIPS_CPU | |
777 | select IRQ_DOMAIN_HIERARCHY | |
778 | select NR_CPUS_DEFAULT_2 | |
779 | select PCI_DRIVERS_GENERIC | |
780 | select PCI_XTALK_BRIDGE | |
781 | select SYS_HAS_EARLY_PRINTK | |
782 | select SYS_HAS_CPU_R10000 | |
783 | select SYS_SUPPORTS_64BIT_KERNEL | |
784 | select SYS_SUPPORTS_BIG_ENDIAN | |
785 | select SYS_SUPPORTS_SMP | |
786 | select MIPS_L1_CACHE_SHIFT_7 | |
787 | select ARC_MEMORY | |
788 | help | |
789 | These are the SGI Octane and Octane2 graphics workstations. To | |
790 | compile a Linux kernel that runs on these, say Y here. | |
791 | ||
1da177e4 | 792 | config SGI_IP32 |
cfd2afc0 | 793 | bool "SGI IP32 (O2)" |
39b2d756 TB |
794 | select ARC_MEMORY |
795 | select ARC_PROMLIB | |
03df8229 | 796 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
797 | select FW_ARC |
798 | select FW_ARC32 | |
1da177e4 | 799 | select BOOT_ELF32 |
42f77542 | 800 | select CEVT_R4K |
940f6b48 | 801 | select CSRC_R4K |
1da177e4 | 802 | select DMA_NONCOHERENT |
eb01d42a | 803 | select HAVE_PCI |
67e38cf2 | 804 | select IRQ_MIPS_CPU |
1da177e4 LT |
805 | select R5000_CPU_SCACHE |
806 | select RM7000_CPU_SCACHE | |
7cf8053b RB |
807 | select SYS_HAS_CPU_R5000 |
808 | select SYS_HAS_CPU_R10000 if BROKEN | |
809 | select SYS_HAS_CPU_RM7000 | |
dd2f18fe | 810 | select SYS_HAS_CPU_NEVADA |
ed5ba2fb | 811 | select SYS_SUPPORTS_64BIT_KERNEL |
23fbee9d | 812 | select SYS_SUPPORTS_BIG_ENDIAN |
23fbee9d | 813 | help |
5e83d430 | 814 | If you want this kernel to run on SGI O2 workstation, say Y here. |
1da177e4 | 815 | |
ade299d8 YY |
816 | config SIBYTE_CRHINE |
817 | bool "Sibyte BCM91120C-CRhine" | |
9a6dcea1 | 818 | select BOOT_ELF32 |
ade299d8 | 819 | select SIBYTE_BCM1120 |
9a6dcea1 | 820 | select SWAP_IO_SPACE |
7cf8053b | 821 | select SYS_HAS_CPU_SB1 |
9a6dcea1 AI |
822 | select SYS_SUPPORTS_BIG_ENDIAN |
823 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
824 | ||
ade299d8 YY |
825 | config SIBYTE_CARMEL |
826 | bool "Sibyte BCM91120x-Carmel" | |
5e83d430 | 827 | select BOOT_ELF32 |
ade299d8 | 828 | select SIBYTE_BCM1120 |
5e83d430 | 829 | select SWAP_IO_SPACE |
7cf8053b | 830 | select SYS_HAS_CPU_SB1 |
81731f79 | 831 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 832 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 833 | |
ade299d8 YY |
834 | config SIBYTE_CRHONE |
835 | bool "Sibyte BCM91125C-CRhone" | |
5e83d430 | 836 | select BOOT_ELF32 |
ade299d8 | 837 | select SIBYTE_BCM1125 |
5e83d430 | 838 | select SWAP_IO_SPACE |
7cf8053b | 839 | select SYS_HAS_CPU_SB1 |
5e83d430 | 840 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 841 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 842 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 843 | |
5e83d430 | 844 | config SIBYTE_RHONE |
3fa986fa | 845 | bool "Sibyte BCM91125E-Rhone" |
5e83d430 | 846 | select BOOT_ELF32 |
5e83d430 RB |
847 | select SIBYTE_BCM1125H |
848 | select SWAP_IO_SPACE | |
7cf8053b | 849 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
850 | select SYS_SUPPORTS_BIG_ENDIAN |
851 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1da177e4 | 852 | |
ade299d8 YY |
853 | config SIBYTE_SWARM |
854 | bool "Sibyte BCM91250A-SWARM" | |
5e83d430 | 855 | select BOOT_ELF32 |
fcf3ca4c | 856 | select HAVE_PATA_PLATFORM |
ade299d8 | 857 | select SIBYTE_SB1250 |
5e83d430 | 858 | select SWAP_IO_SPACE |
7cf8053b | 859 | select SYS_HAS_CPU_SB1 |
5e83d430 | 860 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 861 | select SYS_SUPPORTS_HIGHMEM |
e3ad1c23 | 862 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 863 | select ZONE_DMA32 if 64BIT |
e4849aff | 864 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
e3ad1c23 | 865 | |
ade299d8 YY |
866 | config SIBYTE_LITTLESUR |
867 | bool "Sibyte BCM91250C2-LittleSur" | |
5e83d430 | 868 | select BOOT_ELF32 |
fcf3ca4c | 869 | select HAVE_PATA_PLATFORM |
5e83d430 RB |
870 | select SIBYTE_SB1250 |
871 | select SWAP_IO_SPACE | |
7cf8053b | 872 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
873 | select SYS_SUPPORTS_BIG_ENDIAN |
874 | select SYS_SUPPORTS_HIGHMEM | |
875 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
756d6d83 | 876 | select ZONE_DMA32 if 64BIT |
1da177e4 | 877 | |
ade299d8 YY |
878 | config SIBYTE_SENTOSA |
879 | bool "Sibyte BCM91250E-Sentosa" | |
5e83d430 | 880 | select BOOT_ELF32 |
5e83d430 RB |
881 | select SIBYTE_SB1250 |
882 | select SWAP_IO_SPACE | |
7cf8053b | 883 | select SYS_HAS_CPU_SB1 |
5e83d430 | 884 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 885 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e4849aff | 886 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 887 | |
ade299d8 YY |
888 | config SIBYTE_BIGSUR |
889 | bool "Sibyte BCM91480B-BigSur" | |
5e83d430 | 890 | select BOOT_ELF32 |
ade299d8 | 891 | select NR_CPUS_DEFAULT_4 |
ade299d8 | 892 | select SIBYTE_BCM1x80 |
5e83d430 | 893 | select SWAP_IO_SPACE |
7cf8053b | 894 | select SYS_HAS_CPU_SB1 |
5e83d430 | 895 | select SYS_SUPPORTS_BIG_ENDIAN |
651194f8 | 896 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 897 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 898 | select ZONE_DMA32 if 64BIT |
e4849aff | 899 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 900 | |
14b36af4 TB |
901 | config SNI_RM |
902 | bool "SNI RM200/300/400" | |
39b2d756 TB |
903 | select ARC_MEMORY |
904 | select ARC_PROMLIB | |
0e2794b0 RB |
905 | select FW_ARC if CPU_LITTLE_ENDIAN |
906 | select FW_ARC32 if CPU_LITTLE_ENDIAN | |
aaa9fad3 | 907 | select FW_SNIPROM if CPU_BIG_ENDIAN |
61ed242d | 908 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 909 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 910 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 911 | select BOOT_ELF32 |
42f77542 | 912 | select CEVT_R4K |
940f6b48 | 913 | select CSRC_R4K |
e2defae5 | 914 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
1da177e4 LT |
915 | select DMA_NONCOHERENT |
916 | select GENERIC_ISA_DMA | |
6630a8e5 | 917 | select HAVE_EISA |
8a118c38 | 918 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 919 | select HAVE_PCI |
67e38cf2 | 920 | select IRQ_MIPS_CPU |
d865bea4 | 921 | select I8253 |
1da177e4 LT |
922 | select I8259 |
923 | select ISA | |
4a0312fc | 924 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
7cf8053b | 925 | select SYS_HAS_CPU_R4X00 |
4a0312fc | 926 | select SYS_HAS_CPU_R5000 |
c066a32a | 927 | select SYS_HAS_CPU_R10000 |
4a0312fc | 928 | select R5000_CPU_SCACHE |
36a88530 | 929 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 930 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 931 | select SYS_SUPPORTS_64BIT_KERNEL |
4a0312fc | 932 | select SYS_SUPPORTS_BIG_ENDIAN |
797798c1 | 933 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 934 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 935 | help |
14b36af4 TB |
936 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
937 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid | |
1da177e4 LT |
938 | Technology and now in turn merged with Fujitsu. Say Y here to |
939 | support this machine type. | |
940 | ||
edcaf1a6 AN |
941 | config MACH_TX39XX |
942 | bool "Toshiba TX39 series based machines" | |
5e83d430 | 943 | |
edcaf1a6 AN |
944 | config MACH_TX49XX |
945 | bool "Toshiba TX49 series based machines" | |
5e83d430 | 946 | |
73b4390f RB |
947 | config MIKROTIK_RB532 |
948 | bool "Mikrotik RB532 boards" | |
949 | select CEVT_R4K | |
950 | select CSRC_R4K | |
951 | select DMA_NONCOHERENT | |
eb01d42a | 952 | select HAVE_PCI |
67e38cf2 | 953 | select IRQ_MIPS_CPU |
73b4390f RB |
954 | select SYS_HAS_CPU_MIPS32_R1 |
955 | select SYS_SUPPORTS_32BIT_KERNEL | |
956 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
957 | select SWAP_IO_SPACE | |
958 | select BOOT_RAW | |
d30a2b47 | 959 | select GPIOLIB |
930beb5a | 960 | select MIPS_L1_CACHE_SHIFT_4 |
73b4390f RB |
961 | help |
962 | Support the Mikrotik(tm) RouterBoard 532 series, | |
963 | based on the IDT RC32434 SoC. | |
964 | ||
9ddebc46 DD |
965 | config CAVIUM_OCTEON_SOC |
966 | bool "Cavium Networks Octeon SoC based boards" | |
a86c7f72 | 967 | select CEVT_R4K |
ea8c64ac | 968 | select ARCH_HAS_PHYS_TO_DMA |
1753d50c | 969 | select HAVE_RAPIDIO |
d4a451d5 | 970 | select PHYS_ADDR_T_64BIT |
a86c7f72 DD |
971 | select SYS_SUPPORTS_64BIT_KERNEL |
972 | select SYS_SUPPORTS_BIG_ENDIAN | |
f65aad41 | 973 | select EDAC_SUPPORT |
b01aec9b | 974 | select EDAC_ATOMIC_SCRUB |
73569d87 DD |
975 | select SYS_SUPPORTS_LITTLE_ENDIAN |
976 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN | |
a86c7f72 | 977 | select SYS_HAS_EARLY_PRINTK |
5e683389 | 978 | select SYS_HAS_CPU_CAVIUM_OCTEON |
eb01d42a | 979 | select HAVE_PCI |
f00e001e | 980 | select ZONE_DMA32 |
465aaed0 | 981 | select HOLES_IN_ZONE |
d30a2b47 | 982 | select GPIOLIB |
6e511163 DD |
983 | select LIBFDT |
984 | select USE_OF | |
985 | select ARCH_SPARSEMEM_ENABLE | |
986 | select SYS_SUPPORTS_SMP | |
7820b84b DD |
987 | select NR_CPUS_DEFAULT_64 |
988 | select MIPS_NR_CPU_NR_MAP_1024 | |
e326479f | 989 | select BUILTIN_DTB |
8c1e6b14 | 990 | select MTD_COMPLEX_MAPPINGS |
09230cbc | 991 | select SWIOTLB |
3ff72be4 | 992 | select SYS_SUPPORTS_RELOCATABLE |
a86c7f72 DD |
993 | help |
994 | This option supports all of the Octeon reference boards from Cavium | |
995 | Networks. It builds a kernel that dynamically determines the Octeon | |
996 | CPU type and supports all known board reference implementations. | |
997 | Some of the supported boards are: | |
998 | EBT3000 | |
999 | EBH3000 | |
1000 | EBH3100 | |
1001 | Thunder | |
1002 | Kodama | |
1003 | Hikari | |
1004 | Say Y here for most Octeon reference boards. | |
1005 | ||
7f058e85 J |
1006 | config NLM_XLR_BOARD |
1007 | bool "Netlogic XLR/XLS based systems" | |
7f058e85 J |
1008 | select BOOT_ELF32 |
1009 | select NLM_COMMON | |
7f058e85 J |
1010 | select SYS_HAS_CPU_XLR |
1011 | select SYS_SUPPORTS_SMP | |
eb01d42a | 1012 | select HAVE_PCI |
7f058e85 J |
1013 | select SWAP_IO_SPACE |
1014 | select SYS_SUPPORTS_32BIT_KERNEL | |
1015 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 1016 | select PHYS_ADDR_T_64BIT |
7f058e85 J |
1017 | select SYS_SUPPORTS_BIG_ENDIAN |
1018 | select SYS_SUPPORTS_HIGHMEM | |
7f058e85 J |
1019 | select NR_CPUS_DEFAULT_32 |
1020 | select CEVT_R4K | |
1021 | select CSRC_R4K | |
67e38cf2 | 1022 | select IRQ_MIPS_CPU |
b97215fd | 1023 | select ZONE_DMA32 if 64BIT |
7f058e85 J |
1024 | select SYNC_R4K |
1025 | select SYS_HAS_EARLY_PRINTK | |
8f0b0430 J |
1026 | select SYS_SUPPORTS_ZBOOT |
1027 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
7f058e85 J |
1028 | help |
1029 | Support for systems based on Netlogic XLR and XLS processors. | |
1030 | Say Y here if you have a XLR or XLS based board. | |
1031 | ||
1c773ea4 J |
1032 | config NLM_XLP_BOARD |
1033 | bool "Netlogic XLP based systems" | |
1c773ea4 J |
1034 | select BOOT_ELF32 |
1035 | select NLM_COMMON | |
1036 | select SYS_HAS_CPU_XLP | |
1037 | select SYS_SUPPORTS_SMP | |
eb01d42a | 1038 | select HAVE_PCI |
1c773ea4 J |
1039 | select SYS_SUPPORTS_32BIT_KERNEL |
1040 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 1041 | select PHYS_ADDR_T_64BIT |
d30a2b47 | 1042 | select GPIOLIB |
1c773ea4 J |
1043 | select SYS_SUPPORTS_BIG_ENDIAN |
1044 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1045 | select SYS_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1046 | select NR_CPUS_DEFAULT_32 |
1047 | select CEVT_R4K | |
1048 | select CSRC_R4K | |
67e38cf2 | 1049 | select IRQ_MIPS_CPU |
b97215fd | 1050 | select ZONE_DMA32 if 64BIT |
1c773ea4 J |
1051 | select SYNC_R4K |
1052 | select SYS_HAS_EARLY_PRINTK | |
2f6528e1 | 1053 | select USE_OF |
8f0b0430 J |
1054 | select SYS_SUPPORTS_ZBOOT |
1055 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
1c773ea4 J |
1056 | help |
1057 | This board is based on Netlogic XLP Processor. | |
1058 | Say Y here if you have a XLP based board. | |
1059 | ||
9bc463be DD |
1060 | config MIPS_PARAVIRT |
1061 | bool "Para-Virtualized guest system" | |
1062 | select CEVT_R4K | |
1063 | select CSRC_R4K | |
9bc463be DD |
1064 | select SYS_SUPPORTS_64BIT_KERNEL |
1065 | select SYS_SUPPORTS_32BIT_KERNEL | |
1066 | select SYS_SUPPORTS_BIG_ENDIAN | |
1067 | select SYS_SUPPORTS_SMP | |
1068 | select NR_CPUS_DEFAULT_4 | |
1069 | select SYS_HAS_EARLY_PRINTK | |
1070 | select SYS_HAS_CPU_MIPS32_R2 | |
1071 | select SYS_HAS_CPU_MIPS64_R2 | |
1072 | select SYS_HAS_CPU_CAVIUM_OCTEON | |
eb01d42a | 1073 | select HAVE_PCI |
9bc463be DD |
1074 | select SWAP_IO_SPACE |
1075 | help | |
1076 | This option supports guest running under ???? | |
1077 | ||
5e83d430 | 1078 | endchoice |
1da177e4 | 1079 | |
e8c7c482 | 1080 | source "arch/mips/alchemy/Kconfig" |
3b12308f | 1081 | source "arch/mips/ath25/Kconfig" |
d4a67d9d | 1082 | source "arch/mips/ath79/Kconfig" |
a656ffcb | 1083 | source "arch/mips/bcm47xx/Kconfig" |
e7300d04 | 1084 | source "arch/mips/bcm63xx/Kconfig" |
8945e37e | 1085 | source "arch/mips/bmips/Kconfig" |
eed0eabd | 1086 | source "arch/mips/generic/Kconfig" |
5e83d430 | 1087 | source "arch/mips/jazz/Kconfig" |
5ebabe59 | 1088 | source "arch/mips/jz4740/Kconfig" |
8ec6d935 | 1089 | source "arch/mips/lantiq/Kconfig" |
1f21d2bd | 1090 | source "arch/mips/lasat/Kconfig" |
2572f00d | 1091 | source "arch/mips/pic32/Kconfig" |
af0cfb2c | 1092 | source "arch/mips/pistachio/Kconfig" |
0f3a05cb | 1093 | source "arch/mips/pmcs-msp71xx/Kconfig" |
ae2b5bb6 | 1094 | source "arch/mips/ralink/Kconfig" |
29c48699 | 1095 | source "arch/mips/sgi-ip27/Kconfig" |
38b18f72 | 1096 | source "arch/mips/sibyte/Kconfig" |
22b1d707 | 1097 | source "arch/mips/txx9/Kconfig" |
5e83d430 | 1098 | source "arch/mips/vr41xx/Kconfig" |
a86c7f72 | 1099 | source "arch/mips/cavium-octeon/Kconfig" |
71e2f4dd | 1100 | source "arch/mips/loongson2ef/Kconfig" |
30ad29bb HC |
1101 | source "arch/mips/loongson32/Kconfig" |
1102 | source "arch/mips/loongson64/Kconfig" | |
7f058e85 | 1103 | source "arch/mips/netlogic/Kconfig" |
ae6e7e63 | 1104 | source "arch/mips/paravirt/Kconfig" |
38b18f72 | 1105 | |
5e83d430 RB |
1106 | endmenu |
1107 | ||
3c9ee7ef AM |
1108 | config GENERIC_HWEIGHT |
1109 | bool | |
1110 | default y | |
1111 | ||
1da177e4 LT |
1112 | config GENERIC_CALIBRATE_DELAY |
1113 | bool | |
1114 | default y | |
1115 | ||
ae1e9130 | 1116 | config SCHED_OMIT_FRAME_POINTER |
1cc89038 AN |
1117 | bool |
1118 | default y | |
1119 | ||
1da177e4 LT |
1120 | # |
1121 | # Select some configuration options automatically based on user selections. | |
1122 | # | |
0e2794b0 | 1123 | config FW_ARC |
1da177e4 | 1124 | bool |
1da177e4 | 1125 | |
61ed242d RB |
1126 | config ARCH_MAY_HAVE_PC_FDC |
1127 | bool | |
1128 | ||
9267a30d MSJ |
1129 | config BOOT_RAW |
1130 | bool | |
1131 | ||
217dd11e RB |
1132 | config CEVT_BCM1480 |
1133 | bool | |
1134 | ||
6457d9fc YY |
1135 | config CEVT_DS1287 |
1136 | bool | |
1137 | ||
1097c6ac YY |
1138 | config CEVT_GT641XX |
1139 | bool | |
1140 | ||
42f77542 RB |
1141 | config CEVT_R4K |
1142 | bool | |
1143 | ||
217dd11e RB |
1144 | config CEVT_SB1250 |
1145 | bool | |
1146 | ||
229f773e AN |
1147 | config CEVT_TXX9 |
1148 | bool | |
1149 | ||
217dd11e RB |
1150 | config CSRC_BCM1480 |
1151 | bool | |
1152 | ||
4247417d YY |
1153 | config CSRC_IOASIC |
1154 | bool | |
1155 | ||
940f6b48 RB |
1156 | config CSRC_R4K |
1157 | bool | |
1158 | ||
217dd11e RB |
1159 | config CSRC_SB1250 |
1160 | bool | |
1161 | ||
a7f4df4e AS |
1162 | config MIPS_CLOCK_VSYSCALL |
1163 | def_bool CSRC_R4K || CLKSRC_MIPS_GIC | |
1164 | ||
a9aec7fe | 1165 | config GPIO_TXX9 |
d30a2b47 | 1166 | select GPIOLIB |
a9aec7fe AN |
1167 | bool |
1168 | ||
0e2794b0 | 1169 | config FW_CFE |
df78b5c8 AJ |
1170 | bool |
1171 | ||
40e084a5 RB |
1172 | config ARCH_SUPPORTS_UPROBES |
1173 | bool | |
1174 | ||
885014bc | 1175 | config DMA_MAYBE_COHERENT |
f3ecc0ff | 1176 | select ARCH_HAS_DMA_COHERENCE_H |
885014bc FF |
1177 | select DMA_NONCOHERENT |
1178 | bool | |
1179 | ||
20d33064 PB |
1180 | config DMA_PERDEV_COHERENT |
1181 | bool | |
347cb6af | 1182 | select ARCH_HAS_SETUP_DMA_OPS |
5748e1b3 | 1183 | select DMA_NONCOHERENT |
20d33064 | 1184 | |
4ce588cd RB |
1185 | config DMA_NONCOHERENT |
1186 | bool | |
db91427b CH |
1187 | # |
1188 | # MIPS allows mixing "slightly different" Cacheability and Coherency | |
1189 | # Attribute bits. It is believed that the uncached access through | |
1190 | # KSEG1 and the implementation specific "uncached accelerated" used | |
1191 | # by pgprot_writcombine can be mixed, and the latter sometimes provides | |
1192 | # significant advantages. | |
1193 | # | |
419e2f18 | 1194 | select ARCH_HAS_DMA_WRITE_COMBINE |
f8c55dc6 | 1195 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
2ee7a4ef | 1196 | select ARCH_HAS_UNCACHED_SEGMENT |
34dc0ea6 | 1197 | select DMA_NONCOHERENT_MMAP |
f8c55dc6 | 1198 | select DMA_NONCOHERENT_CACHE_SYNC |
34dc0ea6 | 1199 | select NEED_DMA_MAP_STATE |
4ce588cd | 1200 | |
36a88530 | 1201 | config SYS_HAS_EARLY_PRINTK |
1da177e4 | 1202 | bool |
1da177e4 | 1203 | |
1b2bc75c | 1204 | config SYS_SUPPORTS_HOTPLUG_CPU |
dbb74540 | 1205 | bool |
dbb74540 | 1206 | |
1da177e4 LT |
1207 | config MIPS_BONITO64 |
1208 | bool | |
1da177e4 LT |
1209 | |
1210 | config MIPS_MSC | |
1211 | bool | |
1da177e4 | 1212 | |
1f21d2bd BM |
1213 | config MIPS_NILE4 |
1214 | bool | |
1215 | ||
39b8d525 RB |
1216 | config SYNC_R4K |
1217 | bool | |
1218 | ||
487d70d0 GJ |
1219 | config MIPS_MACHINE |
1220 | def_bool n | |
1221 | ||
ce816fa8 | 1222 | config NO_IOPORT_MAP |
d388d685 MR |
1223 | def_bool n |
1224 | ||
4e0748f5 MC |
1225 | config GENERIC_CSUM |
1226 | bool | |
932afdee | 1227 | default y if !CPU_HAS_LOAD_STORE_LR |
4e0748f5 | 1228 | |
8313da30 RB |
1229 | config GENERIC_ISA_DMA |
1230 | bool | |
1231 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n | |
a35bee8a | 1232 | select ISA_DMA_API |
8313da30 | 1233 | |
aa414dff RB |
1234 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
1235 | bool | |
8313da30 | 1236 | select GENERIC_ISA_DMA |
aa414dff | 1237 | |
a35bee8a NK |
1238 | config ISA_DMA_API |
1239 | bool | |
1240 | ||
465aaed0 DD |
1241 | config HOLES_IN_ZONE |
1242 | bool | |
1243 | ||
8c530ea3 MR |
1244 | config SYS_SUPPORTS_RELOCATABLE |
1245 | bool | |
1246 | help | |
371a4151 EWI |
1247 | Selected if the platform supports relocating the kernel. |
1248 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF | |
1249 | to allow access to command line and entropy sources. | |
8c530ea3 | 1250 | |
f381bf6d DD |
1251 | config MIPS_CBPF_JIT |
1252 | def_bool y | |
1253 | depends on BPF_JIT && HAVE_CBPF_JIT | |
1254 | ||
1255 | config MIPS_EBPF_JIT | |
1256 | def_bool y | |
1257 | depends on BPF_JIT && HAVE_EBPF_JIT | |
1258 | ||
1259 | ||
5e83d430 | 1260 | # |
6b2aac42 | 1261 | # Endianness selection. Sufficiently obscure so many users don't know what to |
5e83d430 RB |
1262 | # answer,so we try hard to limit the available choices. Also the use of a |
1263 | # choice statement should be more obvious to the user. | |
1264 | # | |
1265 | choice | |
6b2aac42 | 1266 | prompt "Endianness selection" |
1da177e4 LT |
1267 | help |
1268 | Some MIPS machines can be configured for either little or big endian | |
5e83d430 | 1269 | byte order. These modes require different kernels and a different |
3cb2fccc | 1270 | Linux distribution. In general there is one preferred byteorder for a |
5e83d430 | 1271 | particular system but some systems are just as commonly used in the |
3dde6ad8 | 1272 | one or the other endianness. |
5e83d430 RB |
1273 | |
1274 | config CPU_BIG_ENDIAN | |
1275 | bool "Big endian" | |
1276 | depends on SYS_SUPPORTS_BIG_ENDIAN | |
1277 | ||
1278 | config CPU_LITTLE_ENDIAN | |
1279 | bool "Little endian" | |
1280 | depends on SYS_SUPPORTS_LITTLE_ENDIAN | |
5e83d430 RB |
1281 | |
1282 | endchoice | |
1283 | ||
22b0763a DD |
1284 | config EXPORT_UASM |
1285 | bool | |
1286 | ||
2116245e RB |
1287 | config SYS_SUPPORTS_APM_EMULATION |
1288 | bool | |
1289 | ||
5e83d430 RB |
1290 | config SYS_SUPPORTS_BIG_ENDIAN |
1291 | bool | |
1292 | ||
1293 | config SYS_SUPPORTS_LITTLE_ENDIAN | |
1294 | bool | |
1da177e4 | 1295 | |
9cffd154 DD |
1296 | config SYS_SUPPORTS_HUGETLBFS |
1297 | bool | |
45e03e62 | 1298 | depends on CPU_SUPPORTS_HUGEPAGES |
9cffd154 DD |
1299 | default y |
1300 | ||
aa1762f4 DD |
1301 | config MIPS_HUGE_TLB_SUPPORT |
1302 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE | |
1303 | ||
1da177e4 LT |
1304 | config IRQ_CPU_RM7K |
1305 | bool | |
1306 | ||
9267a30d MSJ |
1307 | config IRQ_MSP_SLP |
1308 | bool | |
1309 | ||
1310 | config IRQ_MSP_CIC | |
1311 | bool | |
1312 | ||
8420fd00 AN |
1313 | config IRQ_TXX9 |
1314 | bool | |
1315 | ||
d5ab1a69 YY |
1316 | config IRQ_GT641XX |
1317 | bool | |
1318 | ||
252161ec | 1319 | config PCI_GT64XXX_PCI0 |
1da177e4 | 1320 | bool |
1da177e4 | 1321 | |
a57140e9 TB |
1322 | config PCI_XTALK_BRIDGE |
1323 | bool | |
1324 | ||
9267a30d MSJ |
1325 | config NO_EXCEPT_FILL |
1326 | bool | |
1327 | ||
a83860c2 RB |
1328 | config SOC_EMMA2RH |
1329 | bool | |
1330 | select CEVT_R4K | |
1331 | select CSRC_R4K | |
1332 | select DMA_NONCOHERENT | |
67e38cf2 | 1333 | select IRQ_MIPS_CPU |
a83860c2 RB |
1334 | select SWAP_IO_SPACE |
1335 | select SYS_HAS_CPU_R5500 | |
1336 | select SYS_SUPPORTS_32BIT_KERNEL | |
1337 | select SYS_SUPPORTS_64BIT_KERNEL | |
1338 | select SYS_SUPPORTS_BIG_ENDIAN | |
1339 | ||
edb6310a DL |
1340 | config SOC_PNX833X |
1341 | bool | |
1342 | select CEVT_R4K | |
1343 | select CSRC_R4K | |
67e38cf2 | 1344 | select IRQ_MIPS_CPU |
edb6310a DL |
1345 | select DMA_NONCOHERENT |
1346 | select SYS_HAS_CPU_MIPS32_R2 | |
1347 | select SYS_SUPPORTS_32BIT_KERNEL | |
1348 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1349 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 1350 | select SYS_SUPPORTS_MIPS16 |
edb6310a DL |
1351 | select CPU_MIPSR2_IRQ_VI |
1352 | ||
1353 | config SOC_PNX8335 | |
1354 | bool | |
1355 | select SOC_PNX833X | |
1356 | ||
a7e07b1a MC |
1357 | config MIPS_SPRAM |
1358 | bool | |
1359 | ||
1da177e4 LT |
1360 | config SWAP_IO_SPACE |
1361 | bool | |
1362 | ||
e2defae5 TB |
1363 | config SGI_HAS_INDYDOG |
1364 | bool | |
1365 | ||
5b438c44 TB |
1366 | config SGI_HAS_HAL2 |
1367 | bool | |
1368 | ||
e2defae5 TB |
1369 | config SGI_HAS_SEEQ |
1370 | bool | |
1371 | ||
1372 | config SGI_HAS_WD93 | |
1373 | bool | |
1374 | ||
1375 | config SGI_HAS_ZILOG | |
1376 | bool | |
1377 | ||
1378 | config SGI_HAS_I8042 | |
1379 | bool | |
1380 | ||
1381 | config DEFAULT_SGI_PARTITION | |
1382 | bool | |
1383 | ||
0e2794b0 | 1384 | config FW_ARC32 |
5e83d430 RB |
1385 | bool |
1386 | ||
aaa9fad3 | 1387 | config FW_SNIPROM |
231a35d3 TB |
1388 | bool |
1389 | ||
1da177e4 LT |
1390 | config BOOT_ELF32 |
1391 | bool | |
1da177e4 | 1392 | |
930beb5a FF |
1393 | config MIPS_L1_CACHE_SHIFT_4 |
1394 | bool | |
1395 | ||
1396 | config MIPS_L1_CACHE_SHIFT_5 | |
1397 | bool | |
1398 | ||
1399 | config MIPS_L1_CACHE_SHIFT_6 | |
1400 | bool | |
1401 | ||
1402 | config MIPS_L1_CACHE_SHIFT_7 | |
1403 | bool | |
1404 | ||
1da177e4 LT |
1405 | config MIPS_L1_CACHE_SHIFT |
1406 | int | |
a4c0201e | 1407 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
5432eeb6 KC |
1408 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
1409 | default "5" if MIPS_L1_CACHE_SHIFT_5 | |
1410 | default "4" if MIPS_L1_CACHE_SHIFT_4 | |
1da177e4 LT |
1411 | default "5" |
1412 | ||
1da177e4 LT |
1413 | config HAVE_STD_PC_SERIAL_PORT |
1414 | bool | |
1415 | ||
e9422427 TB |
1416 | config ARC_CMDLINE_ONLY |
1417 | bool | |
1418 | ||
1da177e4 LT |
1419 | config ARC_CONSOLE |
1420 | bool "ARC console support" | |
e2defae5 | 1421 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
1da177e4 LT |
1422 | |
1423 | config ARC_MEMORY | |
1424 | bool | |
1da177e4 LT |
1425 | |
1426 | config ARC_PROMLIB | |
1427 | bool | |
1da177e4 | 1428 | |
0e2794b0 | 1429 | config FW_ARC64 |
1da177e4 | 1430 | bool |
1da177e4 LT |
1431 | |
1432 | config BOOT_ELF64 | |
1433 | bool | |
1da177e4 | 1434 | |
1da177e4 LT |
1435 | menu "CPU selection" |
1436 | ||
1437 | choice | |
1438 | prompt "CPU type" | |
1439 | default CPU_R4X00 | |
1440 | ||
268a2d60 | 1441 | config CPU_LOONGSON64 |
caed1d1b | 1442 | bool "Loongson 64-bit CPU" |
268a2d60 | 1443 | depends on SYS_HAS_CPU_LOONGSON64 |
d3bc81be | 1444 | select ARCH_HAS_PHYS_TO_DMA |
0e476d91 HC |
1445 | select CPU_SUPPORTS_64BIT_KERNEL |
1446 | select CPU_SUPPORTS_HIGHMEM | |
1447 | select CPU_SUPPORTS_HUGEPAGES | |
7507445b | 1448 | select CPU_SUPPORTS_MSA |
932afdee | 1449 | select CPU_HAS_LOAD_STORE_LR |
0e476d91 HC |
1450 | select WEAK_ORDERING |
1451 | select WEAK_REORDERING_BEYOND_LLSC | |
7507445b | 1452 | select MIPS_ASID_BITS_VARIABLE |
b2edcfc8 | 1453 | select MIPS_PGD_C0_CONTEXT |
17c99d94 | 1454 | select MIPS_L1_CACHE_SHIFT_6 |
d30a2b47 | 1455 | select GPIOLIB |
09230cbc | 1456 | select SWIOTLB |
0e476d91 | 1457 | help |
caed1d1b HC |
1458 | The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor |
1459 | cores implements the MIPS64R2 instruction set with many extensions, | |
1460 | including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, | |
1461 | 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old | |
1462 | Loongson-2E/2F is not covered here and will be removed in future. | |
1463 | ||
1464 | config LOONGSON3_ENHANCEMENT | |
1465 | bool "New Loongson-3 CPU Enhancements" | |
1e820da3 HC |
1466 | default n |
1467 | select CPU_MIPSR2 | |
1468 | select CPU_HAS_PREFETCH | |
268a2d60 | 1469 | depends on CPU_LOONGSON64 |
1e820da3 | 1470 | help |
caed1d1b | 1471 | New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A |
1e820da3 | 1472 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as |
268a2d60 | 1473 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User |
1e820da3 HC |
1474 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), |
1475 | Fast TLB refill support, etc. | |
1476 | ||
1477 | This option enable those enhancements which are not probed at run | |
1478 | time. If you want a generic kernel to run on all Loongson 3 machines, | |
1479 | please say 'N' here. If you want a high-performance kernel to run on | |
caed1d1b | 1480 | new Loongson-3 machines only, please say 'Y' here. |
1e820da3 | 1481 | |
e02e07e3 | 1482 | config CPU_LOONGSON3_WORKAROUNDS |
caed1d1b | 1483 | bool "Old Loongson-3 LLSC Workarounds" |
e02e07e3 | 1484 | default y if SMP |
268a2d60 | 1485 | depends on CPU_LOONGSON64 |
e02e07e3 | 1486 | help |
caed1d1b | 1487 | Loongson-3 processors have the llsc issues which require workarounds. |
e02e07e3 HC |
1488 | Without workarounds the system may hang unexpectedly. |
1489 | ||
caed1d1b | 1490 | Newer Loongson-3 will fix these issues and no workarounds are needed. |
e02e07e3 HC |
1491 | The workarounds have no significant side effect on them but may |
1492 | decrease the performance of the system so this option should be | |
1493 | disabled unless the kernel is intended to be run on old systems. | |
1494 | ||
1495 | If unsure, please say Y. | |
1496 | ||
3702bba5 WZ |
1497 | config CPU_LOONGSON2E |
1498 | bool "Loongson 2E" | |
1499 | depends on SYS_HAS_CPU_LOONGSON2E | |
268a2d60 | 1500 | select CPU_LOONGSON2EF |
2a21c730 FZ |
1501 | help |
1502 | The Loongson 2E processor implements the MIPS III instruction set | |
1503 | with many extensions. | |
1504 | ||
25985edc | 1505 | It has an internal FPGA northbridge, which is compatible to |
6f7a251a WZ |
1506 | bonito64. |
1507 | ||
1508 | config CPU_LOONGSON2F | |
1509 | bool "Loongson 2F" | |
1510 | depends on SYS_HAS_CPU_LOONGSON2F | |
268a2d60 | 1511 | select CPU_LOONGSON2EF |
d30a2b47 | 1512 | select GPIOLIB |
6f7a251a WZ |
1513 | help |
1514 | The Loongson 2F processor implements the MIPS III instruction set | |
1515 | with many extensions. | |
1516 | ||
1517 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | |
1518 | have a similar programming interface with FPGA northbridge used in | |
1519 | Loongson2E. | |
1520 | ||
ca585cf9 KC |
1521 | config CPU_LOONGSON1B |
1522 | bool "Loongson 1B" | |
1523 | depends on SYS_HAS_CPU_LOONGSON1B | |
b2afb64c | 1524 | select CPU_LOONGSON32 |
9ec88b60 | 1525 | select LEDS_GPIO_REGISTER |
ca585cf9 KC |
1526 | help |
1527 | The Loongson 1B is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1528 | Release 1 instruction set and part of the MIPS32 Release 2 |
1529 | instruction set. | |
ca585cf9 | 1530 | |
12e3280b YL |
1531 | config CPU_LOONGSON1C |
1532 | bool "Loongson 1C" | |
1533 | depends on SYS_HAS_CPU_LOONGSON1C | |
b2afb64c | 1534 | select CPU_LOONGSON32 |
12e3280b YL |
1535 | select LEDS_GPIO_REGISTER |
1536 | help | |
1537 | The Loongson 1C is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1538 | Release 1 instruction set and part of the MIPS32 Release 2 |
1539 | instruction set. | |
12e3280b | 1540 | |
6e760c8d RB |
1541 | config CPU_MIPS32_R1 |
1542 | bool "MIPS32 Release 1" | |
7cf8053b | 1543 | depends on SYS_HAS_CPU_MIPS32_R1 |
6e760c8d | 1544 | select CPU_HAS_PREFETCH |
932afdee | 1545 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1546 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1547 | select CPU_SUPPORTS_HIGHMEM |
1e5f1caa | 1548 | help |
5e83d430 | 1549 | Choose this option to build a kernel for release 1 or later of the |
1e5f1caa RB |
1550 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1551 | MIPS processor are based on a MIPS32 processor. If you know the | |
1552 | specific type of processor in your system, choose those that one | |
1553 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1554 | Release 2 of the MIPS32 architecture is available since several | |
1555 | years so chances are you even have a MIPS32 Release 2 processor | |
1556 | in which case you should choose CPU_MIPS32_R2 instead for better | |
1557 | performance. | |
1558 | ||
1559 | config CPU_MIPS32_R2 | |
1560 | bool "MIPS32 Release 2" | |
7cf8053b | 1561 | depends on SYS_HAS_CPU_MIPS32_R2 |
1e5f1caa | 1562 | select CPU_HAS_PREFETCH |
932afdee | 1563 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1564 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1565 | select CPU_SUPPORTS_HIGHMEM |
a5e9a69e | 1566 | select CPU_SUPPORTS_MSA |
2235a54d | 1567 | select HAVE_KVM |
6e760c8d | 1568 | help |
5e83d430 | 1569 | Choose this option to build a kernel for release 2 or later of the |
6e760c8d RB |
1570 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1571 | MIPS processor are based on a MIPS32 processor. If you know the | |
1572 | specific type of processor in your system, choose those that one | |
1573 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1574 | ||
7fd08ca5 | 1575 | config CPU_MIPS32_R6 |
674d10e2 | 1576 | bool "MIPS32 Release 6" |
7fd08ca5 LY |
1577 | depends on SYS_HAS_CPU_MIPS32_R6 |
1578 | select CPU_HAS_PREFETCH | |
1579 | select CPU_SUPPORTS_32BIT_KERNEL | |
1580 | select CPU_SUPPORTS_HIGHMEM | |
1581 | select CPU_SUPPORTS_MSA | |
1582 | select HAVE_KVM | |
1583 | select MIPS_O32_FP64_SUPPORT | |
1584 | help | |
1585 | Choose this option to build a kernel for release 6 or later of the | |
1586 | MIPS32 architecture. New MIPS processors, starting with the Warrior | |
1587 | family, are based on a MIPS32r6 processor. If you own an older | |
1588 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. | |
1589 | ||
6e760c8d RB |
1590 | config CPU_MIPS64_R1 |
1591 | bool "MIPS64 Release 1" | |
7cf8053b | 1592 | depends on SYS_HAS_CPU_MIPS64_R1 |
797798c1 | 1593 | select CPU_HAS_PREFETCH |
932afdee | 1594 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1595 | select CPU_SUPPORTS_32BIT_KERNEL |
1596 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1597 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1598 | select CPU_SUPPORTS_HUGEPAGES |
6e760c8d RB |
1599 | help |
1600 | Choose this option to build a kernel for release 1 or later of the | |
1601 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1602 | MIPS processor are based on a MIPS64 processor. If you know the | |
1603 | specific type of processor in your system, choose those that one | |
1604 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1e5f1caa RB |
1605 | Release 2 of the MIPS64 architecture is available since several |
1606 | years so chances are you even have a MIPS64 Release 2 processor | |
1607 | in which case you should choose CPU_MIPS64_R2 instead for better | |
1608 | performance. | |
1609 | ||
1610 | config CPU_MIPS64_R2 | |
1611 | bool "MIPS64 Release 2" | |
7cf8053b | 1612 | depends on SYS_HAS_CPU_MIPS64_R2 |
797798c1 | 1613 | select CPU_HAS_PREFETCH |
932afdee | 1614 | select CPU_HAS_LOAD_STORE_LR |
1e5f1caa RB |
1615 | select CPU_SUPPORTS_32BIT_KERNEL |
1616 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1617 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1618 | select CPU_SUPPORTS_HUGEPAGES |
a5e9a69e | 1619 | select CPU_SUPPORTS_MSA |
40a2df49 | 1620 | select HAVE_KVM |
1e5f1caa RB |
1621 | help |
1622 | Choose this option to build a kernel for release 2 or later of the | |
1623 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1624 | MIPS processor are based on a MIPS64 processor. If you know the | |
1625 | specific type of processor in your system, choose those that one | |
1626 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1da177e4 | 1627 | |
7fd08ca5 | 1628 | config CPU_MIPS64_R6 |
674d10e2 | 1629 | bool "MIPS64 Release 6" |
7fd08ca5 LY |
1630 | depends on SYS_HAS_CPU_MIPS64_R6 |
1631 | select CPU_HAS_PREFETCH | |
1632 | select CPU_SUPPORTS_32BIT_KERNEL | |
1633 | select CPU_SUPPORTS_64BIT_KERNEL | |
1634 | select CPU_SUPPORTS_HIGHMEM | |
afd375dc | 1635 | select CPU_SUPPORTS_HUGEPAGES |
7fd08ca5 | 1636 | select CPU_SUPPORTS_MSA |
2e6c7747 | 1637 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
40a2df49 | 1638 | select HAVE_KVM |
7fd08ca5 LY |
1639 | help |
1640 | Choose this option to build a kernel for release 6 or later of the | |
1641 | MIPS64 architecture. New MIPS processors, starting with the Warrior | |
1642 | family, are based on a MIPS64r6 processor. If you own an older | |
1643 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. | |
1644 | ||
1da177e4 LT |
1645 | config CPU_R3000 |
1646 | bool "R3000" | |
7cf8053b | 1647 | depends on SYS_HAS_CPU_R3000 |
f7062ddb | 1648 | select CPU_HAS_WB |
932afdee | 1649 | select CPU_HAS_LOAD_STORE_LR |
54746829 | 1650 | select CPU_R3K_TLB |
ed5ba2fb | 1651 | select CPU_SUPPORTS_32BIT_KERNEL |
797798c1 | 1652 | select CPU_SUPPORTS_HIGHMEM |
1da177e4 LT |
1653 | help |
1654 | Please make sure to pick the right CPU type. Linux/MIPS is not | |
1655 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will | |
1656 | *not* work on R4000 machines and vice versa. However, since most | |
1657 | of the supported machines have an R4000 (or similar) CPU, R4x00 | |
1658 | might be a safe bet. If the resulting kernel does not work, | |
1659 | try to recompile with R3000. | |
1660 | ||
1661 | config CPU_TX39XX | |
1662 | bool "R39XX" | |
7cf8053b | 1663 | depends on SYS_HAS_CPU_TX39XX |
ed5ba2fb | 1664 | select CPU_SUPPORTS_32BIT_KERNEL |
932afdee | 1665 | select CPU_HAS_LOAD_STORE_LR |
54746829 | 1666 | select CPU_R3K_TLB |
1da177e4 LT |
1667 | |
1668 | config CPU_VR41XX | |
1669 | bool "R41xx" | |
7cf8053b | 1670 | depends on SYS_HAS_CPU_VR41XX |
ed5ba2fb YY |
1671 | select CPU_SUPPORTS_32BIT_KERNEL |
1672 | select CPU_SUPPORTS_64BIT_KERNEL | |
932afdee | 1673 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 | 1674 | help |
5e83d430 | 1675 | The options selects support for the NEC VR4100 series of processors. |
1da177e4 LT |
1676 | Only choose this option if you have one of these processors as a |
1677 | kernel built with this option will not run on any other type of | |
1678 | processor or vice versa. | |
1679 | ||
1da177e4 LT |
1680 | config CPU_R4X00 |
1681 | bool "R4x00" | |
7cf8053b | 1682 | depends on SYS_HAS_CPU_R4X00 |
ed5ba2fb YY |
1683 | select CPU_SUPPORTS_32BIT_KERNEL |
1684 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1685 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1686 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1687 | help |
1688 | MIPS Technologies R4000-series processors other than 4300, including | |
1689 | the R4000, R4400, R4600, and 4700. | |
1690 | ||
1691 | config CPU_TX49XX | |
1692 | bool "R49XX" | |
7cf8053b | 1693 | depends on SYS_HAS_CPU_TX49XX |
de862b48 | 1694 | select CPU_HAS_PREFETCH |
932afdee | 1695 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1696 | select CPU_SUPPORTS_32BIT_KERNEL |
1697 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1698 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1699 | |
1700 | config CPU_R5000 | |
1701 | bool "R5000" | |
7cf8053b | 1702 | depends on SYS_HAS_CPU_R5000 |
ed5ba2fb YY |
1703 | select CPU_SUPPORTS_32BIT_KERNEL |
1704 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1705 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1706 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1707 | help |
1708 | MIPS Technologies R5000-series processors other than the Nevada. | |
1709 | ||
542c1020 SK |
1710 | config CPU_R5500 |
1711 | bool "R5500" | |
1712 | depends on SYS_HAS_CPU_R5500 | |
542c1020 SK |
1713 | select CPU_SUPPORTS_32BIT_KERNEL |
1714 | select CPU_SUPPORTS_64BIT_KERNEL | |
9cffd154 | 1715 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1716 | select CPU_HAS_LOAD_STORE_LR |
542c1020 SK |
1717 | help |
1718 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV | |
1719 | instruction set. | |
1720 | ||
1da177e4 LT |
1721 | config CPU_NEVADA |
1722 | bool "RM52xx" | |
7cf8053b | 1723 | depends on SYS_HAS_CPU_NEVADA |
ed5ba2fb YY |
1724 | select CPU_SUPPORTS_32BIT_KERNEL |
1725 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1726 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1727 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1728 | help |
1729 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. | |
1730 | ||
1da177e4 LT |
1731 | config CPU_R10000 |
1732 | bool "R10000" | |
7cf8053b | 1733 | depends on SYS_HAS_CPU_R10000 |
5e83d430 | 1734 | select CPU_HAS_PREFETCH |
932afdee | 1735 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1736 | select CPU_SUPPORTS_32BIT_KERNEL |
1737 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1738 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1739 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1740 | help |
1741 | MIPS Technologies R10000-series processors. | |
1742 | ||
1743 | config CPU_RM7000 | |
1744 | bool "RM7000" | |
7cf8053b | 1745 | depends on SYS_HAS_CPU_RM7000 |
5e83d430 | 1746 | select CPU_HAS_PREFETCH |
932afdee | 1747 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1748 | select CPU_SUPPORTS_32BIT_KERNEL |
1749 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1750 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1751 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1752 | |
1753 | config CPU_SB1 | |
1754 | bool "SB1" | |
7cf8053b | 1755 | depends on SYS_HAS_CPU_SB1 |
932afdee | 1756 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1757 | select CPU_SUPPORTS_32BIT_KERNEL |
1758 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1759 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1760 | select CPU_SUPPORTS_HUGEPAGES |
0004a9df | 1761 | select WEAK_ORDERING |
1da177e4 | 1762 | |
a86c7f72 DD |
1763 | config CPU_CAVIUM_OCTEON |
1764 | bool "Cavium Octeon processor" | |
5e683389 | 1765 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
a86c7f72 | 1766 | select CPU_HAS_PREFETCH |
932afdee | 1767 | select CPU_HAS_LOAD_STORE_LR |
a86c7f72 | 1768 | select CPU_SUPPORTS_64BIT_KERNEL |
a86c7f72 | 1769 | select WEAK_ORDERING |
a86c7f72 | 1770 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1771 | select CPU_SUPPORTS_HUGEPAGES |
df115f3e BH |
1772 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
1773 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
930beb5a | 1774 | select MIPS_L1_CACHE_SHIFT_7 |
0ae3abcd | 1775 | select HAVE_KVM |
a86c7f72 DD |
1776 | help |
1777 | The Cavium Octeon processor is a highly integrated chip containing | |
1778 | many ethernet hardware widgets for networking tasks. The processor | |
1779 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. | |
1780 | Full details can be found at http://www.caviumnetworks.com. | |
1781 | ||
cd746249 JG |
1782 | config CPU_BMIPS |
1783 | bool "Broadcom BMIPS" | |
1784 | depends on SYS_HAS_CPU_BMIPS | |
1785 | select CPU_MIPS32 | |
fe7f62c0 | 1786 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
cd746249 JG |
1787 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
1788 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 | |
1789 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 | |
1790 | select CPU_SUPPORTS_32BIT_KERNEL | |
1791 | select DMA_NONCOHERENT | |
67e38cf2 | 1792 | select IRQ_MIPS_CPU |
cd746249 JG |
1793 | select SWAP_IO_SPACE |
1794 | select WEAK_ORDERING | |
c1c0c461 | 1795 | select CPU_SUPPORTS_HIGHMEM |
69aaf9c8 | 1796 | select CPU_HAS_PREFETCH |
932afdee | 1797 | select CPU_HAS_LOAD_STORE_LR |
a8d709b0 MM |
1798 | select CPU_SUPPORTS_CPUFREQ |
1799 | select MIPS_EXTERNAL_TIMER | |
c1c0c461 | 1800 | help |
fe7f62c0 | 1801 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
c1c0c461 | 1802 | |
7f058e85 J |
1803 | config CPU_XLR |
1804 | bool "Netlogic XLR SoC" | |
1805 | depends on SYS_HAS_CPU_XLR | |
932afdee | 1806 | select CPU_HAS_LOAD_STORE_LR |
7f058e85 J |
1807 | select CPU_SUPPORTS_32BIT_KERNEL |
1808 | select CPU_SUPPORTS_64BIT_KERNEL | |
1809 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1810 | select CPU_SUPPORTS_HUGEPAGES |
7f058e85 J |
1811 | select WEAK_ORDERING |
1812 | select WEAK_REORDERING_BEYOND_LLSC | |
7f058e85 J |
1813 | help |
1814 | Netlogic Microsystems XLR/XLS processors. | |
1c773ea4 J |
1815 | |
1816 | config CPU_XLP | |
1817 | bool "Netlogic XLP SoC" | |
1818 | depends on SYS_HAS_CPU_XLP | |
1819 | select CPU_SUPPORTS_32BIT_KERNEL | |
1820 | select CPU_SUPPORTS_64BIT_KERNEL | |
1821 | select CPU_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1822 | select WEAK_ORDERING |
1823 | select WEAK_REORDERING_BEYOND_LLSC | |
1824 | select CPU_HAS_PREFETCH | |
932afdee | 1825 | select CPU_HAS_LOAD_STORE_LR |
d6504846 | 1826 | select CPU_MIPSR2 |
ddba6833 | 1827 | select CPU_SUPPORTS_HUGEPAGES |
2db003a5 | 1828 | select MIPS_ASID_BITS_VARIABLE |
1c773ea4 J |
1829 | help |
1830 | Netlogic Microsystems XLP processors. | |
1da177e4 LT |
1831 | endchoice |
1832 | ||
a6e18781 LY |
1833 | config CPU_MIPS32_3_5_FEATURES |
1834 | bool "MIPS32 Release 3.5 Features" | |
1835 | depends on SYS_HAS_CPU_MIPS32_R3_5 | |
7fd08ca5 | 1836 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 |
a6e18781 LY |
1837 | help |
1838 | Choose this option to build a kernel for release 2 or later of the | |
1839 | MIPS32 architecture including features from the 3.5 release such as | |
1840 | support for Enhanced Virtual Addressing (EVA). | |
1841 | ||
1842 | config CPU_MIPS32_3_5_EVA | |
1843 | bool "Enhanced Virtual Addressing (EVA)" | |
1844 | depends on CPU_MIPS32_3_5_FEATURES | |
1845 | select EVA | |
1846 | default y | |
1847 | help | |
1848 | Choose this option if you want to enable the Enhanced Virtual | |
1849 | Addressing (EVA) on your MIPS32 core (such as proAptiv). | |
1850 | One of its primary benefits is an increase in the maximum size | |
1851 | of lowmem (up to 3GB). If unsure, say 'N' here. | |
1852 | ||
c5b36783 SH |
1853 | config CPU_MIPS32_R5_FEATURES |
1854 | bool "MIPS32 Release 5 Features" | |
1855 | depends on SYS_HAS_CPU_MIPS32_R5 | |
1856 | depends on CPU_MIPS32_R2 | |
1857 | help | |
1858 | Choose this option to build a kernel for release 2 or later of the | |
1859 | MIPS32 architecture including features from release 5 such as | |
1860 | support for Extended Physical Addressing (XPA). | |
1861 | ||
1862 | config CPU_MIPS32_R5_XPA | |
1863 | bool "Extended Physical Addressing (XPA)" | |
1864 | depends on CPU_MIPS32_R5_FEATURES | |
1865 | depends on !EVA | |
1866 | depends on !PAGE_SIZE_4KB | |
1867 | depends on SYS_SUPPORTS_HIGHMEM | |
1868 | select XPA | |
1869 | select HIGHMEM | |
d4a451d5 | 1870 | select PHYS_ADDR_T_64BIT |
c5b36783 SH |
1871 | default n |
1872 | help | |
1873 | Choose this option if you want to enable the Extended Physical | |
1874 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The | |
1875 | benefit is to increase physical addressing equal to or greater | |
1876 | than 40 bits. Note that this has the side effect of turning on | |
1877 | 64-bit addressing which in turn makes the PTEs 64-bit in size. | |
1878 | If unsure, say 'N' here. | |
1879 | ||
622844bf WZ |
1880 | if CPU_LOONGSON2F |
1881 | config CPU_NOP_WORKAROUNDS | |
1882 | bool | |
1883 | ||
1884 | config CPU_JUMP_WORKAROUNDS | |
1885 | bool | |
1886 | ||
1887 | config CPU_LOONGSON2F_WORKAROUNDS | |
1888 | bool "Loongson 2F Workarounds" | |
1889 | default y | |
1890 | select CPU_NOP_WORKAROUNDS | |
1891 | select CPU_JUMP_WORKAROUNDS | |
1892 | help | |
1893 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which | |
1894 | require workarounds. Without workarounds the system may hang | |
1895 | unexpectedly. For more information please refer to the gas | |
1896 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. | |
1897 | ||
1898 | Loongson 2F03 and later have fixed these issues and no workarounds | |
1899 | are needed. The workarounds have no significant side effect on them | |
1900 | but may decrease the performance of the system so this option should | |
1901 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 | |
1902 | systems. | |
1903 | ||
1904 | If unsure, please say Y. | |
1905 | endif # CPU_LOONGSON2F | |
1906 | ||
1b93b3c3 WZ |
1907 | config SYS_SUPPORTS_ZBOOT |
1908 | bool | |
1909 | select HAVE_KERNEL_GZIP | |
1910 | select HAVE_KERNEL_BZIP2 | |
31c4867d | 1911 | select HAVE_KERNEL_LZ4 |
1b93b3c3 | 1912 | select HAVE_KERNEL_LZMA |
fe1d45e0 | 1913 | select HAVE_KERNEL_LZO |
4e23eb63 | 1914 | select HAVE_KERNEL_XZ |
1b93b3c3 WZ |
1915 | |
1916 | config SYS_SUPPORTS_ZBOOT_UART16550 | |
1917 | bool | |
1918 | select SYS_SUPPORTS_ZBOOT | |
1919 | ||
dbb98314 AB |
1920 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
1921 | bool | |
1922 | select SYS_SUPPORTS_ZBOOT | |
1923 | ||
268a2d60 | 1924 | config CPU_LOONGSON2EF |
3702bba5 WZ |
1925 | bool |
1926 | select CPU_SUPPORTS_32BIT_KERNEL | |
1927 | select CPU_SUPPORTS_64BIT_KERNEL | |
1928 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1929 | select CPU_SUPPORTS_HUGEPAGES |
e905086e | 1930 | select ARCH_HAS_PHYS_TO_DMA |
932afdee | 1931 | select CPU_HAS_LOAD_STORE_LR |
3702bba5 | 1932 | |
b2afb64c | 1933 | config CPU_LOONGSON32 |
ca585cf9 KC |
1934 | bool |
1935 | select CPU_MIPS32 | |
7e280f6b | 1936 | select CPU_MIPSR2 |
ca585cf9 | 1937 | select CPU_HAS_PREFETCH |
932afdee | 1938 | select CPU_HAS_LOAD_STORE_LR |
ca585cf9 KC |
1939 | select CPU_SUPPORTS_32BIT_KERNEL |
1940 | select CPU_SUPPORTS_HIGHMEM | |
f29ad10d | 1941 | select CPU_SUPPORTS_CPUFREQ |
ca585cf9 | 1942 | |
fe7f62c0 | 1943 | config CPU_BMIPS32_3300 |
04fa8bf7 | 1944 | select SMP_UP if SMP |
1bbb6c1b | 1945 | bool |
cd746249 JG |
1946 | |
1947 | config CPU_BMIPS4350 | |
1948 | bool | |
1949 | select SYS_SUPPORTS_SMP | |
1950 | select SYS_SUPPORTS_HOTPLUG_CPU | |
1951 | ||
1952 | config CPU_BMIPS4380 | |
1953 | bool | |
bbf2ba67 | 1954 | select MIPS_L1_CACHE_SHIFT_6 |
cd746249 JG |
1955 | select SYS_SUPPORTS_SMP |
1956 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1957 | select CPU_HAS_RIXI |
cd746249 JG |
1958 | |
1959 | config CPU_BMIPS5000 | |
1960 | bool | |
cd746249 | 1961 | select MIPS_CPU_SCACHE |
bbf2ba67 | 1962 | select MIPS_L1_CACHE_SHIFT_7 |
cd746249 JG |
1963 | select SYS_SUPPORTS_SMP |
1964 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1965 | select CPU_HAS_RIXI |
1bbb6c1b | 1966 | |
268a2d60 | 1967 | config SYS_HAS_CPU_LOONGSON64 |
0e476d91 HC |
1968 | bool |
1969 | select CPU_SUPPORTS_CPUFREQ | |
b2edcfc8 | 1970 | select CPU_HAS_RIXI |
0e476d91 | 1971 | |
3702bba5 | 1972 | config SYS_HAS_CPU_LOONGSON2E |
2a21c730 FZ |
1973 | bool |
1974 | ||
6f7a251a WZ |
1975 | config SYS_HAS_CPU_LOONGSON2F |
1976 | bool | |
55045ff5 WZ |
1977 | select CPU_SUPPORTS_CPUFREQ |
1978 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT | |
6f7a251a | 1979 | |
ca585cf9 KC |
1980 | config SYS_HAS_CPU_LOONGSON1B |
1981 | bool | |
1982 | ||
12e3280b YL |
1983 | config SYS_HAS_CPU_LOONGSON1C |
1984 | bool | |
1985 | ||
7cf8053b RB |
1986 | config SYS_HAS_CPU_MIPS32_R1 |
1987 | bool | |
1988 | ||
1989 | config SYS_HAS_CPU_MIPS32_R2 | |
1990 | bool | |
1991 | ||
a6e18781 LY |
1992 | config SYS_HAS_CPU_MIPS32_R3_5 |
1993 | bool | |
1994 | ||
c5b36783 SH |
1995 | config SYS_HAS_CPU_MIPS32_R5 |
1996 | bool | |
9ae1f262 | 1997 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
c5b36783 | 1998 | |
7fd08ca5 LY |
1999 | config SYS_HAS_CPU_MIPS32_R6 |
2000 | bool | |
9ae1f262 | 2001 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 2002 | |
7cf8053b RB |
2003 | config SYS_HAS_CPU_MIPS64_R1 |
2004 | bool | |
2005 | ||
2006 | config SYS_HAS_CPU_MIPS64_R2 | |
2007 | bool | |
2008 | ||
7fd08ca5 LY |
2009 | config SYS_HAS_CPU_MIPS64_R6 |
2010 | bool | |
9ae1f262 | 2011 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 2012 | |
7cf8053b RB |
2013 | config SYS_HAS_CPU_R3000 |
2014 | bool | |
2015 | ||
2016 | config SYS_HAS_CPU_TX39XX | |
2017 | bool | |
2018 | ||
2019 | config SYS_HAS_CPU_VR41XX | |
2020 | bool | |
2021 | ||
7cf8053b RB |
2022 | config SYS_HAS_CPU_R4X00 |
2023 | bool | |
2024 | ||
2025 | config SYS_HAS_CPU_TX49XX | |
2026 | bool | |
2027 | ||
2028 | config SYS_HAS_CPU_R5000 | |
2029 | bool | |
2030 | ||
542c1020 SK |
2031 | config SYS_HAS_CPU_R5500 |
2032 | bool | |
2033 | ||
7cf8053b RB |
2034 | config SYS_HAS_CPU_NEVADA |
2035 | bool | |
2036 | ||
7cf8053b RB |
2037 | config SYS_HAS_CPU_R10000 |
2038 | bool | |
9ae1f262 | 2039 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7cf8053b RB |
2040 | |
2041 | config SYS_HAS_CPU_RM7000 | |
2042 | bool | |
2043 | ||
7cf8053b RB |
2044 | config SYS_HAS_CPU_SB1 |
2045 | bool | |
2046 | ||
5e683389 DD |
2047 | config SYS_HAS_CPU_CAVIUM_OCTEON |
2048 | bool | |
2049 | ||
cd746249 | 2050 | config SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2051 | bool |
2052 | ||
fe7f62c0 | 2053 | config SYS_HAS_CPU_BMIPS32_3300 |
c1c0c461 | 2054 | bool |
cd746249 | 2055 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2056 | |
2057 | config SYS_HAS_CPU_BMIPS4350 | |
2058 | bool | |
cd746249 | 2059 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2060 | |
2061 | config SYS_HAS_CPU_BMIPS4380 | |
2062 | bool | |
cd746249 | 2063 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2064 | |
2065 | config SYS_HAS_CPU_BMIPS5000 | |
2066 | bool | |
cd746249 | 2067 | select SYS_HAS_CPU_BMIPS |
f263f2a2 | 2068 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
c1c0c461 | 2069 | |
7f058e85 J |
2070 | config SYS_HAS_CPU_XLR |
2071 | bool | |
2072 | ||
1c773ea4 J |
2073 | config SYS_HAS_CPU_XLP |
2074 | bool | |
2075 | ||
17099b11 RB |
2076 | # |
2077 | # CPU may reorder R->R, R->W, W->R, W->W | |
2078 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC | |
2079 | # | |
0004a9df RB |
2080 | config WEAK_ORDERING |
2081 | bool | |
17099b11 RB |
2082 | |
2083 | # | |
2084 | # CPU may reorder reads and writes beyond LL/SC | |
2085 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC | |
2086 | # | |
2087 | config WEAK_REORDERING_BEYOND_LLSC | |
2088 | bool | |
5e83d430 RB |
2089 | endmenu |
2090 | ||
2091 | # | |
c09b47d8 | 2092 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
5e83d430 RB |
2093 | # |
2094 | config CPU_MIPS32 | |
2095 | bool | |
7fd08ca5 | 2096 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 |
5e83d430 RB |
2097 | |
2098 | config CPU_MIPS64 | |
2099 | bool | |
7fd08ca5 | 2100 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 |
5e83d430 RB |
2101 | |
2102 | # | |
57eeaced | 2103 | # These indicate the revision of the architecture |
5e83d430 RB |
2104 | # |
2105 | config CPU_MIPSR1 | |
2106 | bool | |
2107 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 | |
2108 | ||
2109 | config CPU_MIPSR2 | |
2110 | bool | |
a86c7f72 | 2111 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
8256b17e | 2112 | select CPU_HAS_RIXI |
a7e07b1a | 2113 | select MIPS_SPRAM |
5e83d430 | 2114 | |
7fd08ca5 LY |
2115 | config CPU_MIPSR6 |
2116 | bool | |
2117 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 | |
8256b17e | 2118 | select CPU_HAS_RIXI |
87321fdd | 2119 | select HAVE_ARCH_BITREVERSE |
2db003a5 | 2120 | select MIPS_ASID_BITS_VARIABLE |
4a5dc51e | 2121 | select MIPS_CRC_SUPPORT |
a7e07b1a | 2122 | select MIPS_SPRAM |
5e83d430 | 2123 | |
57eeaced PB |
2124 | config TARGET_ISA_REV |
2125 | int | |
2126 | default 1 if CPU_MIPSR1 | |
2127 | default 2 if CPU_MIPSR2 | |
2128 | default 6 if CPU_MIPSR6 | |
2129 | default 0 | |
2130 | help | |
2131 | Reflects the ISA revision being targeted by the kernel build. This | |
2132 | is effectively the Kconfig equivalent of MIPS_ISA_REV. | |
2133 | ||
a6e18781 LY |
2134 | config EVA |
2135 | bool | |
2136 | ||
c5b36783 SH |
2137 | config XPA |
2138 | bool | |
2139 | ||
5e83d430 RB |
2140 | config SYS_SUPPORTS_32BIT_KERNEL |
2141 | bool | |
2142 | config SYS_SUPPORTS_64BIT_KERNEL | |
2143 | bool | |
2144 | config CPU_SUPPORTS_32BIT_KERNEL | |
2145 | bool | |
2146 | config CPU_SUPPORTS_64BIT_KERNEL | |
2147 | bool | |
55045ff5 WZ |
2148 | config CPU_SUPPORTS_CPUFREQ |
2149 | bool | |
2150 | config CPU_SUPPORTS_ADDRWINCFG | |
2151 | bool | |
9cffd154 DD |
2152 | config CPU_SUPPORTS_HUGEPAGES |
2153 | bool | |
171543e7 | 2154 | depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA)) |
82622284 DD |
2155 | config MIPS_PGD_C0_CONTEXT |
2156 | bool | |
cebf8c0f | 2157 | default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP |
5e83d430 | 2158 | |
8192c9ea DD |
2159 | # |
2160 | # Set to y for ptrace access to watch registers. | |
2161 | # | |
2162 | config HARDWARE_WATCHPOINTS | |
371a4151 EWI |
2163 | bool |
2164 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 | |
8192c9ea | 2165 | |
5e83d430 RB |
2166 | menu "Kernel type" |
2167 | ||
2168 | choice | |
5e83d430 RB |
2169 | prompt "Kernel code model" |
2170 | help | |
2171 | You should only select this option if you have a workload that | |
2172 | actually benefits from 64-bit processing or if your machine has | |
2173 | large memory. You will only be presented a single option in this | |
2174 | menu if your system does not support both 32-bit and 64-bit kernels. | |
2175 | ||
2176 | config 32BIT | |
2177 | bool "32-bit kernel" | |
2178 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL | |
2179 | select TRAD_SIGNALS | |
2180 | help | |
2181 | Select this option if you want to build a 32-bit kernel. | |
f17c4ca3 | 2182 | |
5e83d430 RB |
2183 | config 64BIT |
2184 | bool "64-bit kernel" | |
2185 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL | |
2186 | help | |
2187 | Select this option if you want to build a 64-bit kernel. | |
2188 | ||
2189 | endchoice | |
2190 | ||
2235a54d SL |
2191 | config KVM_GUEST |
2192 | bool "KVM Guest Kernel" | |
f2a5b1d7 | 2193 | depends on BROKEN_ON_SMP |
2235a54d | 2194 | help |
caa1faa7 JH |
2195 | Select this option if building a guest kernel for KVM (Trap & Emulate) |
2196 | mode. | |
2235a54d | 2197 | |
eda3d33c JH |
2198 | config KVM_GUEST_TIMER_FREQ |
2199 | int "Count/Compare Timer Frequency (MHz)" | |
2235a54d | 2200 | depends on KVM_GUEST |
eda3d33c | 2201 | default 100 |
2235a54d | 2202 | help |
eda3d33c JH |
2203 | Set this to non-zero if building a guest kernel for KVM to skip RTC |
2204 | emulation when determining guest CPU Frequency. Instead, the guest's | |
2205 | timer frequency is specified directly. | |
2235a54d | 2206 | |
1e321fa9 LY |
2207 | config MIPS_VA_BITS_48 |
2208 | bool "48 bits virtual memory" | |
2209 | depends on 64BIT | |
2210 | help | |
3377e227 AB |
2211 | Support a maximum at least 48 bits of application virtual |
2212 | memory. Default is 40 bits or less, depending on the CPU. | |
2213 | For page sizes 16k and above, this option results in a small | |
2214 | memory overhead for page tables. For 4k page size, a fourth | |
2215 | level of page tables is added which imposes both a memory | |
2216 | overhead as well as slower TLB fault handling. | |
2217 | ||
1e321fa9 LY |
2218 | If unsure, say N. |
2219 | ||
1da177e4 LT |
2220 | choice |
2221 | prompt "Kernel page size" | |
2222 | default PAGE_SIZE_4KB | |
2223 | ||
2224 | config PAGE_SIZE_4KB | |
2225 | bool "4kB" | |
268a2d60 | 2226 | depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64 |
1da177e4 | 2227 | help |
371a4151 EWI |
2228 | This option select the standard 4kB Linux page size. On some |
2229 | R3000-family processors this is the only available page size. Using | |
2230 | 4kB page size will minimize memory consumption and is therefore | |
2231 | recommended for low memory systems. | |
1da177e4 LT |
2232 | |
2233 | config PAGE_SIZE_8KB | |
2234 | bool "8kB" | |
c2aeaaea | 2235 | depends on CPU_CAVIUM_OCTEON |
1e321fa9 | 2236 | depends on !MIPS_VA_BITS_48 |
1da177e4 LT |
2237 | help |
2238 | Using 8kB page size will result in higher performance kernel at | |
2239 | the price of higher memory consumption. This option is available | |
c2aeaaea PB |
2240 | only on cnMIPS processors. Note that you will need a suitable Linux |
2241 | distribution to support this. | |
1da177e4 LT |
2242 | |
2243 | config PAGE_SIZE_16KB | |
2244 | bool "16kB" | |
714bfad6 | 2245 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2246 | help |
2247 | Using 16kB page size will result in higher performance kernel at | |
2248 | the price of higher memory consumption. This option is available on | |
714bfad6 RB |
2249 | all non-R3000 family processors. Note that you will need a suitable |
2250 | Linux distribution to support this. | |
1da177e4 | 2251 | |
c52399be RB |
2252 | config PAGE_SIZE_32KB |
2253 | bool "32kB" | |
2254 | depends on CPU_CAVIUM_OCTEON | |
1e321fa9 | 2255 | depends on !MIPS_VA_BITS_48 |
c52399be RB |
2256 | help |
2257 | Using 32kB page size will result in higher performance kernel at | |
2258 | the price of higher memory consumption. This option is available | |
2259 | only on cnMIPS cores. Note that you will need a suitable Linux | |
2260 | distribution to support this. | |
2261 | ||
1da177e4 LT |
2262 | config PAGE_SIZE_64KB |
2263 | bool "64kB" | |
3b2db173 | 2264 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2265 | help |
2266 | Using 64kB page size will result in higher performance kernel at | |
2267 | the price of higher memory consumption. This option is available on | |
2268 | all non-R3000 family processor. Not that at the time of this | |
714bfad6 | 2269 | writing this option is still high experimental. |
1da177e4 LT |
2270 | |
2271 | endchoice | |
2272 | ||
c9bace7c DD |
2273 | config FORCE_MAX_ZONEORDER |
2274 | int "Maximum zone order" | |
e4362d1e AS |
2275 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
2276 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB | |
2277 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2278 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2279 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
2280 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
c9bace7c DD |
2281 | range 11 64 |
2282 | default "11" | |
2283 | help | |
2284 | The kernel memory allocator divides physically contiguous memory | |
2285 | blocks into "zones", where each zone is a power of two number of | |
2286 | pages. This option selects the largest power of two that the kernel | |
2287 | keeps in the memory allocator. If you need to allocate very large | |
2288 | blocks of physically contiguous memory, then you may need to | |
2289 | increase this value. | |
2290 | ||
2291 | This config option is actually maximum order plus one. For example, | |
2292 | a value of 11 means that the largest free memory block is 2^10 pages. | |
2293 | ||
2294 | The page size is not necessarily 4KB. Keep this in mind | |
2295 | when choosing a value for this option. | |
2296 | ||
1da177e4 LT |
2297 | config BOARD_SCACHE |
2298 | bool | |
2299 | ||
2300 | config IP22_CPU_SCACHE | |
2301 | bool | |
2302 | select BOARD_SCACHE | |
2303 | ||
9318c51a CD |
2304 | # |
2305 | # Support for a MIPS32 / MIPS64 style S-caches | |
2306 | # | |
2307 | config MIPS_CPU_SCACHE | |
2308 | bool | |
2309 | select BOARD_SCACHE | |
2310 | ||
1da177e4 LT |
2311 | config R5000_CPU_SCACHE |
2312 | bool | |
2313 | select BOARD_SCACHE | |
2314 | ||
2315 | config RM7000_CPU_SCACHE | |
2316 | bool | |
2317 | select BOARD_SCACHE | |
2318 | ||
2319 | config SIBYTE_DMA_PAGEOPS | |
2320 | bool "Use DMA to clear/copy pages" | |
2321 | depends on CPU_SB1 | |
2322 | help | |
2323 | Instead of using the CPU to zero and copy pages, use a Data Mover | |
2324 | channel. These DMA channels are otherwise unused by the standard | |
2325 | SiByte Linux port. Seems to give a small performance benefit. | |
2326 | ||
2327 | config CPU_HAS_PREFETCH | |
c8094b53 | 2328 | bool |
1da177e4 | 2329 | |
3165c846 FF |
2330 | config CPU_GENERIC_DUMP_TLB |
2331 | bool | |
c2aeaaea | 2332 | default y if !(CPU_R3000 || CPU_TX39XX) |
3165c846 | 2333 | |
c92e47e5 | 2334 | config MIPS_FP_SUPPORT |
183b40f9 PB |
2335 | bool "Floating Point support" if EXPERT |
2336 | default y | |
2337 | help | |
2338 | Select y to include support for floating point in the kernel | |
2339 | including initialization of FPU hardware, FP context save & restore | |
2340 | and emulation of an FPU where necessary. Without this support any | |
2341 | userland program attempting to use floating point instructions will | |
2342 | receive a SIGILL. | |
2343 | ||
2344 | If you know that your userland will not attempt to use floating point | |
2345 | instructions then you can say n here to shrink the kernel a little. | |
2346 | ||
2347 | If unsure, say y. | |
c92e47e5 | 2348 | |
97f7dcbf PB |
2349 | config CPU_R2300_FPU |
2350 | bool | |
c92e47e5 | 2351 | depends on MIPS_FP_SUPPORT |
97f7dcbf PB |
2352 | default y if CPU_R3000 || CPU_TX39XX |
2353 | ||
54746829 PB |
2354 | config CPU_R3K_TLB |
2355 | bool | |
2356 | ||
91405eb6 FF |
2357 | config CPU_R4K_FPU |
2358 | bool | |
c92e47e5 | 2359 | depends on MIPS_FP_SUPPORT |
97f7dcbf | 2360 | default y if !CPU_R2300_FPU |
91405eb6 | 2361 | |
62cedc4f FF |
2362 | config CPU_R4K_CACHE_TLB |
2363 | bool | |
54746829 | 2364 | default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) |
62cedc4f | 2365 | |
59d6ab86 | 2366 | config MIPS_MT_SMP |
a92b7f87 | 2367 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
5cbf9688 | 2368 | default y |
527f1028 | 2369 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS |
f7062ddb | 2370 | select CPU_MIPSR2_IRQ_VI |
d725cf38 | 2371 | select CPU_MIPSR2_IRQ_EI |
c080faa5 | 2372 | select SYNC_R4K |
f41ae0b2 | 2373 | select MIPS_MT |
41c594ab | 2374 | select SMP |
87353d8a | 2375 | select SMP_UP |
c080faa5 SH |
2376 | select SYS_SUPPORTS_SMP |
2377 | select SYS_SUPPORTS_SCHED_SMT | |
399aaa25 | 2378 | select MIPS_PERF_SHARED_TC_COUNTERS |
f41ae0b2 | 2379 | help |
c080faa5 SH |
2380 | This is a kernel model which is known as SMVP. This is supported |
2381 | on cores with the MT ASE and uses the available VPEs to implement | |
2382 | virtual processors which supports SMP. This is equivalent to the | |
2383 | Intel Hyperthreading feature. For further information go to | |
2384 | <http://www.imgtec.com/mips/mips-multithreading.asp>. | |
41c594ab | 2385 | |
f41ae0b2 RB |
2386 | config MIPS_MT |
2387 | bool | |
2388 | ||
0ab7aefc RB |
2389 | config SCHED_SMT |
2390 | bool "SMT (multithreading) scheduler support" | |
2391 | depends on SYS_SUPPORTS_SCHED_SMT | |
2392 | default n | |
2393 | help | |
2394 | SMT scheduler support improves the CPU scheduler's decision making | |
2395 | when dealing with MIPS MT enabled cores at a cost of slightly | |
2396 | increased overhead in some places. If unsure say N here. | |
2397 | ||
2398 | config SYS_SUPPORTS_SCHED_SMT | |
2399 | bool | |
2400 | ||
f41ae0b2 RB |
2401 | config SYS_SUPPORTS_MULTITHREADING |
2402 | bool | |
2403 | ||
f088fc84 RB |
2404 | config MIPS_MT_FPAFF |
2405 | bool "Dynamic FPU affinity for FP-intensive threads" | |
f088fc84 | 2406 | default y |
b633648c | 2407 | depends on MIPS_MT_SMP |
07cc0c9e | 2408 | |
b0a668fb LY |
2409 | config MIPSR2_TO_R6_EMULATOR |
2410 | bool "MIPS R2-to-R6 emulator" | |
9eaa9a82 | 2411 | depends on CPU_MIPSR6 |
c92e47e5 | 2412 | depends on MIPS_FP_SUPPORT |
b0a668fb LY |
2413 | default y |
2414 | help | |
2415 | Choose this option if you want to run non-R6 MIPS userland code. | |
2416 | Even if you say 'Y' here, the emulator will still be disabled by | |
07edf0d4 | 2417 | default. You can enable it using the 'mipsr2emu' kernel option. |
b0a668fb LY |
2418 | The only reason this is a build-time option is to save ~14K from the |
2419 | final kernel image. | |
b0a668fb | 2420 | |
f35764e7 JH |
2421 | config SYS_SUPPORTS_VPE_LOADER |
2422 | bool | |
2423 | depends on SYS_SUPPORTS_MULTITHREADING | |
2424 | help | |
2425 | Indicates that the platform supports the VPE loader, and provides | |
2426 | physical_memsize. | |
2427 | ||
07cc0c9e RB |
2428 | config MIPS_VPE_LOADER |
2429 | bool "VPE loader support." | |
f35764e7 | 2430 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
07cc0c9e RB |
2431 | select CPU_MIPSR2_IRQ_VI |
2432 | select CPU_MIPSR2_IRQ_EI | |
07cc0c9e RB |
2433 | select MIPS_MT |
2434 | help | |
2435 | Includes a loader for loading an elf relocatable object | |
2436 | onto another VPE and running it. | |
f088fc84 | 2437 | |
17a1d523 DCZ |
2438 | config MIPS_VPE_LOADER_CMP |
2439 | bool | |
2440 | default "y" | |
2441 | depends on MIPS_VPE_LOADER && MIPS_CMP | |
2442 | ||
1a2a6d7e DCZ |
2443 | config MIPS_VPE_LOADER_MT |
2444 | bool | |
2445 | default "y" | |
2446 | depends on MIPS_VPE_LOADER && !MIPS_CMP | |
2447 | ||
e01402b1 RB |
2448 | config MIPS_VPE_LOADER_TOM |
2449 | bool "Load VPE program into memory hidden from linux" | |
2450 | depends on MIPS_VPE_LOADER | |
2451 | default y | |
2452 | help | |
2453 | The loader can use memory that is present but has been hidden from | |
2454 | Linux using the kernel command line option "mem=xxMB". It's up to | |
2455 | you to ensure the amount you put in the option and the space your | |
2456 | program requires is less or equal to the amount physically present. | |
2457 | ||
e01402b1 | 2458 | config MIPS_VPE_APSP_API |
5e83d430 RB |
2459 | bool "Enable support for AP/SP API (RTLX)" |
2460 | depends on MIPS_VPE_LOADER | |
e01402b1 | 2461 | |
da615cf6 DCZ |
2462 | config MIPS_VPE_APSP_API_CMP |
2463 | bool | |
2464 | default "y" | |
2465 | depends on MIPS_VPE_APSP_API && MIPS_CMP | |
2466 | ||
2c973ef0 DCZ |
2467 | config MIPS_VPE_APSP_API_MT |
2468 | bool | |
2469 | default "y" | |
2470 | depends on MIPS_VPE_APSP_API && !MIPS_CMP | |
2471 | ||
4a16ff4c | 2472 | config MIPS_CMP |
5cac93b3 | 2473 | bool "MIPS CMP framework support (DEPRECATED)" |
5676319c | 2474 | depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
b10b43ba | 2475 | select SMP |
eb9b5141 | 2476 | select SYNC_R4K |
b10b43ba | 2477 | select SYS_SUPPORTS_SMP |
4a16ff4c RB |
2478 | select WEAK_ORDERING |
2479 | default n | |
2480 | help | |
044505c7 PB |
2481 | Select this if you are using a bootloader which implements the "CMP |
2482 | framework" protocol (ie. YAMON) and want your kernel to make use of | |
2483 | its ability to start secondary CPUs. | |
4a16ff4c | 2484 | |
5cac93b3 PB |
2485 | Unless you have a specific need, you should use CONFIG_MIPS_CPS |
2486 | instead of this. | |
2487 | ||
0ee958e1 PB |
2488 | config MIPS_CPS |
2489 | bool "MIPS Coherent Processing System support" | |
5a3e7c02 | 2490 | depends on SYS_SUPPORTS_MIPS_CPS |
0ee958e1 | 2491 | select MIPS_CM |
1d8f1f5a | 2492 | select MIPS_CPS_PM if HOTPLUG_CPU |
0ee958e1 PB |
2493 | select SMP |
2494 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) | |
1d8f1f5a | 2495 | select SYS_SUPPORTS_HOTPLUG_CPU |
c8b7712c | 2496 | select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
0ee958e1 PB |
2497 | select SYS_SUPPORTS_SMP |
2498 | select WEAK_ORDERING | |
2499 | help | |
2500 | Select this if you wish to run an SMP kernel across multiple cores | |
2501 | within a MIPS Coherent Processing System. When this option is | |
2502 | enabled the kernel will probe for other cores and boot them with | |
2503 | no external assistance. It is safe to enable this when hardware | |
2504 | support is unavailable. | |
2505 | ||
3179d37e | 2506 | config MIPS_CPS_PM |
39a59593 | 2507 | depends on MIPS_CPS |
3179d37e PB |
2508 | bool |
2509 | ||
9f98f3dd PB |
2510 | config MIPS_CM |
2511 | bool | |
3c9b4166 | 2512 | select MIPS_CPC |
9f98f3dd | 2513 | |
9c38cf44 PB |
2514 | config MIPS_CPC |
2515 | bool | |
4a16ff4c | 2516 | |
1da177e4 LT |
2517 | config SB1_PASS_2_WORKAROUNDS |
2518 | bool | |
2519 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) | |
2520 | default y | |
2521 | ||
2522 | config SB1_PASS_2_1_WORKAROUNDS | |
2523 | bool | |
2524 | depends on CPU_SB1 && CPU_SB1_PASS_2 | |
2525 | default y | |
2526 | ||
9e2b5372 MC |
2527 | choice |
2528 | prompt "SmartMIPS or microMIPS ASE support" | |
2529 | ||
2530 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS | |
2531 | bool "None" | |
2532 | help | |
2533 | Select this if you want neither microMIPS nor SmartMIPS support | |
2534 | ||
9693a853 FBH |
2535 | config CPU_HAS_SMARTMIPS |
2536 | depends on SYS_SUPPORTS_SMARTMIPS | |
9e2b5372 | 2537 | bool "SmartMIPS" |
9693a853 FBH |
2538 | help |
2539 | SmartMIPS is a extension of the MIPS32 architecture aimed at | |
2540 | increased security at both hardware and software level for | |
2541 | smartcards. Enabling this option will allow proper use of the | |
2542 | SmartMIPS instructions by Linux applications. However a kernel with | |
2543 | this option will not work on a MIPS core without SmartMIPS core. If | |
2544 | you don't know you probably don't have SmartMIPS and should say N | |
2545 | here. | |
2546 | ||
bce86083 | 2547 | config CPU_MICROMIPS |
7fd08ca5 | 2548 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
9e2b5372 | 2549 | bool "microMIPS" |
bce86083 SH |
2550 | help |
2551 | When this option is enabled the kernel will be built using the | |
2552 | microMIPS ISA | |
2553 | ||
9e2b5372 MC |
2554 | endchoice |
2555 | ||
a5e9a69e | 2556 | config CPU_HAS_MSA |
0ce3417e | 2557 | bool "Support for the MIPS SIMD Architecture" |
a5e9a69e | 2558 | depends on CPU_SUPPORTS_MSA |
c92e47e5 | 2559 | depends on MIPS_FP_SUPPORT |
2a6cb669 | 2560 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
a5e9a69e PB |
2561 | help |
2562 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers | |
2563 | and a set of SIMD instructions to operate on them. When this option | |
1db1af84 PB |
2564 | is enabled the kernel will support allocating & switching MSA |
2565 | vector register contexts. If you know that your kernel will only be | |
2566 | running on CPUs which do not support MSA or that your userland will | |
2567 | not be making use of it then you may wish to say N here to reduce | |
2568 | the size & complexity of your kernel. | |
a5e9a69e PB |
2569 | |
2570 | If unsure, say Y. | |
2571 | ||
1da177e4 | 2572 | config CPU_HAS_WB |
f7062ddb | 2573 | bool |
e01402b1 | 2574 | |
df0ac8a4 KC |
2575 | config XKS01 |
2576 | bool | |
2577 | ||
8256b17e FF |
2578 | config CPU_HAS_RIXI |
2579 | bool | |
2580 | ||
932afdee YC |
2581 | config CPU_HAS_LOAD_STORE_LR |
2582 | bool | |
2583 | help | |
2584 | CPU has support for unaligned load and store instructions: | |
2585 | LWL, LWR, SWL, SWR (Load/store word left/right). | |
2586 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems). | |
2587 | ||
f41ae0b2 RB |
2588 | # |
2589 | # Vectored interrupt mode is an R2 feature | |
2590 | # | |
e01402b1 | 2591 | config CPU_MIPSR2_IRQ_VI |
f41ae0b2 | 2592 | bool |
e01402b1 | 2593 | |
f41ae0b2 RB |
2594 | # |
2595 | # Extended interrupt mode is an R2 feature | |
2596 | # | |
e01402b1 | 2597 | config CPU_MIPSR2_IRQ_EI |
f41ae0b2 | 2598 | bool |
e01402b1 | 2599 | |
1da177e4 LT |
2600 | config CPU_HAS_SYNC |
2601 | bool | |
2602 | depends on !CPU_R3000 | |
2603 | default y | |
2604 | ||
20d60d99 MR |
2605 | # |
2606 | # CPU non-features | |
2607 | # | |
2608 | config CPU_DADDI_WORKAROUNDS | |
2609 | bool | |
2610 | ||
2611 | config CPU_R4000_WORKAROUNDS | |
2612 | bool | |
2613 | select CPU_R4400_WORKAROUNDS | |
2614 | ||
2615 | config CPU_R4400_WORKAROUNDS | |
2616 | bool | |
2617 | ||
071d2f0b PB |
2618 | config CPU_R4X00_BUGS64 |
2619 | bool | |
2620 | default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1) | |
2621 | ||
4edf00a4 PB |
2622 | config MIPS_ASID_SHIFT |
2623 | int | |
2624 | default 6 if CPU_R3000 || CPU_TX39XX | |
4edf00a4 PB |
2625 | default 0 |
2626 | ||
2627 | config MIPS_ASID_BITS | |
2628 | int | |
2db003a5 | 2629 | default 0 if MIPS_ASID_BITS_VARIABLE |
4edf00a4 PB |
2630 | default 6 if CPU_R3000 || CPU_TX39XX |
2631 | default 8 | |
2632 | ||
2db003a5 PB |
2633 | config MIPS_ASID_BITS_VARIABLE |
2634 | bool | |
2635 | ||
4a5dc51e MN |
2636 | config MIPS_CRC_SUPPORT |
2637 | bool | |
2638 | ||
1da177e4 LT |
2639 | # |
2640 | # - Highmem only makes sense for the 32-bit kernel. | |
2641 | # - The current highmem code will only work properly on physically indexed | |
2642 | # caches such as R3000, SB1, R7000 or those that look like they're virtually | |
2643 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the | |
2644 | # moment we protect the user and offer the highmem option only on machines | |
2645 | # where it's known to be safe. This will not offer highmem on a few systems | |
2646 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically | |
2647 | # indexed CPUs but we're playing safe. | |
797798c1 RB |
2648 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
2649 | # know they might have memory configurations that could make use of highmem | |
2650 | # support. | |
1da177e4 LT |
2651 | # |
2652 | config HIGHMEM | |
2653 | bool "High Memory Support" | |
a6e18781 | 2654 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
797798c1 RB |
2655 | |
2656 | config CPU_SUPPORTS_HIGHMEM | |
2657 | bool | |
2658 | ||
2659 | config SYS_SUPPORTS_HIGHMEM | |
2660 | bool | |
1da177e4 | 2661 | |
9693a853 FBH |
2662 | config SYS_SUPPORTS_SMARTMIPS |
2663 | bool | |
2664 | ||
a6a4834c SH |
2665 | config SYS_SUPPORTS_MICROMIPS |
2666 | bool | |
2667 | ||
377cb1b6 RB |
2668 | config SYS_SUPPORTS_MIPS16 |
2669 | bool | |
2670 | help | |
2671 | This option must be set if a kernel might be executed on a MIPS16- | |
2672 | enabled CPU even if MIPS16 is not actually being used. In other | |
2673 | words, it makes the kernel MIPS16-tolerant. | |
2674 | ||
a5e9a69e PB |
2675 | config CPU_SUPPORTS_MSA |
2676 | bool | |
2677 | ||
b4819b59 YY |
2678 | config ARCH_FLATMEM_ENABLE |
2679 | def_bool y | |
268a2d60 | 2680 | depends on !NUMA && !CPU_LOONGSON2EF |
b4819b59 | 2681 | |
31473747 AN |
2682 | config ARCH_SPARSEMEM_ENABLE |
2683 | bool | |
397dc00e | 2684 | select SPARSEMEM_STATIC if !SGI_IP27 |
31473747 | 2685 | |
d8cb4e11 RB |
2686 | config NUMA |
2687 | bool "NUMA Support" | |
2688 | depends on SYS_SUPPORTS_NUMA | |
2689 | help | |
2690 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory | |
2691 | Access). This option improves performance on systems with more | |
2692 | than two nodes; on two node systems it is generally better to | |
2693 | leave it disabled; on single node systems disable this option | |
2694 | disabled. | |
2695 | ||
2696 | config SYS_SUPPORTS_NUMA | |
2697 | bool | |
2698 | ||
8c530ea3 MR |
2699 | config RELOCATABLE |
2700 | bool "Relocatable kernel" | |
3ff72be4 | 2701 | depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) |
8c530ea3 MR |
2702 | help |
2703 | This builds a kernel image that retains relocation information | |
2704 | so it can be loaded someplace besides the default 1MB. | |
2705 | The relocations make the kernel binary about 15% larger, | |
2706 | but are discarded at runtime | |
2707 | ||
069fd766 MR |
2708 | config RELOCATION_TABLE_SIZE |
2709 | hex "Relocation table size" | |
2710 | depends on RELOCATABLE | |
2711 | range 0x0 0x01000000 | |
2712 | default "0x00100000" | |
2713 | ---help--- | |
2714 | A table of relocation data will be appended to the kernel binary | |
2715 | and parsed at boot to fix up the relocated kernel. | |
2716 | ||
2717 | This option allows the amount of space reserved for the table to be | |
2718 | adjusted, although the default of 1Mb should be ok in most cases. | |
2719 | ||
2720 | The build will fail and a valid size suggested if this is too small. | |
2721 | ||
2722 | If unsure, leave at the default value. | |
2723 | ||
405bc8fd MR |
2724 | config RANDOMIZE_BASE |
2725 | bool "Randomize the address of the kernel image" | |
2726 | depends on RELOCATABLE | |
2727 | ---help--- | |
371a4151 EWI |
2728 | Randomizes the physical and virtual address at which the |
2729 | kernel image is loaded, as a security feature that | |
2730 | deters exploit attempts relying on knowledge of the location | |
2731 | of kernel internals. | |
405bc8fd | 2732 | |
371a4151 | 2733 | Entropy is generated using any coprocessor 0 registers available. |
405bc8fd | 2734 | |
371a4151 | 2735 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
405bc8fd | 2736 | |
371a4151 | 2737 | If unsure, say N. |
405bc8fd MR |
2738 | |
2739 | config RANDOMIZE_BASE_MAX_OFFSET | |
2740 | hex "Maximum kASLR offset" if EXPERT | |
2741 | depends on RANDOMIZE_BASE | |
2742 | range 0x0 0x40000000 if EVA || 64BIT | |
2743 | range 0x0 0x08000000 | |
2744 | default "0x01000000" | |
2745 | ---help--- | |
2746 | When kASLR is active, this provides the maximum offset that will | |
2747 | be applied to the kernel image. It should be set according to the | |
2748 | amount of physical RAM available in the target system minus | |
2749 | PHYSICAL_START and must be a power of 2. | |
2750 | ||
2751 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with | |
2752 | EVA or 64-bit. The default is 16Mb. | |
2753 | ||
c80d79d7 YG |
2754 | config NODES_SHIFT |
2755 | int | |
2756 | default "6" | |
2757 | depends on NEED_MULTIPLE_NODES | |
2758 | ||
14f70012 DCZ |
2759 | config HW_PERF_EVENTS |
2760 | bool "Enable hardware performance counter support for perf events" | |
268a2d60 | 2761 | depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64) |
14f70012 DCZ |
2762 | default y |
2763 | help | |
2764 | Enable hardware performance counter support for perf events. If | |
2765 | disabled, perf events will use software events only. | |
2766 | ||
1da177e4 LT |
2767 | config SMP |
2768 | bool "Multi-Processing support" | |
e73ea273 RB |
2769 | depends on SYS_SUPPORTS_SMP |
2770 | help | |
1da177e4 | 2771 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
2772 | a system with only one CPU, say N. If you have a system with more |
2773 | than one CPU, say Y. | |
1da177e4 | 2774 | |
4a474157 | 2775 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
2776 | machines, but will use only one CPU of a multiprocessor machine. If |
2777 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 2778 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
2779 | will run faster if you say N here. |
2780 | ||
2781 | People using multiprocessor machines who say Y here should also say | |
2782 | Y to "Enhanced Real Time Clock Support", below. | |
2783 | ||
03502faa AB |
2784 | See also the SMP-HOWTO available at |
2785 | <http://www.tldp.org/docs.html#howto>. | |
1da177e4 LT |
2786 | |
2787 | If you don't know what to do here, say N. | |
2788 | ||
7840d618 MR |
2789 | config HOTPLUG_CPU |
2790 | bool "Support for hot-pluggable CPUs" | |
2791 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU | |
2792 | help | |
2793 | Say Y here to allow turning CPUs off and on. CPUs can be | |
2794 | controlled through /sys/devices/system/cpu. | |
2795 | (Note: power management support will enable this option | |
2796 | automatically on SMP systems. ) | |
2797 | Say N if you want to disable CPU hotplug. | |
2798 | ||
87353d8a RB |
2799 | config SMP_UP |
2800 | bool | |
2801 | ||
4a16ff4c RB |
2802 | config SYS_SUPPORTS_MIPS_CMP |
2803 | bool | |
2804 | ||
0ee958e1 PB |
2805 | config SYS_SUPPORTS_MIPS_CPS |
2806 | bool | |
2807 | ||
e73ea273 RB |
2808 | config SYS_SUPPORTS_SMP |
2809 | bool | |
2810 | ||
130e2fb7 RB |
2811 | config NR_CPUS_DEFAULT_4 |
2812 | bool | |
2813 | ||
2814 | config NR_CPUS_DEFAULT_8 | |
2815 | bool | |
2816 | ||
2817 | config NR_CPUS_DEFAULT_16 | |
2818 | bool | |
2819 | ||
2820 | config NR_CPUS_DEFAULT_32 | |
2821 | bool | |
2822 | ||
2823 | config NR_CPUS_DEFAULT_64 | |
2824 | bool | |
2825 | ||
1da177e4 | 2826 | config NR_CPUS |
a91796a9 J |
2827 | int "Maximum number of CPUs (2-256)" |
2828 | range 2 256 | |
1da177e4 | 2829 | depends on SMP |
130e2fb7 RB |
2830 | default "4" if NR_CPUS_DEFAULT_4 |
2831 | default "8" if NR_CPUS_DEFAULT_8 | |
2832 | default "16" if NR_CPUS_DEFAULT_16 | |
2833 | default "32" if NR_CPUS_DEFAULT_32 | |
2834 | default "64" if NR_CPUS_DEFAULT_64 | |
1da177e4 LT |
2835 | help |
2836 | This allows you to specify the maximum number of CPUs which this | |
2837 | kernel will support. The maximum supported value is 32 for 32-bit | |
2838 | kernel and 64 for 64-bit kernels; the minimum value which makes | |
72ede9b1 AN |
2839 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
2840 | and 2 for all others. | |
1da177e4 LT |
2841 | |
2842 | This is purely to save memory - each supported CPU adds | |
72ede9b1 AN |
2843 | approximately eight kilobytes to the kernel image. For best |
2844 | performance should round up your number of processors to the next | |
2845 | power of two. | |
1da177e4 | 2846 | |
399aaa25 AC |
2847 | config MIPS_PERF_SHARED_TC_COUNTERS |
2848 | bool | |
7820b84b DD |
2849 | |
2850 | config MIPS_NR_CPU_NR_MAP_1024 | |
2851 | bool | |
2852 | ||
2853 | config MIPS_NR_CPU_NR_MAP | |
2854 | int | |
2855 | depends on SMP | |
2856 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 | |
2857 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 | |
399aaa25 | 2858 | |
1723b4a3 AN |
2859 | # |
2860 | # Timer Interrupt Frequency Configuration | |
2861 | # | |
2862 | ||
2863 | choice | |
2864 | prompt "Timer frequency" | |
2865 | default HZ_250 | |
2866 | help | |
371a4151 | 2867 | Allows the configuration of the timer frequency. |
1723b4a3 | 2868 | |
67596573 PB |
2869 | config HZ_24 |
2870 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ | |
2871 | ||
1723b4a3 | 2872 | config HZ_48 |
0f873585 | 2873 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
1723b4a3 AN |
2874 | |
2875 | config HZ_100 | |
2876 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ | |
2877 | ||
2878 | config HZ_128 | |
2879 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ | |
2880 | ||
2881 | config HZ_250 | |
2882 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ | |
2883 | ||
2884 | config HZ_256 | |
2885 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ | |
2886 | ||
2887 | config HZ_1000 | |
2888 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ | |
2889 | ||
2890 | config HZ_1024 | |
2891 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ | |
2892 | ||
2893 | endchoice | |
2894 | ||
67596573 PB |
2895 | config SYS_SUPPORTS_24HZ |
2896 | bool | |
2897 | ||
1723b4a3 AN |
2898 | config SYS_SUPPORTS_48HZ |
2899 | bool | |
2900 | ||
2901 | config SYS_SUPPORTS_100HZ | |
2902 | bool | |
2903 | ||
2904 | config SYS_SUPPORTS_128HZ | |
2905 | bool | |
2906 | ||
2907 | config SYS_SUPPORTS_250HZ | |
2908 | bool | |
2909 | ||
2910 | config SYS_SUPPORTS_256HZ | |
2911 | bool | |
2912 | ||
2913 | config SYS_SUPPORTS_1000HZ | |
2914 | bool | |
2915 | ||
2916 | config SYS_SUPPORTS_1024HZ | |
2917 | bool | |
2918 | ||
2919 | config SYS_SUPPORTS_ARBIT_HZ | |
2920 | bool | |
67596573 PB |
2921 | default y if !SYS_SUPPORTS_24HZ && \ |
2922 | !SYS_SUPPORTS_48HZ && \ | |
2923 | !SYS_SUPPORTS_100HZ && \ | |
2924 | !SYS_SUPPORTS_128HZ && \ | |
2925 | !SYS_SUPPORTS_250HZ && \ | |
2926 | !SYS_SUPPORTS_256HZ && \ | |
2927 | !SYS_SUPPORTS_1000HZ && \ | |
1723b4a3 AN |
2928 | !SYS_SUPPORTS_1024HZ |
2929 | ||
2930 | config HZ | |
2931 | int | |
67596573 | 2932 | default 24 if HZ_24 |
1723b4a3 AN |
2933 | default 48 if HZ_48 |
2934 | default 100 if HZ_100 | |
2935 | default 128 if HZ_128 | |
2936 | default 250 if HZ_250 | |
2937 | default 256 if HZ_256 | |
2938 | default 1000 if HZ_1000 | |
2939 | default 1024 if HZ_1024 | |
2940 | ||
96685b17 DCZ |
2941 | config SCHED_HRTICK |
2942 | def_bool HIGH_RES_TIMERS | |
2943 | ||
ea6e942b | 2944 | config KEXEC |
7d60717e | 2945 | bool "Kexec system call" |
2965faa5 | 2946 | select KEXEC_CORE |
ea6e942b AN |
2947 | help |
2948 | kexec is a system call that implements the ability to shutdown your | |
2949 | current kernel, and to start another kernel. It is like a reboot | |
3dde6ad8 | 2950 | but it is independent of the system firmware. And like a reboot |
ea6e942b AN |
2951 | you can start any kernel with it, not just Linux. |
2952 | ||
01dd2fbf | 2953 | The name comes from the similarity to the exec system call. |
ea6e942b AN |
2954 | |
2955 | It is an ongoing process to be certain the hardware in a machine | |
2956 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
2957 | initially work for you. As of this writing the exact hardware |
2958 | interface is strongly in flux, so no good recommendation can be | |
2959 | made. | |
ea6e942b | 2960 | |
7aa1c8f4 | 2961 | config CRASH_DUMP |
bff323d5 MN |
2962 | bool "Kernel crash dumps" |
2963 | help | |
7aa1c8f4 RB |
2964 | Generate crash dump after being started by kexec. |
2965 | This should be normally only set in special crash dump kernels | |
2966 | which are loaded in the main kernel with kexec-tools into | |
2967 | a specially reserved region and then later executed after | |
2968 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
2969 | to a memory address not used by the main kernel or firmware using | |
2970 | PHYSICAL_START. | |
2971 | ||
2972 | config PHYSICAL_START | |
bff323d5 | 2973 | hex "Physical address where the kernel is loaded" |
8bda3e26 | 2974 | default "0xffffffff84000000" |
bff323d5 MN |
2975 | depends on CRASH_DUMP |
2976 | help | |
7aa1c8f4 RB |
2977 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
2978 | If you plan to use kernel for capturing the crash dump change | |
2979 | this value to start of the reserved region (the "X" value as | |
2980 | specified in the "crashkernel=YM@XM" command line boot parameter | |
2981 | passed to the panic-ed kernel). | |
2982 | ||
ea6e942b AN |
2983 | config SECCOMP |
2984 | bool "Enable seccomp to safely compute untrusted bytecode" | |
293c5bd1 | 2985 | depends on PROC_FS |
ea6e942b AN |
2986 | default y |
2987 | help | |
2988 | This kernel feature is useful for number crunching applications | |
2989 | that may need to compute untrusted bytecode during their | |
2990 | execution. By using pipes or other transports made available to | |
2991 | the process as file descriptors supporting the read/write | |
2992 | syscalls, it's possible to isolate those applications in | |
2993 | their own address space using seccomp. Once seccomp is | |
2994 | enabled via /proc/<pid>/seccomp, it cannot be disabled | |
2995 | and the task is only allowed to execute a few safe syscalls | |
2996 | defined by each seccomp mode. | |
2997 | ||
2998 | If unsure, say Y. Only embedded should say N here. | |
2999 | ||
597ce172 | 3000 | config MIPS_O32_FP64_SUPPORT |
b7f1e273 | 3001 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
597ce172 | 3002 | depends on 32BIT || MIPS32_O32 |
597ce172 PB |
3003 | help |
3004 | When this is enabled, the kernel will support use of 64-bit floating | |
3005 | point registers with binaries using the O32 ABI along with the | |
3006 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On | |
3007 | 32-bit MIPS systems this support is at the cost of increasing the | |
3008 | size and complexity of the compiled FPU emulator. Thus if you are | |
3009 | running a MIPS32 system and know that none of your userland binaries | |
3010 | will require 64-bit floating point, you may wish to reduce the size | |
3011 | of your kernel & potentially improve FP emulation performance by | |
3012 | saying N here. | |
3013 | ||
06e2e882 PB |
3014 | Although binutils currently supports use of this flag the details |
3015 | concerning its effect upon the O32 ABI in userland are still being | |
3016 | worked on. In order to avoid userland becoming dependant upon current | |
3017 | behaviour before the details have been finalised, this option should | |
3018 | be considered experimental and only enabled by those working upon | |
3019 | said details. | |
3020 | ||
3021 | If unsure, say N. | |
597ce172 | 3022 | |
f2ffa5ab | 3023 | config USE_OF |
0b3e06fd | 3024 | bool |
f2ffa5ab | 3025 | select OF |
e6ce1324 | 3026 | select OF_EARLY_FLATTREE |
abd2363f | 3027 | select IRQ_DOMAIN |
f2ffa5ab | 3028 | |
2fe8ea39 DZ |
3029 | config UHI_BOOT |
3030 | bool | |
3031 | ||
7fafb068 AB |
3032 | config BUILTIN_DTB |
3033 | bool | |
3034 | ||
1da8f179 | 3035 | choice |
5b24d52c | 3036 | prompt "Kernel appended dtb support" if USE_OF |
1da8f179 JG |
3037 | default MIPS_NO_APPENDED_DTB |
3038 | ||
3039 | config MIPS_NO_APPENDED_DTB | |
3040 | bool "None" | |
3041 | help | |
3042 | Do not enable appended dtb support. | |
3043 | ||
87db537d AK |
3044 | config MIPS_ELF_APPENDED_DTB |
3045 | bool "vmlinux" | |
3046 | help | |
3047 | With this option, the boot code will look for a device tree binary | |
3048 | DTB) included in the vmlinux ELF section .appended_dtb. By default | |
3049 | it is empty and the DTB can be appended using binutils command | |
3050 | objcopy: | |
3051 | ||
3052 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux | |
3053 | ||
3054 | This is meant as a backward compatiblity convenience for those | |
3055 | systems with a bootloader that can't be upgraded to accommodate | |
3056 | the documented boot protocol using a device tree. | |
3057 | ||
1da8f179 | 3058 | config MIPS_RAW_APPENDED_DTB |
b8f54f2c | 3059 | bool "vmlinux.bin or vmlinuz.bin" |
1da8f179 JG |
3060 | help |
3061 | With this option, the boot code will look for a device tree binary | |
b8f54f2c | 3062 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
1da8f179 JG |
3063 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
3064 | ||
3065 | This is meant as a backward compatibility convenience for those | |
3066 | systems with a bootloader that can't be upgraded to accommodate | |
3067 | the documented boot protocol using a device tree. | |
3068 | ||
3069 | Beware that there is very little in terms of protection against | |
3070 | this option being confused by leftover garbage in memory that might | |
3071 | look like a DTB header after a reboot if no actual DTB is appended | |
3072 | to vmlinux.bin. Do not leave this option active in a production kernel | |
3073 | if you don't intend to always append a DTB. | |
3074 | endchoice | |
3075 | ||
2024972e JG |
3076 | choice |
3077 | prompt "Kernel command line type" if !CMDLINE_OVERRIDE | |
2bcef9b4 | 3078 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
3f5f0a44 | 3079 | !MIPS_MALTA && \ |
2bcef9b4 | 3080 | !CAVIUM_OCTEON_SOC |
2024972e JG |
3081 | default MIPS_CMDLINE_FROM_BOOTLOADER |
3082 | ||
3083 | config MIPS_CMDLINE_FROM_DTB | |
3084 | depends on USE_OF | |
3085 | bool "Dtb kernel arguments if available" | |
3086 | ||
3087 | config MIPS_CMDLINE_DTB_EXTEND | |
3088 | depends on USE_OF | |
3089 | bool "Extend dtb kernel arguments with bootloader arguments" | |
3090 | ||
3091 | config MIPS_CMDLINE_FROM_BOOTLOADER | |
3092 | bool "Bootloader kernel arguments if available" | |
ed47e153 RV |
3093 | |
3094 | config MIPS_CMDLINE_BUILTIN_EXTEND | |
3095 | depends on CMDLINE_BOOL | |
3096 | bool "Extend builtin kernel arguments with bootloader arguments" | |
2024972e JG |
3097 | endchoice |
3098 | ||
5e83d430 RB |
3099 | endmenu |
3100 | ||
1df0f0ff AN |
3101 | config LOCKDEP_SUPPORT |
3102 | bool | |
3103 | default y | |
3104 | ||
3105 | config STACKTRACE_SUPPORT | |
3106 | bool | |
3107 | default y | |
3108 | ||
a728ab52 KS |
3109 | config PGTABLE_LEVELS |
3110 | int | |
3377e227 | 3111 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
a728ab52 KS |
3112 | default 3 if 64BIT && !PAGE_SIZE_64KB |
3113 | default 2 | |
3114 | ||
6c359eb1 PB |
3115 | config MIPS_AUTO_PFN_OFFSET |
3116 | bool | |
3117 | ||
1da177e4 LT |
3118 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
3119 | ||
c5611df9 | 3120 | config PCI_DRIVERS_GENERIC |
2eac9c2d | 3121 | select PCI_DOMAINS_GENERIC if PCI |
c5611df9 PB |
3122 | bool |
3123 | ||
3124 | config PCI_DRIVERS_LEGACY | |
3125 | def_bool !PCI_DRIVERS_GENERIC | |
3126 | select NO_GENERIC_PCI_IOPORT_MAP | |
2eac9c2d | 3127 | select PCI_DOMAINS if PCI |
1da177e4 LT |
3128 | |
3129 | # | |
3130 | # ISA support is now enabled via select. Too many systems still have the one | |
3131 | # or other ISA chip on the board that users don't know about so don't expect | |
3132 | # users to choose the right thing ... | |
3133 | # | |
3134 | config ISA | |
3135 | bool | |
3136 | ||
1da177e4 LT |
3137 | config TC |
3138 | bool "TURBOchannel support" | |
3139 | depends on MACH_DECSTATION | |
3140 | help | |
50a23e6e JM |
3141 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
3142 | processors. TURBOchannel programming specifications are available | |
3143 | at: | |
3144 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> | |
3145 | and: | |
3146 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> | |
3147 | Linux driver support status is documented at: | |
3148 | <http://www.linux-mips.org/wiki/DECstation> | |
1da177e4 | 3149 | |
1da177e4 LT |
3150 | config MMU |
3151 | bool | |
3152 | default y | |
3153 | ||
109c32ff MR |
3154 | config ARCH_MMAP_RND_BITS_MIN |
3155 | default 12 if 64BIT | |
3156 | default 8 | |
3157 | ||
3158 | config ARCH_MMAP_RND_BITS_MAX | |
3159 | default 18 if 64BIT | |
3160 | default 15 | |
3161 | ||
3162 | config ARCH_MMAP_RND_COMPAT_BITS_MIN | |
371a4151 | 3163 | default 8 |
109c32ff MR |
3164 | |
3165 | config ARCH_MMAP_RND_COMPAT_BITS_MAX | |
371a4151 | 3166 | default 15 |
109c32ff | 3167 | |
d865bea4 RB |
3168 | config I8253 |
3169 | bool | |
798778b8 | 3170 | select CLKSRC_I8253 |
2d02612f | 3171 | select CLKEVT_I8253 |
9726b43a | 3172 | select MIPS_EXTERNAL_TIMER |
d865bea4 | 3173 | |
e05eb3f8 RB |
3174 | config ZONE_DMA |
3175 | bool | |
3176 | ||
cce335ae RB |
3177 | config ZONE_DMA32 |
3178 | bool | |
3179 | ||
1da177e4 LT |
3180 | endmenu |
3181 | ||
1da177e4 LT |
3182 | config TRAD_SIGNALS |
3183 | bool | |
1da177e4 | 3184 | |
1da177e4 | 3185 | config MIPS32_COMPAT |
78aaf956 | 3186 | bool |
1da177e4 LT |
3187 | |
3188 | config COMPAT | |
3189 | bool | |
1da177e4 | 3190 | |
05e43966 AN |
3191 | config SYSVIPC_COMPAT |
3192 | bool | |
05e43966 | 3193 | |
1da177e4 LT |
3194 | config MIPS32_O32 |
3195 | bool "Kernel support for o32 binaries" | |
78aaf956 RB |
3196 | depends on 64BIT |
3197 | select ARCH_WANT_OLD_COMPAT_IPC | |
3198 | select COMPAT | |
3199 | select MIPS32_COMPAT | |
3200 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3201 | help |
3202 | Select this option if you want to run o32 binaries. These are pure | |
3203 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of | |
3204 | existing binaries are in this format. | |
3205 | ||
3206 | If unsure, say Y. | |
3207 | ||
3208 | config MIPS32_N32 | |
3209 | bool "Kernel support for n32 binaries" | |
c22eacfe | 3210 | depends on 64BIT |
5a9372f7 | 3211 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
78aaf956 RB |
3212 | select COMPAT |
3213 | select MIPS32_COMPAT | |
3214 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3215 | help |
3216 | Select this option if you want to run n32 binaries. These are | |
3217 | 64-bit binaries using 32-bit quantities for addressing and certain | |
3218 | data that would normally be 64-bit. They are used in special | |
3219 | cases. | |
3220 | ||
3221 | If unsure, say N. | |
3222 | ||
3223 | config BINFMT_ELF32 | |
3224 | bool | |
3225 | default y if MIPS32_O32 || MIPS32_N32 | |
f43edca7 | 3226 | select ELFCORE |
1da177e4 | 3227 | |
2116245e RB |
3228 | menu "Power management options" |
3229 | ||
363c55ca WZ |
3230 | config ARCH_HIBERNATION_POSSIBLE |
3231 | def_bool y | |
3f5b3e17 | 3232 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
363c55ca | 3233 | |
f4cb5700 JB |
3234 | config ARCH_SUSPEND_POSSIBLE |
3235 | def_bool y | |
3f5b3e17 | 3236 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
f4cb5700 | 3237 | |
2116245e | 3238 | source "kernel/power/Kconfig" |
952fa954 | 3239 | |
1da177e4 LT |
3240 | endmenu |
3241 | ||
7a998935 VK |
3242 | config MIPS_EXTERNAL_TIMER |
3243 | bool | |
3244 | ||
7a998935 | 3245 | menu "CPU Power Management" |
c095ebaf PB |
3246 | |
3247 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER | |
7a998935 | 3248 | source "drivers/cpufreq/Kconfig" |
7a998935 | 3249 | endif |
9726b43a | 3250 | |
c095ebaf PB |
3251 | source "drivers/cpuidle/Kconfig" |
3252 | ||
3253 | endmenu | |
3254 | ||
98cdee0e RB |
3255 | source "drivers/firmware/Kconfig" |
3256 | ||
2235a54d | 3257 | source "arch/mips/kvm/Kconfig" |