Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | config MIPS |
3 | bool | |
4 | default y | |
942fa985 | 5 | select ARCH_32BIT_OFF_T if !64BIT |
ea6a3737 | 6 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
12597988 | 7 | select ARCH_CLOCKSOURCE_DATA |
12597988 MR |
8 | select ARCH_HAS_ELF_RANDOMIZE |
9 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST | |
1e35918a | 10 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
12597988 | 11 | select ARCH_SUPPORTS_UPROBES |
1ee3630a | 12 | select ARCH_USE_BUILTIN_BSWAP |
12597988 | 13 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
25da4e9d | 14 | select ARCH_USE_QUEUED_RWLOCKS |
0b17c967 | 15 | select ARCH_USE_QUEUED_SPINLOCKS |
12597988 MR |
16 | select ARCH_WANT_IPC_PARSE_VERSION |
17 | select BUILDTIME_EXTABLE_SORT | |
18 | select CLONE_BACKWARDS | |
57eeaced | 19 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
12597988 MR |
20 | select CPU_PM if CPU_IDLE |
21 | select GENERIC_ATOMIC64 if !64BIT | |
22 | select GENERIC_CLOCKEVENTS | |
23 | select GENERIC_CMOS_UPDATE | |
24 | select GENERIC_CPU_AUTOPROBE | |
b962aeb0 | 25 | select GENERIC_IOMAP |
12597988 MR |
26 | select GENERIC_IRQ_PROBE |
27 | select GENERIC_IRQ_SHOW | |
6630a8e5 | 28 | select GENERIC_ISA_DMA if EISA |
740129b3 AP |
29 | select GENERIC_LIB_ASHLDI3 |
30 | select GENERIC_LIB_ASHRDI3 | |
31 | select GENERIC_LIB_CMPDI2 | |
32 | select GENERIC_LIB_LSHRDI3 | |
33 | select GENERIC_LIB_UCMPDI2 | |
12597988 MR |
34 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
35 | select GENERIC_SMP_IDLE_THREAD | |
36 | select GENERIC_TIME_VSYSCALL | |
37 | select HANDLE_DOMAIN_IRQ | |
906d441f | 38 | select HAVE_ARCH_COMPILER_H |
12597988 | 39 | select HAVE_ARCH_JUMP_LABEL |
88547001 | 40 | select HAVE_ARCH_KGDB |
109c32ff MR |
41 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
42 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT | |
490b004f | 43 | select HAVE_ARCH_SECCOMP_FILTER |
c0ff3c53 | 44 | select HAVE_ARCH_TRACEHOOK |
12597988 | 45 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT |
716850ab | 46 | select HAVE_EBPF_JIT if (!CPU_MICROMIPS) |
12597988 MR |
47 | select HAVE_CONTEXT_TRACKING |
48 | select HAVE_COPY_THREAD_TLS | |
49 | select HAVE_C_RECORDMCOUNT | |
50 | select HAVE_DEBUG_KMEMLEAK | |
51 | select HAVE_DEBUG_STACKOVERFLOW | |
12597988 | 52 | select HAVE_DMA_CONTIGUOUS |
538f1952 | 53 | select HAVE_DYNAMIC_FTRACE |
12597988 | 54 | select HAVE_EXIT_THREAD |
538f1952 | 55 | select HAVE_FTRACE_MCOUNT_RECORD |
29c5d346 | 56 | select HAVE_FUNCTION_GRAPH_TRACER |
12597988 | 57 | select HAVE_FUNCTION_TRACER |
12597988 | 58 | select HAVE_IDE |
b3a428b4 | 59 | select HAVE_IOREMAP_PROT |
12597988 MR |
60 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
61 | select HAVE_IRQ_TIME_ACCOUNTING | |
c1bf207d DD |
62 | select HAVE_KPROBES |
63 | select HAVE_KRETPROBES | |
c0436b50 | 64 | select HAVE_LD_DEAD_CODE_DATA_ELIMINATION |
9d15ffc8 | 65 | select HAVE_MEMBLOCK_NODE_MAP |
786d35d4 | 66 | select HAVE_MOD_ARCH_SPECIFIC |
42a0bb3f | 67 | select HAVE_NMI |
12597988 MR |
68 | select HAVE_OPROFILE |
69 | select HAVE_PERF_EVENTS | |
70 | select HAVE_REGS_AND_STACK_ACCESS_API | |
9ea141ad | 71 | select HAVE_RSEQ |
d148eac0 | 72 | select HAVE_STACKPROTECTOR |
12597988 | 73 | select HAVE_SYSCALL_TRACEPOINTS |
a3f14310 | 74 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
12597988 | 75 | select IRQ_FORCED_THREADING |
6630a8e5 | 76 | select ISA if EISA |
2f12fb20 | 77 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
12597988 MR |
78 | select MODULES_USE_ELF_REL if MODULES |
79 | select PERF_USE_VMALLOC | |
05a0a344 | 80 | select RTC_LIB |
d79d853d | 81 | select SYSCTL_EXCEPTION_TRACE |
12597988 | 82 | select VIRT_TO_BUS |
1da177e4 | 83 | |
1da177e4 LT |
84 | menu "Machine selection" |
85 | ||
5e83d430 RB |
86 | choice |
87 | prompt "System type" | |
d41e6858 | 88 | default MIPS_GENERIC |
1da177e4 | 89 | |
eed0eabd PB |
90 | config MIPS_GENERIC |
91 | bool "Generic board-agnostic MIPS kernel" | |
92 | select BOOT_RAW | |
93 | select BUILTIN_DTB | |
94 | select CEVT_R4K | |
95 | select CLKSRC_MIPS_GIC | |
96 | select COMMON_CLK | |
97 | select CPU_MIPSR2_IRQ_VI | |
98 | select CPU_MIPSR2_IRQ_EI | |
99 | select CSRC_R4K | |
100 | select DMA_PERDEV_COHERENT | |
eb01d42a | 101 | select HAVE_PCI |
eed0eabd PB |
102 | select IRQ_MIPS_CPU |
103 | select LIBFDT | |
0211d49e | 104 | select MIPS_AUTO_PFN_OFFSET |
eed0eabd PB |
105 | select MIPS_CPU_SCACHE |
106 | select MIPS_GIC | |
107 | select MIPS_L1_CACHE_SHIFT_7 | |
108 | select NO_EXCEPT_FILL | |
109 | select PCI_DRIVERS_GENERIC | |
110 | select PINCTRL | |
111 | select SMP_UP if SMP | |
a3078e59 | 112 | select SWAP_IO_SPACE |
eed0eabd PB |
113 | select SYS_HAS_CPU_MIPS32_R1 |
114 | select SYS_HAS_CPU_MIPS32_R2 | |
115 | select SYS_HAS_CPU_MIPS32_R6 | |
116 | select SYS_HAS_CPU_MIPS64_R1 | |
117 | select SYS_HAS_CPU_MIPS64_R2 | |
118 | select SYS_HAS_CPU_MIPS64_R6 | |
119 | select SYS_SUPPORTS_32BIT_KERNEL | |
120 | select SYS_SUPPORTS_64BIT_KERNEL | |
121 | select SYS_SUPPORTS_BIG_ENDIAN | |
122 | select SYS_SUPPORTS_HIGHMEM | |
123 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
124 | select SYS_SUPPORTS_MICROMIPS | |
125 | select SYS_SUPPORTS_MIPS_CPS | |
126 | select SYS_SUPPORTS_MIPS16 | |
127 | select SYS_SUPPORTS_MULTITHREADING | |
128 | select SYS_SUPPORTS_RELOCATABLE | |
129 | select SYS_SUPPORTS_SMARTMIPS | |
2e6522c5 CL |
130 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
131 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
132 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
133 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
134 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
135 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
eed0eabd | 136 | select USE_OF |
2fe8ea39 | 137 | select UHI_BOOT |
eed0eabd PB |
138 | help |
139 | Select this to build a kernel which aims to support multiple boards, | |
140 | generally using a flattened device tree passed from the bootloader | |
141 | using the boot protocol defined in the UHI (Unified Hosting | |
142 | Interface) specification. | |
143 | ||
42a4f17d | 144 | config MIPS_ALCHEMY |
c3543e25 | 145 | bool "Alchemy processor based machines" |
d4a451d5 | 146 | select PHYS_ADDR_T_64BIT |
f772cdb2 | 147 | select CEVT_R4K |
d7ea335c | 148 | select CSRC_R4K |
67e38cf2 | 149 | select IRQ_MIPS_CPU |
88e9a93c | 150 | select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is |
42a4f17d ML |
151 | select SYS_HAS_CPU_MIPS32_R1 |
152 | select SYS_SUPPORTS_32BIT_KERNEL | |
153 | select SYS_SUPPORTS_APM_EMULATION | |
d30a2b47 | 154 | select GPIOLIB |
1b93b3c3 | 155 | select SYS_SUPPORTS_ZBOOT |
47440229 | 156 | select COMMON_CLK |
1da177e4 | 157 | |
7ca5dc14 FF |
158 | config AR7 |
159 | bool "Texas Instruments AR7" | |
160 | select BOOT_ELF32 | |
161 | select DMA_NONCOHERENT | |
162 | select CEVT_R4K | |
163 | select CSRC_R4K | |
67e38cf2 | 164 | select IRQ_MIPS_CPU |
7ca5dc14 FF |
165 | select NO_EXCEPT_FILL |
166 | select SWAP_IO_SPACE | |
167 | select SYS_HAS_CPU_MIPS32_R1 | |
168 | select SYS_HAS_EARLY_PRINTK | |
169 | select SYS_SUPPORTS_32BIT_KERNEL | |
170 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 171 | select SYS_SUPPORTS_MIPS16 |
1b93b3c3 | 172 | select SYS_SUPPORTS_ZBOOT_UART16550 |
d30a2b47 | 173 | select GPIOLIB |
7ca5dc14 | 174 | select VLYNQ |
8551fb64 | 175 | select HAVE_CLK |
7ca5dc14 FF |
176 | help |
177 | Support for the Texas Instruments AR7 System-on-a-Chip | |
178 | family: TNETD7100, 7200 and 7300. | |
179 | ||
43cc739f SR |
180 | config ATH25 |
181 | bool "Atheros AR231x/AR531x SoC support" | |
182 | select CEVT_R4K | |
183 | select CSRC_R4K | |
184 | select DMA_NONCOHERENT | |
67e38cf2 | 185 | select IRQ_MIPS_CPU |
1753e74e | 186 | select IRQ_DOMAIN |
43cc739f SR |
187 | select SYS_HAS_CPU_MIPS32_R1 |
188 | select SYS_SUPPORTS_BIG_ENDIAN | |
189 | select SYS_SUPPORTS_32BIT_KERNEL | |
8aaa7278 | 190 | select SYS_HAS_EARLY_PRINTK |
43cc739f SR |
191 | help |
192 | Support for Atheros AR231x and Atheros AR531x based boards | |
193 | ||
d4a67d9d GJ |
194 | config ATH79 |
195 | bool "Atheros AR71XX/AR724X/AR913X based boards" | |
ff591a91 | 196 | select ARCH_HAS_RESET_CONTROLLER |
d4a67d9d GJ |
197 | select BOOT_RAW |
198 | select CEVT_R4K | |
199 | select CSRC_R4K | |
200 | select DMA_NONCOHERENT | |
d30a2b47 | 201 | select GPIOLIB |
a08227a2 | 202 | select PINCTRL |
94638067 | 203 | select HAVE_CLK |
411520af | 204 | select COMMON_CLK |
2c4f1ac5 | 205 | select CLKDEV_LOOKUP |
67e38cf2 | 206 | select IRQ_MIPS_CPU |
d4a67d9d GJ |
207 | select SYS_HAS_CPU_MIPS32_R2 |
208 | select SYS_HAS_EARLY_PRINTK | |
209 | select SYS_SUPPORTS_32BIT_KERNEL | |
210 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 211 | select SYS_SUPPORTS_MIPS16 |
b3f0a250 | 212 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
03c8c407 | 213 | select USE_OF |
53d473fc | 214 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
d4a67d9d GJ |
215 | help |
216 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. | |
217 | ||
5f2d4459 KC |
218 | config BMIPS_GENERIC |
219 | bool "Broadcom Generic BMIPS kernel" | |
d59098a0 CH |
220 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
221 | select ARCH_HAS_PHYS_TO_DMA | |
d666cd02 KC |
222 | select BOOT_RAW |
223 | select NO_EXCEPT_FILL | |
224 | select USE_OF | |
225 | select CEVT_R4K | |
226 | select CSRC_R4K | |
227 | select SYNC_R4K | |
228 | select COMMON_CLK | |
c7c42ec2 | 229 | select BCM6345_L1_IRQ |
60b858f2 KC |
230 | select BCM7038_L1_IRQ |
231 | select BCM7120_L2_IRQ | |
232 | select BRCMSTB_L2_IRQ | |
67e38cf2 | 233 | select IRQ_MIPS_CPU |
60b858f2 | 234 | select DMA_NONCOHERENT |
d666cd02 | 235 | select SYS_SUPPORTS_32BIT_KERNEL |
60b858f2 | 236 | select SYS_SUPPORTS_LITTLE_ENDIAN |
d666cd02 KC |
237 | select SYS_SUPPORTS_BIG_ENDIAN |
238 | select SYS_SUPPORTS_HIGHMEM | |
60b858f2 KC |
239 | select SYS_HAS_CPU_BMIPS32_3300 |
240 | select SYS_HAS_CPU_BMIPS4350 | |
241 | select SYS_HAS_CPU_BMIPS4380 | |
d666cd02 KC |
242 | select SYS_HAS_CPU_BMIPS5000 |
243 | select SWAP_IO_SPACE | |
60b858f2 KC |
244 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
245 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
246 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
247 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
4dc4704c | 248 | select HARDIRQS_SW_RESEND |
d666cd02 | 249 | help |
5f2d4459 KC |
250 | Build a generic DT-based kernel image that boots on select |
251 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top | |
252 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN | |
253 | must be set appropriately for your board. | |
d666cd02 | 254 | |
1c0c13eb | 255 | config BCM47XX |
c619366e | 256 | bool "Broadcom BCM47XX based boards" |
fe08f8c2 | 257 | select BOOT_RAW |
42f77542 | 258 | select CEVT_R4K |
940f6b48 | 259 | select CSRC_R4K |
1c0c13eb | 260 | select DMA_NONCOHERENT |
eb01d42a | 261 | select HAVE_PCI |
67e38cf2 | 262 | select IRQ_MIPS_CPU |
314878d2 | 263 | select SYS_HAS_CPU_MIPS32_R1 |
dd54dedd | 264 | select NO_EXCEPT_FILL |
1c0c13eb AJ |
265 | select SYS_SUPPORTS_32BIT_KERNEL |
266 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 267 | select SYS_SUPPORTS_MIPS16 |
6507831f | 268 | select SYS_SUPPORTS_ZBOOT |
25e5fb97 | 269 | select SYS_HAS_EARLY_PRINTK |
e6086557 | 270 | select USE_GENERIC_EARLY_PRINTK_8250 |
c949c0bc RM |
271 | select GPIOLIB |
272 | select LEDS_GPIO_REGISTER | |
f6e734a8 | 273 | select BCM47XX_NVRAM |
2ab71a02 | 274 | select BCM47XX_SPROM |
dfe00495 | 275 | select BCM47XX_SSB if !BCM47XX_BCMA |
1c0c13eb | 276 | help |
371a4151 | 277 | Support for BCM47XX based boards |
1c0c13eb | 278 | |
e7300d04 MB |
279 | config BCM63XX |
280 | bool "Broadcom BCM63XX based boards" | |
ae8de61c | 281 | select BOOT_RAW |
e7300d04 MB |
282 | select CEVT_R4K |
283 | select CSRC_R4K | |
fc264022 | 284 | select SYNC_R4K |
e7300d04 | 285 | select DMA_NONCOHERENT |
67e38cf2 | 286 | select IRQ_MIPS_CPU |
e7300d04 MB |
287 | select SYS_SUPPORTS_32BIT_KERNEL |
288 | select SYS_SUPPORTS_BIG_ENDIAN | |
289 | select SYS_HAS_EARLY_PRINTK | |
290 | select SWAP_IO_SPACE | |
d30a2b47 | 291 | select GPIOLIB |
3e82eeeb | 292 | select HAVE_CLK |
af2418be | 293 | select MIPS_L1_CACHE_SHIFT_4 |
c5af3c2d | 294 | select CLKDEV_LOOKUP |
e7300d04 | 295 | help |
371a4151 | 296 | Support for BCM63XX based boards |
e7300d04 | 297 | |
1da177e4 | 298 | config MIPS_COBALT |
3fa986fa | 299 | bool "Cobalt Server" |
42f77542 | 300 | select CEVT_R4K |
940f6b48 | 301 | select CSRC_R4K |
1097c6ac | 302 | select CEVT_GT641XX |
1da177e4 | 303 | select DMA_NONCOHERENT |
eb01d42a | 304 | select FORCE_PCI |
d865bea4 | 305 | select I8253 |
1da177e4 | 306 | select I8259 |
67e38cf2 | 307 | select IRQ_MIPS_CPU |
d5ab1a69 | 308 | select IRQ_GT641XX |
252161ec | 309 | select PCI_GT64XXX_PCI0 |
7cf8053b | 310 | select SYS_HAS_CPU_NEVADA |
0a22e0d4 | 311 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 312 | select SYS_SUPPORTS_32BIT_KERNEL |
0e8774b6 | 313 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 314 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e6086557 | 315 | select USE_GENERIC_EARLY_PRINTK_8250 |
1da177e4 LT |
316 | |
317 | config MACH_DECSTATION | |
3fa986fa | 318 | bool "DECstations" |
1da177e4 | 319 | select BOOT_ELF32 |
6457d9fc | 320 | select CEVT_DS1287 |
81d10bad | 321 | select CEVT_R4K if CPU_R4X00 |
4247417d | 322 | select CSRC_IOASIC |
81d10bad | 323 | select CSRC_R4K if CPU_R4X00 |
20d60d99 MR |
324 | select CPU_DADDI_WORKAROUNDS if 64BIT |
325 | select CPU_R4000_WORKAROUNDS if 64BIT | |
326 | select CPU_R4400_WORKAROUNDS if 64BIT | |
1da177e4 | 327 | select DMA_NONCOHERENT |
ce816fa8 | 328 | select NO_IOPORT_MAP |
67e38cf2 | 329 | select IRQ_MIPS_CPU |
7cf8053b RB |
330 | select SYS_HAS_CPU_R3000 |
331 | select SYS_HAS_CPU_R4X00 | |
ed5ba2fb | 332 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 333 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 334 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1723b4a3 AN |
335 | select SYS_SUPPORTS_128HZ |
336 | select SYS_SUPPORTS_256HZ | |
337 | select SYS_SUPPORTS_1024HZ | |
930beb5a | 338 | select MIPS_L1_CACHE_SHIFT_4 |
5e83d430 | 339 | help |
1da177e4 LT |
340 | This enables support for DEC's MIPS based workstations. For details |
341 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the | |
342 | DECstation porting pages on <http://decstation.unix-ag.org/>. | |
343 | ||
344 | If you have one of the following DECstation Models you definitely | |
345 | want to choose R4xx0 for the CPU Type: | |
346 | ||
9308816c RB |
347 | DECstation 5000/50 |
348 | DECstation 5000/150 | |
349 | DECstation 5000/260 | |
350 | DECsystem 5900/260 | |
1da177e4 LT |
351 | |
352 | otherwise choose R3000. | |
353 | ||
5e83d430 | 354 | config MACH_JAZZ |
3fa986fa | 355 | bool "Jazz family of machines" |
a211a082 | 356 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 357 | select ARCH_MIGHT_HAVE_PC_SERIO |
0e2794b0 RB |
358 | select FW_ARC |
359 | select FW_ARC32 | |
5e83d430 | 360 | select ARCH_MAY_HAVE_PC_FDC |
42f77542 | 361 | select CEVT_R4K |
940f6b48 | 362 | select CSRC_R4K |
e2defae5 | 363 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
5e83d430 | 364 | select GENERIC_ISA_DMA |
8a118c38 | 365 | select HAVE_PCSPKR_PLATFORM |
67e38cf2 | 366 | select IRQ_MIPS_CPU |
d865bea4 | 367 | select I8253 |
5e83d430 RB |
368 | select I8259 |
369 | select ISA | |
7cf8053b | 370 | select SYS_HAS_CPU_R4X00 |
5e83d430 | 371 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 372 | select SYS_SUPPORTS_64BIT_KERNEL |
1723b4a3 | 373 | select SYS_SUPPORTS_100HZ |
1da177e4 | 374 | help |
371a4151 EWI |
375 | This a family of machines based on the MIPS R4030 chipset which was |
376 | used by several vendors to build RISC/os and Windows NT workstations. | |
377 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and | |
378 | Olivetti M700-10 workstations. | |
5e83d430 | 379 | |
de361e8b PB |
380 | config MACH_INGENIC |
381 | bool "Ingenic SoC based machines" | |
5ebabe59 LPC |
382 | select SYS_SUPPORTS_32BIT_KERNEL |
383 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
f9c9affc | 384 | select SYS_SUPPORTS_ZBOOT_UART16550 |
5ebabe59 | 385 | select DMA_NONCOHERENT |
67e38cf2 | 386 | select IRQ_MIPS_CPU |
37b4c3ca | 387 | select PINCTRL |
d30a2b47 | 388 | select GPIOLIB |
ff1930c6 | 389 | select COMMON_CLK |
83bc7692 | 390 | select GENERIC_IRQ_CHIP |
15205fc0 | 391 | select BUILTIN_DTB if MIPS_NO_APPENDED_DTB |
ffb1843d | 392 | select USE_OF |
6ec127fb | 393 | select LIBFDT |
5ebabe59 | 394 | |
171bb2f1 JC |
395 | config LANTIQ |
396 | bool "Lantiq based platforms" | |
397 | select DMA_NONCOHERENT | |
67e38cf2 | 398 | select IRQ_MIPS_CPU |
171bb2f1 JC |
399 | select CEVT_R4K |
400 | select CSRC_R4K | |
401 | select SYS_HAS_CPU_MIPS32_R1 | |
402 | select SYS_HAS_CPU_MIPS32_R2 | |
403 | select SYS_SUPPORTS_BIG_ENDIAN | |
404 | select SYS_SUPPORTS_32BIT_KERNEL | |
377cb1b6 | 405 | select SYS_SUPPORTS_MIPS16 |
171bb2f1 | 406 | select SYS_SUPPORTS_MULTITHREADING |
f35764e7 | 407 | select SYS_SUPPORTS_VPE_LOADER |
171bb2f1 | 408 | select SYS_HAS_EARLY_PRINTK |
d30a2b47 | 409 | select GPIOLIB |
171bb2f1 JC |
410 | select SWAP_IO_SPACE |
411 | select BOOT_RAW | |
287e3f3f | 412 | select CLKDEV_LOOKUP |
a0392222 | 413 | select USE_OF |
3f8c50c9 JC |
414 | select PINCTRL |
415 | select PINCTRL_LANTIQ | |
c530781c JC |
416 | select ARCH_HAS_RESET_CONTROLLER |
417 | select RESET_CONTROLLER | |
171bb2f1 | 418 | |
1f21d2bd BM |
419 | config LASAT |
420 | bool "LASAT Networks platforms" | |
42f77542 | 421 | select CEVT_R4K |
16f0bbbc | 422 | select CRC32 |
940f6b48 | 423 | select CSRC_R4K |
1f21d2bd BM |
424 | select DMA_NONCOHERENT |
425 | select SYS_HAS_EARLY_PRINTK | |
eb01d42a | 426 | select HAVE_PCI |
67e38cf2 | 427 | select IRQ_MIPS_CPU |
1f21d2bd BM |
428 | select PCI_GT64XXX_PCI0 |
429 | select MIPS_NILE4 | |
430 | select R5000_CPU_SCACHE | |
431 | select SYS_HAS_CPU_R5000 | |
432 | select SYS_SUPPORTS_32BIT_KERNEL | |
433 | select SYS_SUPPORTS_64BIT_KERNEL if BROKEN | |
434 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1f21d2bd | 435 | |
30ad29bb HC |
436 | config MACH_LOONGSON32 |
437 | bool "Loongson-1 family of machines" | |
c7e8c668 | 438 | select SYS_SUPPORTS_ZBOOT |
ade299d8 | 439 | help |
30ad29bb | 440 | This enables support for the Loongson-1 family of machines. |
85749d24 | 441 | |
30ad29bb HC |
442 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
443 | the Institute of Computing Technology (ICT), Chinese Academy of | |
444 | Sciences (CAS). | |
ade299d8 | 445 | |
30ad29bb HC |
446 | config MACH_LOONGSON64 |
447 | bool "Loongson-2/3 family of machines" | |
ca585cf9 KC |
448 | select SYS_SUPPORTS_ZBOOT |
449 | help | |
30ad29bb | 450 | This enables the support of Loongson-2/3 family of machines. |
ca585cf9 | 451 | |
30ad29bb HC |
452 | Loongson-2 is a family of single-core CPUs and Loongson-3 is a |
453 | family of multi-core CPUs. They are both 64-bit general-purpose | |
454 | MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute | |
455 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS) | |
456 | in the People's Republic of China. The chief architect is Professor | |
457 | Weiwu Hu. | |
ca585cf9 | 458 | |
6a438309 AB |
459 | config MACH_PISTACHIO |
460 | bool "IMG Pistachio SoC based boards" | |
6a438309 AB |
461 | select BOOT_ELF32 |
462 | select BOOT_RAW | |
463 | select CEVT_R4K | |
464 | select CLKSRC_MIPS_GIC | |
465 | select COMMON_CLK | |
466 | select CSRC_R4K | |
645c7827 | 467 | select DMA_NONCOHERENT |
d30a2b47 | 468 | select GPIOLIB |
67e38cf2 | 469 | select IRQ_MIPS_CPU |
6a438309 AB |
470 | select LIBFDT |
471 | select MFD_SYSCON | |
472 | select MIPS_CPU_SCACHE | |
473 | select MIPS_GIC | |
474 | select PINCTRL | |
475 | select REGULATOR | |
476 | select SYS_HAS_CPU_MIPS32_R2 | |
477 | select SYS_SUPPORTS_32BIT_KERNEL | |
478 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
479 | select SYS_SUPPORTS_MIPS_CPS | |
480 | select SYS_SUPPORTS_MULTITHREADING | |
41cc07be | 481 | select SYS_SUPPORTS_RELOCATABLE |
6a438309 | 482 | select SYS_SUPPORTS_ZBOOT |
018f62ee EG |
483 | select SYS_HAS_EARLY_PRINTK |
484 | select USE_GENERIC_EARLY_PRINTK_8250 | |
6a438309 AB |
485 | select USE_OF |
486 | help | |
487 | This enables support for the IMG Pistachio SoC platform. | |
488 | ||
1da177e4 | 489 | config MIPS_MALTA |
3fa986fa | 490 | bool "MIPS Malta board" |
61ed242d | 491 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 492 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 493 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 494 | select BOOT_ELF32 |
fa71c960 | 495 | select BOOT_RAW |
e8823d26 | 496 | select BUILTIN_DTB |
42f77542 | 497 | select CEVT_R4K |
fa5635a2 | 498 | select CLKSRC_MIPS_GIC |
42b002ab | 499 | select COMMON_CLK |
47bf2b03 | 500 | select CSRC_R4K |
885014bc | 501 | select DMA_MAYBE_COHERENT |
1da177e4 | 502 | select GENERIC_ISA_DMA |
8a118c38 | 503 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 504 | select HAVE_PCI |
d865bea4 | 505 | select I8253 |
1da177e4 | 506 | select I8259 |
47bf2b03 MK |
507 | select IRQ_MIPS_CPU |
508 | select LIBFDT | |
5e83d430 | 509 | select MIPS_BONITO64 |
9318c51a | 510 | select MIPS_CPU_SCACHE |
47bf2b03 | 511 | select MIPS_GIC |
a7ef1ead | 512 | select MIPS_L1_CACHE_SHIFT_6 |
5e83d430 | 513 | select MIPS_MSC |
47bf2b03 | 514 | select PCI_GT64XXX_PCI0 |
ecafe3e9 | 515 | select SMP_UP if SMP |
1da177e4 | 516 | select SWAP_IO_SPACE |
7cf8053b RB |
517 | select SYS_HAS_CPU_MIPS32_R1 |
518 | select SYS_HAS_CPU_MIPS32_R2 | |
bfc3c5a6 | 519 | select SYS_HAS_CPU_MIPS32_R3_5 |
c5b36783 | 520 | select SYS_HAS_CPU_MIPS32_R5 |
575509b6 | 521 | select SYS_HAS_CPU_MIPS32_R6 |
7cf8053b | 522 | select SYS_HAS_CPU_MIPS64_R1 |
5d9fbed1 | 523 | select SYS_HAS_CPU_MIPS64_R2 |
575509b6 | 524 | select SYS_HAS_CPU_MIPS64_R6 |
7cf8053b RB |
525 | select SYS_HAS_CPU_NEVADA |
526 | select SYS_HAS_CPU_RM7000 | |
ed5ba2fb YY |
527 | select SYS_SUPPORTS_32BIT_KERNEL |
528 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 529 | select SYS_SUPPORTS_BIG_ENDIAN |
c5b36783 | 530 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 531 | select SYS_SUPPORTS_LITTLE_ENDIAN |
424ebcdf | 532 | select SYS_SUPPORTS_MICROMIPS |
47bf2b03 | 533 | select SYS_SUPPORTS_MIPS16 |
0365070f | 534 | select SYS_SUPPORTS_MIPS_CMP |
e56b6aa6 | 535 | select SYS_SUPPORTS_MIPS_CPS |
f41ae0b2 | 536 | select SYS_SUPPORTS_MULTITHREADING |
47bf2b03 | 537 | select SYS_SUPPORTS_RELOCATABLE |
9693a853 | 538 | select SYS_SUPPORTS_SMARTMIPS |
f35764e7 | 539 | select SYS_SUPPORTS_VPE_LOADER |
1b93b3c3 | 540 | select SYS_SUPPORTS_ZBOOT |
e8823d26 | 541 | select USE_OF |
abcc82b1 | 542 | select ZONE_DMA32 if 64BIT |
1da177e4 | 543 | help |
f638d197 | 544 | This enables support for the MIPS Technologies Malta evaluation |
1da177e4 LT |
545 | board. |
546 | ||
2572f00d JH |
547 | config MACH_PIC32 |
548 | bool "Microchip PIC32 Family" | |
549 | help | |
550 | This enables support for the Microchip PIC32 family of platforms. | |
551 | ||
552 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core | |
553 | microcontrollers. | |
554 | ||
a83860c2 RB |
555 | config NEC_MARKEINS |
556 | bool "NEC EMMA2RH Mark-eins board" | |
557 | select SOC_EMMA2RH | |
eb01d42a | 558 | select HAVE_PCI |
a83860c2 RB |
559 | help |
560 | This enables support for the NEC Electronics Mark-eins boards. | |
ade299d8 | 561 | |
5e83d430 | 562 | config MACH_VR41XX |
74142d65 | 563 | bool "NEC VR4100 series based machines" |
42f77542 | 564 | select CEVT_R4K |
940f6b48 | 565 | select CSRC_R4K |
7cf8053b | 566 | select SYS_HAS_CPU_VR41XX |
377cb1b6 | 567 | select SYS_SUPPORTS_MIPS16 |
d30a2b47 | 568 | select GPIOLIB |
5e83d430 | 569 | |
edb6310a DL |
570 | config NXP_STB220 |
571 | bool "NXP STB220 board" | |
572 | select SOC_PNX833X | |
573 | help | |
371a4151 | 574 | Support for NXP Semiconductors STB220 Development Board. |
edb6310a DL |
575 | |
576 | config NXP_STB225 | |
577 | bool "NXP 225 board" | |
578 | select SOC_PNX833X | |
579 | select SOC_PNX8335 | |
580 | help | |
371a4151 | 581 | Support for NXP Semiconductors STB225 Development Board. |
edb6310a | 582 | |
9267a30d MSJ |
583 | config PMC_MSP |
584 | bool "PMC-Sierra MSP chipsets" | |
39d30c13 A |
585 | select CEVT_R4K |
586 | select CSRC_R4K | |
9267a30d MSJ |
587 | select DMA_NONCOHERENT |
588 | select SWAP_IO_SPACE | |
589 | select NO_EXCEPT_FILL | |
590 | select BOOT_RAW | |
591 | select SYS_HAS_CPU_MIPS32_R1 | |
592 | select SYS_HAS_CPU_MIPS32_R2 | |
593 | select SYS_SUPPORTS_32BIT_KERNEL | |
594 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 595 | select SYS_SUPPORTS_MIPS16 |
67e38cf2 | 596 | select IRQ_MIPS_CPU |
9267a30d MSJ |
597 | select SERIAL_8250 |
598 | select SERIAL_8250_CONSOLE | |
9296d94d FF |
599 | select USB_EHCI_BIG_ENDIAN_MMIO |
600 | select USB_EHCI_BIG_ENDIAN_DESC | |
9267a30d MSJ |
601 | help |
602 | This adds support for the PMC-Sierra family of Multi-Service | |
603 | Processor System-On-A-Chips. These parts include a number | |
604 | of integrated peripherals, interfaces and DSPs in addition to | |
605 | a variety of MIPS cores. | |
606 | ||
ae2b5bb6 JC |
607 | config RALINK |
608 | bool "Ralink based machines" | |
609 | select CEVT_R4K | |
610 | select CSRC_R4K | |
611 | select BOOT_RAW | |
612 | select DMA_NONCOHERENT | |
67e38cf2 | 613 | select IRQ_MIPS_CPU |
ae2b5bb6 JC |
614 | select USE_OF |
615 | select SYS_HAS_CPU_MIPS32_R1 | |
616 | select SYS_HAS_CPU_MIPS32_R2 | |
617 | select SYS_SUPPORTS_32BIT_KERNEL | |
618 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 619 | select SYS_SUPPORTS_MIPS16 |
ae2b5bb6 | 620 | select SYS_HAS_EARLY_PRINTK |
ae2b5bb6 | 621 | select CLKDEV_LOOKUP |
2a153f1c JC |
622 | select ARCH_HAS_RESET_CONTROLLER |
623 | select RESET_CONTROLLER | |
ae2b5bb6 | 624 | |
1da177e4 | 625 | config SGI_IP22 |
3fa986fa | 626 | bool "SGI IP22 (Indy/Indigo2)" |
0e2794b0 RB |
627 | select FW_ARC |
628 | select FW_ARC32 | |
7a407aa5 | 629 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 630 | select BOOT_ELF32 |
42f77542 | 631 | select CEVT_R4K |
940f6b48 | 632 | select CSRC_R4K |
e2defae5 | 633 | select DEFAULT_SGI_PARTITION |
1da177e4 | 634 | select DMA_NONCOHERENT |
6630a8e5 | 635 | select HAVE_EISA |
d865bea4 | 636 | select I8253 |
68de4803 | 637 | select I8259 |
1da177e4 | 638 | select IP22_CPU_SCACHE |
67e38cf2 | 639 | select IRQ_MIPS_CPU |
aa414dff | 640 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
e2defae5 TB |
641 | select SGI_HAS_I8042 |
642 | select SGI_HAS_INDYDOG | |
36e5c21d | 643 | select SGI_HAS_HAL2 |
e2defae5 TB |
644 | select SGI_HAS_SEEQ |
645 | select SGI_HAS_WD93 | |
646 | select SGI_HAS_ZILOG | |
1da177e4 | 647 | select SWAP_IO_SPACE |
7cf8053b RB |
648 | select SYS_HAS_CPU_R4X00 |
649 | select SYS_HAS_CPU_R5000 | |
2b5e63f6 MM |
650 | # |
651 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
652 | # memory during early boot on some machines. | |
653 | # | |
654 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
655 | # for a more details discussion | |
656 | # | |
657 | # select SYS_HAS_EARLY_PRINTK | |
ed5ba2fb YY |
658 | select SYS_SUPPORTS_32BIT_KERNEL |
659 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 660 | select SYS_SUPPORTS_BIG_ENDIAN |
930beb5a | 661 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
662 | help |
663 | This are the SGI Indy, Challenge S and Indigo2, as well as certain | |
664 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel | |
665 | that runs on these, say Y here. | |
666 | ||
667 | config SGI_IP27 | |
3fa986fa | 668 | bool "SGI IP27 (Origin200/2000)" |
54aed4dd | 669 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
670 | select FW_ARC |
671 | select FW_ARC64 | |
5e83d430 | 672 | select BOOT_ELF64 |
e2defae5 | 673 | select DEFAULT_SGI_PARTITION |
36a88530 | 674 | select SYS_HAS_EARLY_PRINTK |
eb01d42a | 675 | select HAVE_PCI |
69a07a41 | 676 | select IRQ_MIPS_CPU |
e6308b6d | 677 | select IRQ_DOMAIN_HIERARCHY |
130e2fb7 | 678 | select NR_CPUS_DEFAULT_64 |
a57140e9 TB |
679 | select PCI_DRIVERS_GENERIC |
680 | select PCI_XTALK_BRIDGE | |
7cf8053b | 681 | select SYS_HAS_CPU_R10000 |
ed5ba2fb | 682 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 683 | select SYS_SUPPORTS_BIG_ENDIAN |
d8cb4e11 | 684 | select SYS_SUPPORTS_NUMA |
1a5c5de1 | 685 | select SYS_SUPPORTS_SMP |
930beb5a | 686 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
687 | help |
688 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics | |
689 | workstations. To compile a Linux kernel that runs on these, say Y | |
690 | here. | |
691 | ||
e2defae5 | 692 | config SGI_IP28 |
7d60717e | 693 | bool "SGI IP28 (Indigo2 R10k)" |
0e2794b0 RB |
694 | select FW_ARC |
695 | select FW_ARC64 | |
7a407aa5 | 696 | select ARCH_MIGHT_HAVE_PC_SERIO |
e2defae5 TB |
697 | select BOOT_ELF64 |
698 | select CEVT_R4K | |
699 | select CSRC_R4K | |
700 | select DEFAULT_SGI_PARTITION | |
701 | select DMA_NONCOHERENT | |
702 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
67e38cf2 | 703 | select IRQ_MIPS_CPU |
6630a8e5 | 704 | select HAVE_EISA |
e2defae5 TB |
705 | select I8253 |
706 | select I8259 | |
e2defae5 TB |
707 | select SGI_HAS_I8042 |
708 | select SGI_HAS_INDYDOG | |
5b438c44 | 709 | select SGI_HAS_HAL2 |
e2defae5 TB |
710 | select SGI_HAS_SEEQ |
711 | select SGI_HAS_WD93 | |
712 | select SGI_HAS_ZILOG | |
713 | select SWAP_IO_SPACE | |
714 | select SYS_HAS_CPU_R10000 | |
2b5e63f6 MM |
715 | # |
716 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
717 | # memory during early boot on some machines. | |
718 | # | |
719 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
720 | # for a more details discussion | |
721 | # | |
722 | # select SYS_HAS_EARLY_PRINTK | |
e2defae5 TB |
723 | select SYS_SUPPORTS_64BIT_KERNEL |
724 | select SYS_SUPPORTS_BIG_ENDIAN | |
dc24d68d | 725 | select MIPS_L1_CACHE_SHIFT_7 |
371a4151 EWI |
726 | help |
727 | This is the SGI Indigo2 with R10000 processor. To compile a Linux | |
728 | kernel that runs on these, say Y here. | |
e2defae5 | 729 | |
1da177e4 | 730 | config SGI_IP32 |
cfd2afc0 | 731 | bool "SGI IP32 (O2)" |
03df8229 | 732 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
733 | select FW_ARC |
734 | select FW_ARC32 | |
1da177e4 | 735 | select BOOT_ELF32 |
42f77542 | 736 | select CEVT_R4K |
940f6b48 | 737 | select CSRC_R4K |
1da177e4 | 738 | select DMA_NONCOHERENT |
eb01d42a | 739 | select HAVE_PCI |
67e38cf2 | 740 | select IRQ_MIPS_CPU |
1da177e4 LT |
741 | select R5000_CPU_SCACHE |
742 | select RM7000_CPU_SCACHE | |
7cf8053b RB |
743 | select SYS_HAS_CPU_R5000 |
744 | select SYS_HAS_CPU_R10000 if BROKEN | |
745 | select SYS_HAS_CPU_RM7000 | |
dd2f18fe | 746 | select SYS_HAS_CPU_NEVADA |
ed5ba2fb | 747 | select SYS_SUPPORTS_64BIT_KERNEL |
23fbee9d | 748 | select SYS_SUPPORTS_BIG_ENDIAN |
23fbee9d | 749 | help |
5e83d430 | 750 | If you want this kernel to run on SGI O2 workstation, say Y here. |
1da177e4 | 751 | |
ade299d8 YY |
752 | config SIBYTE_CRHINE |
753 | bool "Sibyte BCM91120C-CRhine" | |
9a6dcea1 | 754 | select BOOT_ELF32 |
ade299d8 | 755 | select SIBYTE_BCM1120 |
9a6dcea1 | 756 | select SWAP_IO_SPACE |
7cf8053b | 757 | select SYS_HAS_CPU_SB1 |
9a6dcea1 AI |
758 | select SYS_SUPPORTS_BIG_ENDIAN |
759 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
760 | ||
ade299d8 YY |
761 | config SIBYTE_CARMEL |
762 | bool "Sibyte BCM91120x-Carmel" | |
5e83d430 | 763 | select BOOT_ELF32 |
ade299d8 | 764 | select SIBYTE_BCM1120 |
5e83d430 | 765 | select SWAP_IO_SPACE |
7cf8053b | 766 | select SYS_HAS_CPU_SB1 |
81731f79 | 767 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 768 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 769 | |
ade299d8 YY |
770 | config SIBYTE_CRHONE |
771 | bool "Sibyte BCM91125C-CRhone" | |
5e83d430 | 772 | select BOOT_ELF32 |
ade299d8 | 773 | select SIBYTE_BCM1125 |
5e83d430 | 774 | select SWAP_IO_SPACE |
7cf8053b | 775 | select SYS_HAS_CPU_SB1 |
5e83d430 | 776 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 777 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 778 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 779 | |
5e83d430 | 780 | config SIBYTE_RHONE |
3fa986fa | 781 | bool "Sibyte BCM91125E-Rhone" |
5e83d430 | 782 | select BOOT_ELF32 |
5e83d430 RB |
783 | select SIBYTE_BCM1125H |
784 | select SWAP_IO_SPACE | |
7cf8053b | 785 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
786 | select SYS_SUPPORTS_BIG_ENDIAN |
787 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1da177e4 | 788 | |
ade299d8 YY |
789 | config SIBYTE_SWARM |
790 | bool "Sibyte BCM91250A-SWARM" | |
5e83d430 | 791 | select BOOT_ELF32 |
fcf3ca4c | 792 | select HAVE_PATA_PLATFORM |
ade299d8 | 793 | select SIBYTE_SB1250 |
5e83d430 | 794 | select SWAP_IO_SPACE |
7cf8053b | 795 | select SYS_HAS_CPU_SB1 |
5e83d430 | 796 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 797 | select SYS_SUPPORTS_HIGHMEM |
e3ad1c23 | 798 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 799 | select ZONE_DMA32 if 64BIT |
e4849aff | 800 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
e3ad1c23 | 801 | |
ade299d8 YY |
802 | config SIBYTE_LITTLESUR |
803 | bool "Sibyte BCM91250C2-LittleSur" | |
5e83d430 | 804 | select BOOT_ELF32 |
fcf3ca4c | 805 | select HAVE_PATA_PLATFORM |
5e83d430 RB |
806 | select SIBYTE_SB1250 |
807 | select SWAP_IO_SPACE | |
7cf8053b | 808 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
809 | select SYS_SUPPORTS_BIG_ENDIAN |
810 | select SYS_SUPPORTS_HIGHMEM | |
811 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
756d6d83 | 812 | select ZONE_DMA32 if 64BIT |
1da177e4 | 813 | |
ade299d8 YY |
814 | config SIBYTE_SENTOSA |
815 | bool "Sibyte BCM91250E-Sentosa" | |
5e83d430 | 816 | select BOOT_ELF32 |
5e83d430 RB |
817 | select SIBYTE_SB1250 |
818 | select SWAP_IO_SPACE | |
7cf8053b | 819 | select SYS_HAS_CPU_SB1 |
5e83d430 | 820 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 821 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e4849aff | 822 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 823 | |
ade299d8 YY |
824 | config SIBYTE_BIGSUR |
825 | bool "Sibyte BCM91480B-BigSur" | |
5e83d430 | 826 | select BOOT_ELF32 |
ade299d8 | 827 | select NR_CPUS_DEFAULT_4 |
ade299d8 | 828 | select SIBYTE_BCM1x80 |
5e83d430 | 829 | select SWAP_IO_SPACE |
7cf8053b | 830 | select SYS_HAS_CPU_SB1 |
5e83d430 | 831 | select SYS_SUPPORTS_BIG_ENDIAN |
651194f8 | 832 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 833 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 834 | select ZONE_DMA32 if 64BIT |
e4849aff | 835 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 836 | |
14b36af4 TB |
837 | config SNI_RM |
838 | bool "SNI RM200/300/400" | |
0e2794b0 RB |
839 | select FW_ARC if CPU_LITTLE_ENDIAN |
840 | select FW_ARC32 if CPU_LITTLE_ENDIAN | |
aaa9fad3 | 841 | select FW_SNIPROM if CPU_BIG_ENDIAN |
61ed242d | 842 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 843 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 844 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 845 | select BOOT_ELF32 |
42f77542 | 846 | select CEVT_R4K |
940f6b48 | 847 | select CSRC_R4K |
e2defae5 | 848 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
1da177e4 LT |
849 | select DMA_NONCOHERENT |
850 | select GENERIC_ISA_DMA | |
6630a8e5 | 851 | select HAVE_EISA |
8a118c38 | 852 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 853 | select HAVE_PCI |
67e38cf2 | 854 | select IRQ_MIPS_CPU |
d865bea4 | 855 | select I8253 |
1da177e4 LT |
856 | select I8259 |
857 | select ISA | |
4a0312fc | 858 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
7cf8053b | 859 | select SYS_HAS_CPU_R4X00 |
4a0312fc | 860 | select SYS_HAS_CPU_R5000 |
c066a32a | 861 | select SYS_HAS_CPU_R10000 |
4a0312fc | 862 | select R5000_CPU_SCACHE |
36a88530 | 863 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 864 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 865 | select SYS_SUPPORTS_64BIT_KERNEL |
4a0312fc | 866 | select SYS_SUPPORTS_BIG_ENDIAN |
797798c1 | 867 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 868 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 869 | help |
14b36af4 TB |
870 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
871 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid | |
1da177e4 LT |
872 | Technology and now in turn merged with Fujitsu. Say Y here to |
873 | support this machine type. | |
874 | ||
edcaf1a6 AN |
875 | config MACH_TX39XX |
876 | bool "Toshiba TX39 series based machines" | |
5e83d430 | 877 | |
edcaf1a6 AN |
878 | config MACH_TX49XX |
879 | bool "Toshiba TX49 series based machines" | |
5e83d430 | 880 | |
73b4390f RB |
881 | config MIKROTIK_RB532 |
882 | bool "Mikrotik RB532 boards" | |
883 | select CEVT_R4K | |
884 | select CSRC_R4K | |
885 | select DMA_NONCOHERENT | |
eb01d42a | 886 | select HAVE_PCI |
67e38cf2 | 887 | select IRQ_MIPS_CPU |
73b4390f RB |
888 | select SYS_HAS_CPU_MIPS32_R1 |
889 | select SYS_SUPPORTS_32BIT_KERNEL | |
890 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
891 | select SWAP_IO_SPACE | |
892 | select BOOT_RAW | |
d30a2b47 | 893 | select GPIOLIB |
930beb5a | 894 | select MIPS_L1_CACHE_SHIFT_4 |
73b4390f RB |
895 | help |
896 | Support the Mikrotik(tm) RouterBoard 532 series, | |
897 | based on the IDT RC32434 SoC. | |
898 | ||
9ddebc46 DD |
899 | config CAVIUM_OCTEON_SOC |
900 | bool "Cavium Networks Octeon SoC based boards" | |
a86c7f72 | 901 | select CEVT_R4K |
ea8c64ac | 902 | select ARCH_HAS_PHYS_TO_DMA |
1753d50c | 903 | select HAVE_RAPIDIO |
d4a451d5 | 904 | select PHYS_ADDR_T_64BIT |
a86c7f72 DD |
905 | select SYS_SUPPORTS_64BIT_KERNEL |
906 | select SYS_SUPPORTS_BIG_ENDIAN | |
f65aad41 | 907 | select EDAC_SUPPORT |
b01aec9b | 908 | select EDAC_ATOMIC_SCRUB |
73569d87 DD |
909 | select SYS_SUPPORTS_LITTLE_ENDIAN |
910 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN | |
a86c7f72 | 911 | select SYS_HAS_EARLY_PRINTK |
5e683389 | 912 | select SYS_HAS_CPU_CAVIUM_OCTEON |
eb01d42a | 913 | select HAVE_PCI |
f00e001e | 914 | select ZONE_DMA32 |
465aaed0 | 915 | select HOLES_IN_ZONE |
d30a2b47 | 916 | select GPIOLIB |
6e511163 DD |
917 | select LIBFDT |
918 | select USE_OF | |
919 | select ARCH_SPARSEMEM_ENABLE | |
920 | select SYS_SUPPORTS_SMP | |
7820b84b DD |
921 | select NR_CPUS_DEFAULT_64 |
922 | select MIPS_NR_CPU_NR_MAP_1024 | |
e326479f | 923 | select BUILTIN_DTB |
8c1e6b14 | 924 | select MTD_COMPLEX_MAPPINGS |
09230cbc | 925 | select SWIOTLB |
3ff72be4 | 926 | select SYS_SUPPORTS_RELOCATABLE |
a86c7f72 DD |
927 | help |
928 | This option supports all of the Octeon reference boards from Cavium | |
929 | Networks. It builds a kernel that dynamically determines the Octeon | |
930 | CPU type and supports all known board reference implementations. | |
931 | Some of the supported boards are: | |
932 | EBT3000 | |
933 | EBH3000 | |
934 | EBH3100 | |
935 | Thunder | |
936 | Kodama | |
937 | Hikari | |
938 | Say Y here for most Octeon reference boards. | |
939 | ||
7f058e85 J |
940 | config NLM_XLR_BOARD |
941 | bool "Netlogic XLR/XLS based systems" | |
7f058e85 J |
942 | select BOOT_ELF32 |
943 | select NLM_COMMON | |
7f058e85 J |
944 | select SYS_HAS_CPU_XLR |
945 | select SYS_SUPPORTS_SMP | |
eb01d42a | 946 | select HAVE_PCI |
7f058e85 J |
947 | select SWAP_IO_SPACE |
948 | select SYS_SUPPORTS_32BIT_KERNEL | |
949 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 950 | select PHYS_ADDR_T_64BIT |
7f058e85 J |
951 | select SYS_SUPPORTS_BIG_ENDIAN |
952 | select SYS_SUPPORTS_HIGHMEM | |
7f058e85 J |
953 | select NR_CPUS_DEFAULT_32 |
954 | select CEVT_R4K | |
955 | select CSRC_R4K | |
67e38cf2 | 956 | select IRQ_MIPS_CPU |
b97215fd | 957 | select ZONE_DMA32 if 64BIT |
7f058e85 J |
958 | select SYNC_R4K |
959 | select SYS_HAS_EARLY_PRINTK | |
8f0b0430 J |
960 | select SYS_SUPPORTS_ZBOOT |
961 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
7f058e85 J |
962 | help |
963 | Support for systems based on Netlogic XLR and XLS processors. | |
964 | Say Y here if you have a XLR or XLS based board. | |
965 | ||
1c773ea4 J |
966 | config NLM_XLP_BOARD |
967 | bool "Netlogic XLP based systems" | |
1c773ea4 J |
968 | select BOOT_ELF32 |
969 | select NLM_COMMON | |
970 | select SYS_HAS_CPU_XLP | |
971 | select SYS_SUPPORTS_SMP | |
eb01d42a | 972 | select HAVE_PCI |
1c773ea4 J |
973 | select SYS_SUPPORTS_32BIT_KERNEL |
974 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 975 | select PHYS_ADDR_T_64BIT |
d30a2b47 | 976 | select GPIOLIB |
1c773ea4 J |
977 | select SYS_SUPPORTS_BIG_ENDIAN |
978 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
979 | select SYS_SUPPORTS_HIGHMEM | |
1c773ea4 J |
980 | select NR_CPUS_DEFAULT_32 |
981 | select CEVT_R4K | |
982 | select CSRC_R4K | |
67e38cf2 | 983 | select IRQ_MIPS_CPU |
b97215fd | 984 | select ZONE_DMA32 if 64BIT |
1c773ea4 J |
985 | select SYNC_R4K |
986 | select SYS_HAS_EARLY_PRINTK | |
2f6528e1 | 987 | select USE_OF |
8f0b0430 J |
988 | select SYS_SUPPORTS_ZBOOT |
989 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
1c773ea4 J |
990 | help |
991 | This board is based on Netlogic XLP Processor. | |
992 | Say Y here if you have a XLP based board. | |
993 | ||
9bc463be DD |
994 | config MIPS_PARAVIRT |
995 | bool "Para-Virtualized guest system" | |
996 | select CEVT_R4K | |
997 | select CSRC_R4K | |
9bc463be DD |
998 | select SYS_SUPPORTS_64BIT_KERNEL |
999 | select SYS_SUPPORTS_32BIT_KERNEL | |
1000 | select SYS_SUPPORTS_BIG_ENDIAN | |
1001 | select SYS_SUPPORTS_SMP | |
1002 | select NR_CPUS_DEFAULT_4 | |
1003 | select SYS_HAS_EARLY_PRINTK | |
1004 | select SYS_HAS_CPU_MIPS32_R2 | |
1005 | select SYS_HAS_CPU_MIPS64_R2 | |
1006 | select SYS_HAS_CPU_CAVIUM_OCTEON | |
eb01d42a | 1007 | select HAVE_PCI |
9bc463be DD |
1008 | select SWAP_IO_SPACE |
1009 | help | |
1010 | This option supports guest running under ???? | |
1011 | ||
5e83d430 | 1012 | endchoice |
1da177e4 | 1013 | |
e8c7c482 | 1014 | source "arch/mips/alchemy/Kconfig" |
3b12308f | 1015 | source "arch/mips/ath25/Kconfig" |
d4a67d9d | 1016 | source "arch/mips/ath79/Kconfig" |
a656ffcb | 1017 | source "arch/mips/bcm47xx/Kconfig" |
e7300d04 | 1018 | source "arch/mips/bcm63xx/Kconfig" |
8945e37e | 1019 | source "arch/mips/bmips/Kconfig" |
eed0eabd | 1020 | source "arch/mips/generic/Kconfig" |
5e83d430 | 1021 | source "arch/mips/jazz/Kconfig" |
5ebabe59 | 1022 | source "arch/mips/jz4740/Kconfig" |
8ec6d935 | 1023 | source "arch/mips/lantiq/Kconfig" |
1f21d2bd | 1024 | source "arch/mips/lasat/Kconfig" |
2572f00d | 1025 | source "arch/mips/pic32/Kconfig" |
af0cfb2c | 1026 | source "arch/mips/pistachio/Kconfig" |
0f3a05cb | 1027 | source "arch/mips/pmcs-msp71xx/Kconfig" |
ae2b5bb6 | 1028 | source "arch/mips/ralink/Kconfig" |
29c48699 | 1029 | source "arch/mips/sgi-ip27/Kconfig" |
38b18f72 | 1030 | source "arch/mips/sibyte/Kconfig" |
22b1d707 | 1031 | source "arch/mips/txx9/Kconfig" |
5e83d430 | 1032 | source "arch/mips/vr41xx/Kconfig" |
a86c7f72 | 1033 | source "arch/mips/cavium-octeon/Kconfig" |
30ad29bb HC |
1034 | source "arch/mips/loongson32/Kconfig" |
1035 | source "arch/mips/loongson64/Kconfig" | |
7f058e85 | 1036 | source "arch/mips/netlogic/Kconfig" |
ae6e7e63 | 1037 | source "arch/mips/paravirt/Kconfig" |
38b18f72 | 1038 | |
5e83d430 RB |
1039 | endmenu |
1040 | ||
3c9ee7ef AM |
1041 | config GENERIC_HWEIGHT |
1042 | bool | |
1043 | default y | |
1044 | ||
1da177e4 LT |
1045 | config GENERIC_CALIBRATE_DELAY |
1046 | bool | |
1047 | default y | |
1048 | ||
ae1e9130 | 1049 | config SCHED_OMIT_FRAME_POINTER |
1cc89038 AN |
1050 | bool |
1051 | default y | |
1052 | ||
1da177e4 LT |
1053 | # |
1054 | # Select some configuration options automatically based on user selections. | |
1055 | # | |
0e2794b0 | 1056 | config FW_ARC |
1da177e4 | 1057 | bool |
1da177e4 | 1058 | |
61ed242d RB |
1059 | config ARCH_MAY_HAVE_PC_FDC |
1060 | bool | |
1061 | ||
9267a30d MSJ |
1062 | config BOOT_RAW |
1063 | bool | |
1064 | ||
217dd11e RB |
1065 | config CEVT_BCM1480 |
1066 | bool | |
1067 | ||
6457d9fc YY |
1068 | config CEVT_DS1287 |
1069 | bool | |
1070 | ||
1097c6ac YY |
1071 | config CEVT_GT641XX |
1072 | bool | |
1073 | ||
42f77542 RB |
1074 | config CEVT_R4K |
1075 | bool | |
1076 | ||
217dd11e RB |
1077 | config CEVT_SB1250 |
1078 | bool | |
1079 | ||
229f773e AN |
1080 | config CEVT_TXX9 |
1081 | bool | |
1082 | ||
217dd11e RB |
1083 | config CSRC_BCM1480 |
1084 | bool | |
1085 | ||
4247417d YY |
1086 | config CSRC_IOASIC |
1087 | bool | |
1088 | ||
940f6b48 RB |
1089 | config CSRC_R4K |
1090 | bool | |
1091 | ||
217dd11e RB |
1092 | config CSRC_SB1250 |
1093 | bool | |
1094 | ||
a7f4df4e AS |
1095 | config MIPS_CLOCK_VSYSCALL |
1096 | def_bool CSRC_R4K || CLKSRC_MIPS_GIC | |
1097 | ||
a9aec7fe | 1098 | config GPIO_TXX9 |
d30a2b47 | 1099 | select GPIOLIB |
a9aec7fe AN |
1100 | bool |
1101 | ||
0e2794b0 | 1102 | config FW_CFE |
df78b5c8 AJ |
1103 | bool |
1104 | ||
40e084a5 RB |
1105 | config ARCH_SUPPORTS_UPROBES |
1106 | bool | |
1107 | ||
885014bc | 1108 | config DMA_MAYBE_COHERENT |
f3ecc0ff | 1109 | select ARCH_HAS_DMA_COHERENCE_H |
885014bc FF |
1110 | select DMA_NONCOHERENT |
1111 | bool | |
1112 | ||
20d33064 PB |
1113 | config DMA_PERDEV_COHERENT |
1114 | bool | |
347cb6af | 1115 | select ARCH_HAS_SETUP_DMA_OPS |
5748e1b3 | 1116 | select DMA_NONCOHERENT |
20d33064 | 1117 | |
4ce588cd RB |
1118 | config DMA_NONCOHERENT |
1119 | bool | |
58b04406 | 1120 | select ARCH_HAS_DMA_MMAP_PGPROT |
f8c55dc6 | 1121 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
e1e02b32 | 1122 | select NEED_DMA_MAP_STATE |
58b04406 | 1123 | select ARCH_HAS_DMA_COHERENT_TO_PFN |
f8c55dc6 | 1124 | select DMA_NONCOHERENT_CACHE_SYNC |
4ce588cd | 1125 | |
36a88530 | 1126 | config SYS_HAS_EARLY_PRINTK |
1da177e4 | 1127 | bool |
1da177e4 | 1128 | |
1b2bc75c | 1129 | config SYS_SUPPORTS_HOTPLUG_CPU |
dbb74540 | 1130 | bool |
dbb74540 | 1131 | |
1da177e4 LT |
1132 | config MIPS_BONITO64 |
1133 | bool | |
1da177e4 LT |
1134 | |
1135 | config MIPS_MSC | |
1136 | bool | |
1da177e4 | 1137 | |
1f21d2bd BM |
1138 | config MIPS_NILE4 |
1139 | bool | |
1140 | ||
39b8d525 RB |
1141 | config SYNC_R4K |
1142 | bool | |
1143 | ||
487d70d0 GJ |
1144 | config MIPS_MACHINE |
1145 | def_bool n | |
1146 | ||
ce816fa8 | 1147 | config NO_IOPORT_MAP |
d388d685 MR |
1148 | def_bool n |
1149 | ||
4e0748f5 MC |
1150 | config GENERIC_CSUM |
1151 | bool | |
932afdee | 1152 | default y if !CPU_HAS_LOAD_STORE_LR |
4e0748f5 | 1153 | |
8313da30 RB |
1154 | config GENERIC_ISA_DMA |
1155 | bool | |
1156 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n | |
a35bee8a | 1157 | select ISA_DMA_API |
8313da30 | 1158 | |
aa414dff RB |
1159 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
1160 | bool | |
8313da30 | 1161 | select GENERIC_ISA_DMA |
aa414dff | 1162 | |
a35bee8a NK |
1163 | config ISA_DMA_API |
1164 | bool | |
1165 | ||
465aaed0 DD |
1166 | config HOLES_IN_ZONE |
1167 | bool | |
1168 | ||
8c530ea3 MR |
1169 | config SYS_SUPPORTS_RELOCATABLE |
1170 | bool | |
1171 | help | |
371a4151 EWI |
1172 | Selected if the platform supports relocating the kernel. |
1173 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF | |
1174 | to allow access to command line and entropy sources. | |
8c530ea3 | 1175 | |
f381bf6d DD |
1176 | config MIPS_CBPF_JIT |
1177 | def_bool y | |
1178 | depends on BPF_JIT && HAVE_CBPF_JIT | |
1179 | ||
1180 | config MIPS_EBPF_JIT | |
1181 | def_bool y | |
1182 | depends on BPF_JIT && HAVE_EBPF_JIT | |
1183 | ||
1184 | ||
5e83d430 | 1185 | # |
6b2aac42 | 1186 | # Endianness selection. Sufficiently obscure so many users don't know what to |
5e83d430 RB |
1187 | # answer,so we try hard to limit the available choices. Also the use of a |
1188 | # choice statement should be more obvious to the user. | |
1189 | # | |
1190 | choice | |
6b2aac42 | 1191 | prompt "Endianness selection" |
1da177e4 LT |
1192 | help |
1193 | Some MIPS machines can be configured for either little or big endian | |
5e83d430 | 1194 | byte order. These modes require different kernels and a different |
3cb2fccc | 1195 | Linux distribution. In general there is one preferred byteorder for a |
5e83d430 | 1196 | particular system but some systems are just as commonly used in the |
3dde6ad8 | 1197 | one or the other endianness. |
5e83d430 RB |
1198 | |
1199 | config CPU_BIG_ENDIAN | |
1200 | bool "Big endian" | |
1201 | depends on SYS_SUPPORTS_BIG_ENDIAN | |
1202 | ||
1203 | config CPU_LITTLE_ENDIAN | |
1204 | bool "Little endian" | |
1205 | depends on SYS_SUPPORTS_LITTLE_ENDIAN | |
5e83d430 RB |
1206 | |
1207 | endchoice | |
1208 | ||
22b0763a DD |
1209 | config EXPORT_UASM |
1210 | bool | |
1211 | ||
2116245e RB |
1212 | config SYS_SUPPORTS_APM_EMULATION |
1213 | bool | |
1214 | ||
5e83d430 RB |
1215 | config SYS_SUPPORTS_BIG_ENDIAN |
1216 | bool | |
1217 | ||
1218 | config SYS_SUPPORTS_LITTLE_ENDIAN | |
1219 | bool | |
1da177e4 | 1220 | |
9cffd154 DD |
1221 | config SYS_SUPPORTS_HUGETLBFS |
1222 | bool | |
1223 | depends on CPU_SUPPORTS_HUGEPAGES && 64BIT | |
1224 | default y | |
1225 | ||
aa1762f4 DD |
1226 | config MIPS_HUGE_TLB_SUPPORT |
1227 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE | |
1228 | ||
1da177e4 LT |
1229 | config IRQ_CPU_RM7K |
1230 | bool | |
1231 | ||
9267a30d MSJ |
1232 | config IRQ_MSP_SLP |
1233 | bool | |
1234 | ||
1235 | config IRQ_MSP_CIC | |
1236 | bool | |
1237 | ||
8420fd00 AN |
1238 | config IRQ_TXX9 |
1239 | bool | |
1240 | ||
d5ab1a69 YY |
1241 | config IRQ_GT641XX |
1242 | bool | |
1243 | ||
252161ec | 1244 | config PCI_GT64XXX_PCI0 |
1da177e4 | 1245 | bool |
1da177e4 | 1246 | |
a57140e9 TB |
1247 | config PCI_XTALK_BRIDGE |
1248 | bool | |
1249 | ||
9267a30d MSJ |
1250 | config NO_EXCEPT_FILL |
1251 | bool | |
1252 | ||
a83860c2 RB |
1253 | config SOC_EMMA2RH |
1254 | bool | |
1255 | select CEVT_R4K | |
1256 | select CSRC_R4K | |
1257 | select DMA_NONCOHERENT | |
67e38cf2 | 1258 | select IRQ_MIPS_CPU |
a83860c2 RB |
1259 | select SWAP_IO_SPACE |
1260 | select SYS_HAS_CPU_R5500 | |
1261 | select SYS_SUPPORTS_32BIT_KERNEL | |
1262 | select SYS_SUPPORTS_64BIT_KERNEL | |
1263 | select SYS_SUPPORTS_BIG_ENDIAN | |
1264 | ||
edb6310a DL |
1265 | config SOC_PNX833X |
1266 | bool | |
1267 | select CEVT_R4K | |
1268 | select CSRC_R4K | |
67e38cf2 | 1269 | select IRQ_MIPS_CPU |
edb6310a DL |
1270 | select DMA_NONCOHERENT |
1271 | select SYS_HAS_CPU_MIPS32_R2 | |
1272 | select SYS_SUPPORTS_32BIT_KERNEL | |
1273 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1274 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 1275 | select SYS_SUPPORTS_MIPS16 |
edb6310a DL |
1276 | select CPU_MIPSR2_IRQ_VI |
1277 | ||
1278 | config SOC_PNX8335 | |
1279 | bool | |
1280 | select SOC_PNX833X | |
1281 | ||
a7e07b1a MC |
1282 | config MIPS_SPRAM |
1283 | bool | |
1284 | ||
1da177e4 LT |
1285 | config SWAP_IO_SPACE |
1286 | bool | |
1287 | ||
e2defae5 TB |
1288 | config SGI_HAS_INDYDOG |
1289 | bool | |
1290 | ||
5b438c44 TB |
1291 | config SGI_HAS_HAL2 |
1292 | bool | |
1293 | ||
e2defae5 TB |
1294 | config SGI_HAS_SEEQ |
1295 | bool | |
1296 | ||
1297 | config SGI_HAS_WD93 | |
1298 | bool | |
1299 | ||
1300 | config SGI_HAS_ZILOG | |
1301 | bool | |
1302 | ||
1303 | config SGI_HAS_I8042 | |
1304 | bool | |
1305 | ||
1306 | config DEFAULT_SGI_PARTITION | |
1307 | bool | |
1308 | ||
0e2794b0 | 1309 | config FW_ARC32 |
5e83d430 RB |
1310 | bool |
1311 | ||
aaa9fad3 | 1312 | config FW_SNIPROM |
231a35d3 TB |
1313 | bool |
1314 | ||
1da177e4 LT |
1315 | config BOOT_ELF32 |
1316 | bool | |
1da177e4 | 1317 | |
930beb5a FF |
1318 | config MIPS_L1_CACHE_SHIFT_4 |
1319 | bool | |
1320 | ||
1321 | config MIPS_L1_CACHE_SHIFT_5 | |
1322 | bool | |
1323 | ||
1324 | config MIPS_L1_CACHE_SHIFT_6 | |
1325 | bool | |
1326 | ||
1327 | config MIPS_L1_CACHE_SHIFT_7 | |
1328 | bool | |
1329 | ||
1da177e4 LT |
1330 | config MIPS_L1_CACHE_SHIFT |
1331 | int | |
a4c0201e | 1332 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
5432eeb6 KC |
1333 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
1334 | default "5" if MIPS_L1_CACHE_SHIFT_5 | |
1335 | default "4" if MIPS_L1_CACHE_SHIFT_4 | |
1da177e4 LT |
1336 | default "5" |
1337 | ||
1da177e4 LT |
1338 | config HAVE_STD_PC_SERIAL_PORT |
1339 | bool | |
1340 | ||
1da177e4 LT |
1341 | config ARC_CONSOLE |
1342 | bool "ARC console support" | |
e2defae5 | 1343 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
1da177e4 LT |
1344 | |
1345 | config ARC_MEMORY | |
1346 | bool | |
14b36af4 | 1347 | depends on MACH_JAZZ || SNI_RM || SGI_IP32 |
1da177e4 LT |
1348 | default y |
1349 | ||
1350 | config ARC_PROMLIB | |
1351 | bool | |
e2defae5 | 1352 | depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 |
1da177e4 LT |
1353 | default y |
1354 | ||
0e2794b0 | 1355 | config FW_ARC64 |
1da177e4 | 1356 | bool |
1da177e4 LT |
1357 | |
1358 | config BOOT_ELF64 | |
1359 | bool | |
1da177e4 | 1360 | |
1da177e4 LT |
1361 | menu "CPU selection" |
1362 | ||
1363 | choice | |
1364 | prompt "CPU type" | |
1365 | default CPU_R4X00 | |
1366 | ||
0e476d91 HC |
1367 | config CPU_LOONGSON3 |
1368 | bool "Loongson 3 CPU" | |
1369 | depends on SYS_HAS_CPU_LOONGSON3 | |
d3bc81be | 1370 | select ARCH_HAS_PHYS_TO_DMA |
0e476d91 HC |
1371 | select CPU_SUPPORTS_64BIT_KERNEL |
1372 | select CPU_SUPPORTS_HIGHMEM | |
1373 | select CPU_SUPPORTS_HUGEPAGES | |
932afdee | 1374 | select CPU_HAS_LOAD_STORE_LR |
0e476d91 HC |
1375 | select WEAK_ORDERING |
1376 | select WEAK_REORDERING_BEYOND_LLSC | |
b2edcfc8 | 1377 | select MIPS_PGD_C0_CONTEXT |
17c99d94 | 1378 | select MIPS_L1_CACHE_SHIFT_6 |
d30a2b47 | 1379 | select GPIOLIB |
09230cbc | 1380 | select SWIOTLB |
0e476d91 HC |
1381 | help |
1382 | The Loongson 3 processor implements the MIPS64R2 instruction | |
1383 | set with many extensions. | |
1384 | ||
1e820da3 HC |
1385 | config LOONGSON3_ENHANCEMENT |
1386 | bool "New Loongson 3 CPU Enhancements" | |
1387 | default n | |
1388 | select CPU_MIPSR2 | |
1389 | select CPU_HAS_PREFETCH | |
1390 | depends on CPU_LOONGSON3 | |
1391 | help | |
1392 | New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A | |
1393 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as | |
1394 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User | |
1395 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), | |
1396 | Fast TLB refill support, etc. | |
1397 | ||
1398 | This option enable those enhancements which are not probed at run | |
1399 | time. If you want a generic kernel to run on all Loongson 3 machines, | |
1400 | please say 'N' here. If you want a high-performance kernel to run on | |
1401 | new Loongson 3 machines only, please say 'Y' here. | |
1402 | ||
e02e07e3 HC |
1403 | config CPU_LOONGSON3_WORKAROUNDS |
1404 | bool "Old Loongson 3 LLSC Workarounds" | |
1405 | default y if SMP | |
1406 | depends on CPU_LOONGSON3 | |
1407 | help | |
1408 | Loongson 3 processors have the llsc issues which require workarounds. | |
1409 | Without workarounds the system may hang unexpectedly. | |
1410 | ||
1411 | Newer Loongson 3 will fix these issues and no workarounds are needed. | |
1412 | The workarounds have no significant side effect on them but may | |
1413 | decrease the performance of the system so this option should be | |
1414 | disabled unless the kernel is intended to be run on old systems. | |
1415 | ||
1416 | If unsure, please say Y. | |
1417 | ||
3702bba5 WZ |
1418 | config CPU_LOONGSON2E |
1419 | bool "Loongson 2E" | |
1420 | depends on SYS_HAS_CPU_LOONGSON2E | |
1421 | select CPU_LOONGSON2 | |
2a21c730 FZ |
1422 | help |
1423 | The Loongson 2E processor implements the MIPS III instruction set | |
1424 | with many extensions. | |
1425 | ||
25985edc | 1426 | It has an internal FPGA northbridge, which is compatible to |
6f7a251a WZ |
1427 | bonito64. |
1428 | ||
1429 | config CPU_LOONGSON2F | |
1430 | bool "Loongson 2F" | |
1431 | depends on SYS_HAS_CPU_LOONGSON2F | |
1432 | select CPU_LOONGSON2 | |
d30a2b47 | 1433 | select GPIOLIB |
6f7a251a WZ |
1434 | help |
1435 | The Loongson 2F processor implements the MIPS III instruction set | |
1436 | with many extensions. | |
1437 | ||
1438 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | |
1439 | have a similar programming interface with FPGA northbridge used in | |
1440 | Loongson2E. | |
1441 | ||
ca585cf9 KC |
1442 | config CPU_LOONGSON1B |
1443 | bool "Loongson 1B" | |
1444 | depends on SYS_HAS_CPU_LOONGSON1B | |
1445 | select CPU_LOONGSON1 | |
9ec88b60 | 1446 | select LEDS_GPIO_REGISTER |
ca585cf9 KC |
1447 | help |
1448 | The Loongson 1B is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1449 | Release 1 instruction set and part of the MIPS32 Release 2 |
1450 | instruction set. | |
ca585cf9 | 1451 | |
12e3280b YL |
1452 | config CPU_LOONGSON1C |
1453 | bool "Loongson 1C" | |
1454 | depends on SYS_HAS_CPU_LOONGSON1C | |
1455 | select CPU_LOONGSON1 | |
12e3280b YL |
1456 | select LEDS_GPIO_REGISTER |
1457 | help | |
1458 | The Loongson 1C is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1459 | Release 1 instruction set and part of the MIPS32 Release 2 |
1460 | instruction set. | |
12e3280b | 1461 | |
6e760c8d RB |
1462 | config CPU_MIPS32_R1 |
1463 | bool "MIPS32 Release 1" | |
7cf8053b | 1464 | depends on SYS_HAS_CPU_MIPS32_R1 |
6e760c8d | 1465 | select CPU_HAS_PREFETCH |
932afdee | 1466 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1467 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1468 | select CPU_SUPPORTS_HIGHMEM |
1e5f1caa | 1469 | help |
5e83d430 | 1470 | Choose this option to build a kernel for release 1 or later of the |
1e5f1caa RB |
1471 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1472 | MIPS processor are based on a MIPS32 processor. If you know the | |
1473 | specific type of processor in your system, choose those that one | |
1474 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1475 | Release 2 of the MIPS32 architecture is available since several | |
1476 | years so chances are you even have a MIPS32 Release 2 processor | |
1477 | in which case you should choose CPU_MIPS32_R2 instead for better | |
1478 | performance. | |
1479 | ||
1480 | config CPU_MIPS32_R2 | |
1481 | bool "MIPS32 Release 2" | |
7cf8053b | 1482 | depends on SYS_HAS_CPU_MIPS32_R2 |
1e5f1caa | 1483 | select CPU_HAS_PREFETCH |
932afdee | 1484 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1485 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1486 | select CPU_SUPPORTS_HIGHMEM |
a5e9a69e | 1487 | select CPU_SUPPORTS_MSA |
2235a54d | 1488 | select HAVE_KVM |
6e760c8d | 1489 | help |
5e83d430 | 1490 | Choose this option to build a kernel for release 2 or later of the |
6e760c8d RB |
1491 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1492 | MIPS processor are based on a MIPS32 processor. If you know the | |
1493 | specific type of processor in your system, choose those that one | |
1494 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1495 | ||
7fd08ca5 | 1496 | config CPU_MIPS32_R6 |
674d10e2 | 1497 | bool "MIPS32 Release 6" |
7fd08ca5 LY |
1498 | depends on SYS_HAS_CPU_MIPS32_R6 |
1499 | select CPU_HAS_PREFETCH | |
1500 | select CPU_SUPPORTS_32BIT_KERNEL | |
1501 | select CPU_SUPPORTS_HIGHMEM | |
1502 | select CPU_SUPPORTS_MSA | |
1503 | select HAVE_KVM | |
1504 | select MIPS_O32_FP64_SUPPORT | |
1505 | help | |
1506 | Choose this option to build a kernel for release 6 or later of the | |
1507 | MIPS32 architecture. New MIPS processors, starting with the Warrior | |
1508 | family, are based on a MIPS32r6 processor. If you own an older | |
1509 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. | |
1510 | ||
6e760c8d RB |
1511 | config CPU_MIPS64_R1 |
1512 | bool "MIPS64 Release 1" | |
7cf8053b | 1513 | depends on SYS_HAS_CPU_MIPS64_R1 |
797798c1 | 1514 | select CPU_HAS_PREFETCH |
932afdee | 1515 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1516 | select CPU_SUPPORTS_32BIT_KERNEL |
1517 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1518 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1519 | select CPU_SUPPORTS_HUGEPAGES |
6e760c8d RB |
1520 | help |
1521 | Choose this option to build a kernel for release 1 or later of the | |
1522 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1523 | MIPS processor are based on a MIPS64 processor. If you know the | |
1524 | specific type of processor in your system, choose those that one | |
1525 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1e5f1caa RB |
1526 | Release 2 of the MIPS64 architecture is available since several |
1527 | years so chances are you even have a MIPS64 Release 2 processor | |
1528 | in which case you should choose CPU_MIPS64_R2 instead for better | |
1529 | performance. | |
1530 | ||
1531 | config CPU_MIPS64_R2 | |
1532 | bool "MIPS64 Release 2" | |
7cf8053b | 1533 | depends on SYS_HAS_CPU_MIPS64_R2 |
797798c1 | 1534 | select CPU_HAS_PREFETCH |
932afdee | 1535 | select CPU_HAS_LOAD_STORE_LR |
1e5f1caa RB |
1536 | select CPU_SUPPORTS_32BIT_KERNEL |
1537 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1538 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1539 | select CPU_SUPPORTS_HUGEPAGES |
a5e9a69e | 1540 | select CPU_SUPPORTS_MSA |
40a2df49 | 1541 | select HAVE_KVM |
1e5f1caa RB |
1542 | help |
1543 | Choose this option to build a kernel for release 2 or later of the | |
1544 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1545 | MIPS processor are based on a MIPS64 processor. If you know the | |
1546 | specific type of processor in your system, choose those that one | |
1547 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1da177e4 | 1548 | |
7fd08ca5 | 1549 | config CPU_MIPS64_R6 |
674d10e2 | 1550 | bool "MIPS64 Release 6" |
7fd08ca5 LY |
1551 | depends on SYS_HAS_CPU_MIPS64_R6 |
1552 | select CPU_HAS_PREFETCH | |
1553 | select CPU_SUPPORTS_32BIT_KERNEL | |
1554 | select CPU_SUPPORTS_64BIT_KERNEL | |
1555 | select CPU_SUPPORTS_HIGHMEM | |
afd375dc | 1556 | select CPU_SUPPORTS_HUGEPAGES |
7fd08ca5 | 1557 | select CPU_SUPPORTS_MSA |
2e6c7747 | 1558 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
40a2df49 | 1559 | select HAVE_KVM |
7fd08ca5 LY |
1560 | help |
1561 | Choose this option to build a kernel for release 6 or later of the | |
1562 | MIPS64 architecture. New MIPS processors, starting with the Warrior | |
1563 | family, are based on a MIPS64r6 processor. If you own an older | |
1564 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. | |
1565 | ||
1da177e4 LT |
1566 | config CPU_R3000 |
1567 | bool "R3000" | |
7cf8053b | 1568 | depends on SYS_HAS_CPU_R3000 |
f7062ddb | 1569 | select CPU_HAS_WB |
932afdee | 1570 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb | 1571 | select CPU_SUPPORTS_32BIT_KERNEL |
797798c1 | 1572 | select CPU_SUPPORTS_HIGHMEM |
1da177e4 LT |
1573 | help |
1574 | Please make sure to pick the right CPU type. Linux/MIPS is not | |
1575 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will | |
1576 | *not* work on R4000 machines and vice versa. However, since most | |
1577 | of the supported machines have an R4000 (or similar) CPU, R4x00 | |
1578 | might be a safe bet. If the resulting kernel does not work, | |
1579 | try to recompile with R3000. | |
1580 | ||
1581 | config CPU_TX39XX | |
1582 | bool "R39XX" | |
7cf8053b | 1583 | depends on SYS_HAS_CPU_TX39XX |
ed5ba2fb | 1584 | select CPU_SUPPORTS_32BIT_KERNEL |
932afdee | 1585 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1586 | |
1587 | config CPU_VR41XX | |
1588 | bool "R41xx" | |
7cf8053b | 1589 | depends on SYS_HAS_CPU_VR41XX |
ed5ba2fb YY |
1590 | select CPU_SUPPORTS_32BIT_KERNEL |
1591 | select CPU_SUPPORTS_64BIT_KERNEL | |
932afdee | 1592 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 | 1593 | help |
5e83d430 | 1594 | The options selects support for the NEC VR4100 series of processors. |
1da177e4 LT |
1595 | Only choose this option if you have one of these processors as a |
1596 | kernel built with this option will not run on any other type of | |
1597 | processor or vice versa. | |
1598 | ||
1599 | config CPU_R4300 | |
1600 | bool "R4300" | |
7cf8053b | 1601 | depends on SYS_HAS_CPU_R4300 |
ed5ba2fb YY |
1602 | select CPU_SUPPORTS_32BIT_KERNEL |
1603 | select CPU_SUPPORTS_64BIT_KERNEL | |
932afdee | 1604 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1605 | help |
1606 | MIPS Technologies R4300-series processors. | |
1607 | ||
1608 | config CPU_R4X00 | |
1609 | bool "R4x00" | |
7cf8053b | 1610 | depends on SYS_HAS_CPU_R4X00 |
ed5ba2fb YY |
1611 | select CPU_SUPPORTS_32BIT_KERNEL |
1612 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1613 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1614 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1615 | help |
1616 | MIPS Technologies R4000-series processors other than 4300, including | |
1617 | the R4000, R4400, R4600, and 4700. | |
1618 | ||
1619 | config CPU_TX49XX | |
1620 | bool "R49XX" | |
7cf8053b | 1621 | depends on SYS_HAS_CPU_TX49XX |
de862b48 | 1622 | select CPU_HAS_PREFETCH |
932afdee | 1623 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1624 | select CPU_SUPPORTS_32BIT_KERNEL |
1625 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1626 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1627 | |
1628 | config CPU_R5000 | |
1629 | bool "R5000" | |
7cf8053b | 1630 | depends on SYS_HAS_CPU_R5000 |
ed5ba2fb YY |
1631 | select CPU_SUPPORTS_32BIT_KERNEL |
1632 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1633 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1634 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1635 | help |
1636 | MIPS Technologies R5000-series processors other than the Nevada. | |
1637 | ||
1638 | config CPU_R5432 | |
1639 | bool "R5432" | |
7cf8053b | 1640 | depends on SYS_HAS_CPU_R5432 |
5e83d430 RB |
1641 | select CPU_SUPPORTS_32BIT_KERNEL |
1642 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1643 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1644 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 | 1645 | |
542c1020 SK |
1646 | config CPU_R5500 |
1647 | bool "R5500" | |
1648 | depends on SYS_HAS_CPU_R5500 | |
542c1020 SK |
1649 | select CPU_SUPPORTS_32BIT_KERNEL |
1650 | select CPU_SUPPORTS_64BIT_KERNEL | |
9cffd154 | 1651 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1652 | select CPU_HAS_LOAD_STORE_LR |
542c1020 SK |
1653 | help |
1654 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV | |
1655 | instruction set. | |
1656 | ||
1da177e4 LT |
1657 | config CPU_NEVADA |
1658 | bool "RM52xx" | |
7cf8053b | 1659 | depends on SYS_HAS_CPU_NEVADA |
ed5ba2fb YY |
1660 | select CPU_SUPPORTS_32BIT_KERNEL |
1661 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1662 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1663 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1664 | help |
1665 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. | |
1666 | ||
1667 | config CPU_R8000 | |
1668 | bool "R8000" | |
7cf8053b | 1669 | depends on SYS_HAS_CPU_R8000 |
5e83d430 | 1670 | select CPU_HAS_PREFETCH |
932afdee | 1671 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb | 1672 | select CPU_SUPPORTS_64BIT_KERNEL |
1da177e4 LT |
1673 | help |
1674 | MIPS Technologies R8000 processors. Note these processors are | |
1675 | uncommon and the support for them is incomplete. | |
1676 | ||
1677 | config CPU_R10000 | |
1678 | bool "R10000" | |
7cf8053b | 1679 | depends on SYS_HAS_CPU_R10000 |
5e83d430 | 1680 | select CPU_HAS_PREFETCH |
932afdee | 1681 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1682 | select CPU_SUPPORTS_32BIT_KERNEL |
1683 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1684 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1685 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1686 | help |
1687 | MIPS Technologies R10000-series processors. | |
1688 | ||
1689 | config CPU_RM7000 | |
1690 | bool "RM7000" | |
7cf8053b | 1691 | depends on SYS_HAS_CPU_RM7000 |
5e83d430 | 1692 | select CPU_HAS_PREFETCH |
932afdee | 1693 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1694 | select CPU_SUPPORTS_32BIT_KERNEL |
1695 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1696 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1697 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1698 | |
1699 | config CPU_SB1 | |
1700 | bool "SB1" | |
7cf8053b | 1701 | depends on SYS_HAS_CPU_SB1 |
932afdee | 1702 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1703 | select CPU_SUPPORTS_32BIT_KERNEL |
1704 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1705 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1706 | select CPU_SUPPORTS_HUGEPAGES |
0004a9df | 1707 | select WEAK_ORDERING |
1da177e4 | 1708 | |
a86c7f72 DD |
1709 | config CPU_CAVIUM_OCTEON |
1710 | bool "Cavium Octeon processor" | |
5e683389 | 1711 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
a86c7f72 | 1712 | select CPU_HAS_PREFETCH |
932afdee | 1713 | select CPU_HAS_LOAD_STORE_LR |
a86c7f72 | 1714 | select CPU_SUPPORTS_64BIT_KERNEL |
a86c7f72 | 1715 | select WEAK_ORDERING |
a86c7f72 | 1716 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1717 | select CPU_SUPPORTS_HUGEPAGES |
df115f3e BH |
1718 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
1719 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
930beb5a | 1720 | select MIPS_L1_CACHE_SHIFT_7 |
0ae3abcd | 1721 | select HAVE_KVM |
a86c7f72 DD |
1722 | help |
1723 | The Cavium Octeon processor is a highly integrated chip containing | |
1724 | many ethernet hardware widgets for networking tasks. The processor | |
1725 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. | |
1726 | Full details can be found at http://www.caviumnetworks.com. | |
1727 | ||
cd746249 JG |
1728 | config CPU_BMIPS |
1729 | bool "Broadcom BMIPS" | |
1730 | depends on SYS_HAS_CPU_BMIPS | |
1731 | select CPU_MIPS32 | |
fe7f62c0 | 1732 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
cd746249 JG |
1733 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
1734 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 | |
1735 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 | |
1736 | select CPU_SUPPORTS_32BIT_KERNEL | |
1737 | select DMA_NONCOHERENT | |
67e38cf2 | 1738 | select IRQ_MIPS_CPU |
cd746249 JG |
1739 | select SWAP_IO_SPACE |
1740 | select WEAK_ORDERING | |
c1c0c461 | 1741 | select CPU_SUPPORTS_HIGHMEM |
69aaf9c8 | 1742 | select CPU_HAS_PREFETCH |
932afdee | 1743 | select CPU_HAS_LOAD_STORE_LR |
a8d709b0 MM |
1744 | select CPU_SUPPORTS_CPUFREQ |
1745 | select MIPS_EXTERNAL_TIMER | |
c1c0c461 | 1746 | help |
fe7f62c0 | 1747 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
c1c0c461 | 1748 | |
7f058e85 J |
1749 | config CPU_XLR |
1750 | bool "Netlogic XLR SoC" | |
1751 | depends on SYS_HAS_CPU_XLR | |
932afdee | 1752 | select CPU_HAS_LOAD_STORE_LR |
7f058e85 J |
1753 | select CPU_SUPPORTS_32BIT_KERNEL |
1754 | select CPU_SUPPORTS_64BIT_KERNEL | |
1755 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1756 | select CPU_SUPPORTS_HUGEPAGES |
7f058e85 J |
1757 | select WEAK_ORDERING |
1758 | select WEAK_REORDERING_BEYOND_LLSC | |
7f058e85 J |
1759 | help |
1760 | Netlogic Microsystems XLR/XLS processors. | |
1c773ea4 J |
1761 | |
1762 | config CPU_XLP | |
1763 | bool "Netlogic XLP SoC" | |
1764 | depends on SYS_HAS_CPU_XLP | |
1765 | select CPU_SUPPORTS_32BIT_KERNEL | |
1766 | select CPU_SUPPORTS_64BIT_KERNEL | |
1767 | select CPU_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1768 | select WEAK_ORDERING |
1769 | select WEAK_REORDERING_BEYOND_LLSC | |
1770 | select CPU_HAS_PREFETCH | |
932afdee | 1771 | select CPU_HAS_LOAD_STORE_LR |
d6504846 | 1772 | select CPU_MIPSR2 |
ddba6833 | 1773 | select CPU_SUPPORTS_HUGEPAGES |
2db003a5 | 1774 | select MIPS_ASID_BITS_VARIABLE |
1c773ea4 J |
1775 | help |
1776 | Netlogic Microsystems XLP processors. | |
1da177e4 LT |
1777 | endchoice |
1778 | ||
a6e18781 LY |
1779 | config CPU_MIPS32_3_5_FEATURES |
1780 | bool "MIPS32 Release 3.5 Features" | |
1781 | depends on SYS_HAS_CPU_MIPS32_R3_5 | |
7fd08ca5 | 1782 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 |
a6e18781 LY |
1783 | help |
1784 | Choose this option to build a kernel for release 2 or later of the | |
1785 | MIPS32 architecture including features from the 3.5 release such as | |
1786 | support for Enhanced Virtual Addressing (EVA). | |
1787 | ||
1788 | config CPU_MIPS32_3_5_EVA | |
1789 | bool "Enhanced Virtual Addressing (EVA)" | |
1790 | depends on CPU_MIPS32_3_5_FEATURES | |
1791 | select EVA | |
1792 | default y | |
1793 | help | |
1794 | Choose this option if you want to enable the Enhanced Virtual | |
1795 | Addressing (EVA) on your MIPS32 core (such as proAptiv). | |
1796 | One of its primary benefits is an increase in the maximum size | |
1797 | of lowmem (up to 3GB). If unsure, say 'N' here. | |
1798 | ||
c5b36783 SH |
1799 | config CPU_MIPS32_R5_FEATURES |
1800 | bool "MIPS32 Release 5 Features" | |
1801 | depends on SYS_HAS_CPU_MIPS32_R5 | |
1802 | depends on CPU_MIPS32_R2 | |
1803 | help | |
1804 | Choose this option to build a kernel for release 2 or later of the | |
1805 | MIPS32 architecture including features from release 5 such as | |
1806 | support for Extended Physical Addressing (XPA). | |
1807 | ||
1808 | config CPU_MIPS32_R5_XPA | |
1809 | bool "Extended Physical Addressing (XPA)" | |
1810 | depends on CPU_MIPS32_R5_FEATURES | |
1811 | depends on !EVA | |
1812 | depends on !PAGE_SIZE_4KB | |
1813 | depends on SYS_SUPPORTS_HIGHMEM | |
1814 | select XPA | |
1815 | select HIGHMEM | |
d4a451d5 | 1816 | select PHYS_ADDR_T_64BIT |
c5b36783 SH |
1817 | default n |
1818 | help | |
1819 | Choose this option if you want to enable the Extended Physical | |
1820 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The | |
1821 | benefit is to increase physical addressing equal to or greater | |
1822 | than 40 bits. Note that this has the side effect of turning on | |
1823 | 64-bit addressing which in turn makes the PTEs 64-bit in size. | |
1824 | If unsure, say 'N' here. | |
1825 | ||
622844bf WZ |
1826 | if CPU_LOONGSON2F |
1827 | config CPU_NOP_WORKAROUNDS | |
1828 | bool | |
1829 | ||
1830 | config CPU_JUMP_WORKAROUNDS | |
1831 | bool | |
1832 | ||
1833 | config CPU_LOONGSON2F_WORKAROUNDS | |
1834 | bool "Loongson 2F Workarounds" | |
1835 | default y | |
1836 | select CPU_NOP_WORKAROUNDS | |
1837 | select CPU_JUMP_WORKAROUNDS | |
1838 | help | |
1839 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which | |
1840 | require workarounds. Without workarounds the system may hang | |
1841 | unexpectedly. For more information please refer to the gas | |
1842 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. | |
1843 | ||
1844 | Loongson 2F03 and later have fixed these issues and no workarounds | |
1845 | are needed. The workarounds have no significant side effect on them | |
1846 | but may decrease the performance of the system so this option should | |
1847 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 | |
1848 | systems. | |
1849 | ||
1850 | If unsure, please say Y. | |
1851 | endif # CPU_LOONGSON2F | |
1852 | ||
1b93b3c3 WZ |
1853 | config SYS_SUPPORTS_ZBOOT |
1854 | bool | |
1855 | select HAVE_KERNEL_GZIP | |
1856 | select HAVE_KERNEL_BZIP2 | |
31c4867d | 1857 | select HAVE_KERNEL_LZ4 |
1b93b3c3 | 1858 | select HAVE_KERNEL_LZMA |
fe1d45e0 | 1859 | select HAVE_KERNEL_LZO |
4e23eb63 | 1860 | select HAVE_KERNEL_XZ |
1b93b3c3 WZ |
1861 | |
1862 | config SYS_SUPPORTS_ZBOOT_UART16550 | |
1863 | bool | |
1864 | select SYS_SUPPORTS_ZBOOT | |
1865 | ||
dbb98314 AB |
1866 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
1867 | bool | |
1868 | select SYS_SUPPORTS_ZBOOT | |
1869 | ||
3702bba5 WZ |
1870 | config CPU_LOONGSON2 |
1871 | bool | |
1872 | select CPU_SUPPORTS_32BIT_KERNEL | |
1873 | select CPU_SUPPORTS_64BIT_KERNEL | |
1874 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1875 | select CPU_SUPPORTS_HUGEPAGES |
e905086e | 1876 | select ARCH_HAS_PHYS_TO_DMA |
932afdee | 1877 | select CPU_HAS_LOAD_STORE_LR |
3702bba5 | 1878 | |
ca585cf9 KC |
1879 | config CPU_LOONGSON1 |
1880 | bool | |
1881 | select CPU_MIPS32 | |
7e280f6b | 1882 | select CPU_MIPSR2 |
ca585cf9 | 1883 | select CPU_HAS_PREFETCH |
932afdee | 1884 | select CPU_HAS_LOAD_STORE_LR |
ca585cf9 KC |
1885 | select CPU_SUPPORTS_32BIT_KERNEL |
1886 | select CPU_SUPPORTS_HIGHMEM | |
f29ad10d | 1887 | select CPU_SUPPORTS_CPUFREQ |
ca585cf9 | 1888 | |
fe7f62c0 | 1889 | config CPU_BMIPS32_3300 |
04fa8bf7 | 1890 | select SMP_UP if SMP |
1bbb6c1b | 1891 | bool |
cd746249 JG |
1892 | |
1893 | config CPU_BMIPS4350 | |
1894 | bool | |
1895 | select SYS_SUPPORTS_SMP | |
1896 | select SYS_SUPPORTS_HOTPLUG_CPU | |
1897 | ||
1898 | config CPU_BMIPS4380 | |
1899 | bool | |
bbf2ba67 | 1900 | select MIPS_L1_CACHE_SHIFT_6 |
cd746249 JG |
1901 | select SYS_SUPPORTS_SMP |
1902 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1903 | select CPU_HAS_RIXI |
cd746249 JG |
1904 | |
1905 | config CPU_BMIPS5000 | |
1906 | bool | |
cd746249 | 1907 | select MIPS_CPU_SCACHE |
bbf2ba67 | 1908 | select MIPS_L1_CACHE_SHIFT_7 |
cd746249 JG |
1909 | select SYS_SUPPORTS_SMP |
1910 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1911 | select CPU_HAS_RIXI |
1bbb6c1b | 1912 | |
0e476d91 HC |
1913 | config SYS_HAS_CPU_LOONGSON3 |
1914 | bool | |
1915 | select CPU_SUPPORTS_CPUFREQ | |
b2edcfc8 | 1916 | select CPU_HAS_RIXI |
0e476d91 | 1917 | |
3702bba5 | 1918 | config SYS_HAS_CPU_LOONGSON2E |
2a21c730 FZ |
1919 | bool |
1920 | ||
6f7a251a WZ |
1921 | config SYS_HAS_CPU_LOONGSON2F |
1922 | bool | |
55045ff5 WZ |
1923 | select CPU_SUPPORTS_CPUFREQ |
1924 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT | |
22f1fdfd | 1925 | select CPU_SUPPORTS_UNCACHED_ACCELERATED |
6f7a251a | 1926 | |
ca585cf9 KC |
1927 | config SYS_HAS_CPU_LOONGSON1B |
1928 | bool | |
1929 | ||
12e3280b YL |
1930 | config SYS_HAS_CPU_LOONGSON1C |
1931 | bool | |
1932 | ||
7cf8053b RB |
1933 | config SYS_HAS_CPU_MIPS32_R1 |
1934 | bool | |
1935 | ||
1936 | config SYS_HAS_CPU_MIPS32_R2 | |
1937 | bool | |
1938 | ||
a6e18781 LY |
1939 | config SYS_HAS_CPU_MIPS32_R3_5 |
1940 | bool | |
1941 | ||
c5b36783 SH |
1942 | config SYS_HAS_CPU_MIPS32_R5 |
1943 | bool | |
9ae1f262 | 1944 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
c5b36783 | 1945 | |
7fd08ca5 LY |
1946 | config SYS_HAS_CPU_MIPS32_R6 |
1947 | bool | |
9ae1f262 | 1948 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 1949 | |
7cf8053b RB |
1950 | config SYS_HAS_CPU_MIPS64_R1 |
1951 | bool | |
1952 | ||
1953 | config SYS_HAS_CPU_MIPS64_R2 | |
1954 | bool | |
1955 | ||
7fd08ca5 LY |
1956 | config SYS_HAS_CPU_MIPS64_R6 |
1957 | bool | |
9ae1f262 | 1958 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 1959 | |
7cf8053b RB |
1960 | config SYS_HAS_CPU_R3000 |
1961 | bool | |
1962 | ||
1963 | config SYS_HAS_CPU_TX39XX | |
1964 | bool | |
1965 | ||
1966 | config SYS_HAS_CPU_VR41XX | |
1967 | bool | |
1968 | ||
1969 | config SYS_HAS_CPU_R4300 | |
1970 | bool | |
1971 | ||
1972 | config SYS_HAS_CPU_R4X00 | |
1973 | bool | |
1974 | ||
1975 | config SYS_HAS_CPU_TX49XX | |
1976 | bool | |
1977 | ||
1978 | config SYS_HAS_CPU_R5000 | |
1979 | bool | |
1980 | ||
1981 | config SYS_HAS_CPU_R5432 | |
1982 | bool | |
1983 | ||
542c1020 SK |
1984 | config SYS_HAS_CPU_R5500 |
1985 | bool | |
1986 | ||
7cf8053b RB |
1987 | config SYS_HAS_CPU_NEVADA |
1988 | bool | |
1989 | ||
1990 | config SYS_HAS_CPU_R8000 | |
1991 | bool | |
1992 | ||
1993 | config SYS_HAS_CPU_R10000 | |
1994 | bool | |
9ae1f262 | 1995 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7cf8053b RB |
1996 | |
1997 | config SYS_HAS_CPU_RM7000 | |
1998 | bool | |
1999 | ||
7cf8053b RB |
2000 | config SYS_HAS_CPU_SB1 |
2001 | bool | |
2002 | ||
5e683389 DD |
2003 | config SYS_HAS_CPU_CAVIUM_OCTEON |
2004 | bool | |
2005 | ||
cd746249 | 2006 | config SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2007 | bool |
2008 | ||
fe7f62c0 | 2009 | config SYS_HAS_CPU_BMIPS32_3300 |
c1c0c461 | 2010 | bool |
cd746249 | 2011 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2012 | |
2013 | config SYS_HAS_CPU_BMIPS4350 | |
2014 | bool | |
cd746249 | 2015 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2016 | |
2017 | config SYS_HAS_CPU_BMIPS4380 | |
2018 | bool | |
cd746249 | 2019 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2020 | |
2021 | config SYS_HAS_CPU_BMIPS5000 | |
2022 | bool | |
cd746249 | 2023 | select SYS_HAS_CPU_BMIPS |
f263f2a2 | 2024 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
c1c0c461 | 2025 | |
7f058e85 J |
2026 | config SYS_HAS_CPU_XLR |
2027 | bool | |
2028 | ||
1c773ea4 J |
2029 | config SYS_HAS_CPU_XLP |
2030 | bool | |
2031 | ||
17099b11 RB |
2032 | # |
2033 | # CPU may reorder R->R, R->W, W->R, W->W | |
2034 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC | |
2035 | # | |
0004a9df RB |
2036 | config WEAK_ORDERING |
2037 | bool | |
17099b11 RB |
2038 | |
2039 | # | |
2040 | # CPU may reorder reads and writes beyond LL/SC | |
2041 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC | |
2042 | # | |
2043 | config WEAK_REORDERING_BEYOND_LLSC | |
2044 | bool | |
5e83d430 RB |
2045 | endmenu |
2046 | ||
2047 | # | |
c09b47d8 | 2048 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
5e83d430 RB |
2049 | # |
2050 | config CPU_MIPS32 | |
2051 | bool | |
7fd08ca5 | 2052 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 |
5e83d430 RB |
2053 | |
2054 | config CPU_MIPS64 | |
2055 | bool | |
7fd08ca5 | 2056 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 |
5e83d430 RB |
2057 | |
2058 | # | |
57eeaced | 2059 | # These indicate the revision of the architecture |
5e83d430 RB |
2060 | # |
2061 | config CPU_MIPSR1 | |
2062 | bool | |
2063 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 | |
2064 | ||
2065 | config CPU_MIPSR2 | |
2066 | bool | |
a86c7f72 | 2067 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
8256b17e | 2068 | select CPU_HAS_RIXI |
a7e07b1a | 2069 | select MIPS_SPRAM |
5e83d430 | 2070 | |
7fd08ca5 LY |
2071 | config CPU_MIPSR6 |
2072 | bool | |
2073 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 | |
8256b17e | 2074 | select CPU_HAS_RIXI |
87321fdd | 2075 | select HAVE_ARCH_BITREVERSE |
2db003a5 | 2076 | select MIPS_ASID_BITS_VARIABLE |
4a5dc51e | 2077 | select MIPS_CRC_SUPPORT |
a7e07b1a | 2078 | select MIPS_SPRAM |
5e83d430 | 2079 | |
57eeaced PB |
2080 | config TARGET_ISA_REV |
2081 | int | |
2082 | default 1 if CPU_MIPSR1 | |
2083 | default 2 if CPU_MIPSR2 | |
2084 | default 6 if CPU_MIPSR6 | |
2085 | default 0 | |
2086 | help | |
2087 | Reflects the ISA revision being targeted by the kernel build. This | |
2088 | is effectively the Kconfig equivalent of MIPS_ISA_REV. | |
2089 | ||
a6e18781 LY |
2090 | config EVA |
2091 | bool | |
2092 | ||
c5b36783 SH |
2093 | config XPA |
2094 | bool | |
2095 | ||
5e83d430 RB |
2096 | config SYS_SUPPORTS_32BIT_KERNEL |
2097 | bool | |
2098 | config SYS_SUPPORTS_64BIT_KERNEL | |
2099 | bool | |
2100 | config CPU_SUPPORTS_32BIT_KERNEL | |
2101 | bool | |
2102 | config CPU_SUPPORTS_64BIT_KERNEL | |
2103 | bool | |
55045ff5 WZ |
2104 | config CPU_SUPPORTS_CPUFREQ |
2105 | bool | |
2106 | config CPU_SUPPORTS_ADDRWINCFG | |
2107 | bool | |
9cffd154 DD |
2108 | config CPU_SUPPORTS_HUGEPAGES |
2109 | bool | |
22f1fdfd WZ |
2110 | config CPU_SUPPORTS_UNCACHED_ACCELERATED |
2111 | bool | |
82622284 DD |
2112 | config MIPS_PGD_C0_CONTEXT |
2113 | bool | |
cebf8c0f | 2114 | default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP |
5e83d430 | 2115 | |
8192c9ea DD |
2116 | # |
2117 | # Set to y for ptrace access to watch registers. | |
2118 | # | |
2119 | config HARDWARE_WATCHPOINTS | |
371a4151 EWI |
2120 | bool |
2121 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 | |
8192c9ea | 2122 | |
5e83d430 RB |
2123 | menu "Kernel type" |
2124 | ||
2125 | choice | |
5e83d430 RB |
2126 | prompt "Kernel code model" |
2127 | help | |
2128 | You should only select this option if you have a workload that | |
2129 | actually benefits from 64-bit processing or if your machine has | |
2130 | large memory. You will only be presented a single option in this | |
2131 | menu if your system does not support both 32-bit and 64-bit kernels. | |
2132 | ||
2133 | config 32BIT | |
2134 | bool "32-bit kernel" | |
2135 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL | |
2136 | select TRAD_SIGNALS | |
2137 | help | |
2138 | Select this option if you want to build a 32-bit kernel. | |
f17c4ca3 | 2139 | |
5e83d430 RB |
2140 | config 64BIT |
2141 | bool "64-bit kernel" | |
2142 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL | |
2143 | help | |
2144 | Select this option if you want to build a 64-bit kernel. | |
2145 | ||
2146 | endchoice | |
2147 | ||
2235a54d SL |
2148 | config KVM_GUEST |
2149 | bool "KVM Guest Kernel" | |
f2a5b1d7 | 2150 | depends on BROKEN_ON_SMP |
2235a54d | 2151 | help |
caa1faa7 JH |
2152 | Select this option if building a guest kernel for KVM (Trap & Emulate) |
2153 | mode. | |
2235a54d | 2154 | |
eda3d33c JH |
2155 | config KVM_GUEST_TIMER_FREQ |
2156 | int "Count/Compare Timer Frequency (MHz)" | |
2235a54d | 2157 | depends on KVM_GUEST |
eda3d33c | 2158 | default 100 |
2235a54d | 2159 | help |
eda3d33c JH |
2160 | Set this to non-zero if building a guest kernel for KVM to skip RTC |
2161 | emulation when determining guest CPU Frequency. Instead, the guest's | |
2162 | timer frequency is specified directly. | |
2235a54d | 2163 | |
1e321fa9 LY |
2164 | config MIPS_VA_BITS_48 |
2165 | bool "48 bits virtual memory" | |
2166 | depends on 64BIT | |
2167 | help | |
3377e227 AB |
2168 | Support a maximum at least 48 bits of application virtual |
2169 | memory. Default is 40 bits or less, depending on the CPU. | |
2170 | For page sizes 16k and above, this option results in a small | |
2171 | memory overhead for page tables. For 4k page size, a fourth | |
2172 | level of page tables is added which imposes both a memory | |
2173 | overhead as well as slower TLB fault handling. | |
2174 | ||
1e321fa9 LY |
2175 | If unsure, say N. |
2176 | ||
1da177e4 LT |
2177 | choice |
2178 | prompt "Kernel page size" | |
2179 | default PAGE_SIZE_4KB | |
2180 | ||
2181 | config PAGE_SIZE_4KB | |
2182 | bool "4kB" | |
0e476d91 | 2183 | depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 |
1da177e4 | 2184 | help |
371a4151 EWI |
2185 | This option select the standard 4kB Linux page size. On some |
2186 | R3000-family processors this is the only available page size. Using | |
2187 | 4kB page size will minimize memory consumption and is therefore | |
2188 | recommended for low memory systems. | |
1da177e4 LT |
2189 | |
2190 | config PAGE_SIZE_8KB | |
2191 | bool "8kB" | |
7d60717e | 2192 | depends on CPU_R8000 || CPU_CAVIUM_OCTEON |
1e321fa9 | 2193 | depends on !MIPS_VA_BITS_48 |
1da177e4 LT |
2194 | help |
2195 | Using 8kB page size will result in higher performance kernel at | |
2196 | the price of higher memory consumption. This option is available | |
c52399be RB |
2197 | only on R8000 and cnMIPS processors. Note that you will need a |
2198 | suitable Linux distribution to support this. | |
1da177e4 LT |
2199 | |
2200 | config PAGE_SIZE_16KB | |
2201 | bool "16kB" | |
714bfad6 | 2202 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2203 | help |
2204 | Using 16kB page size will result in higher performance kernel at | |
2205 | the price of higher memory consumption. This option is available on | |
714bfad6 RB |
2206 | all non-R3000 family processors. Note that you will need a suitable |
2207 | Linux distribution to support this. | |
1da177e4 | 2208 | |
c52399be RB |
2209 | config PAGE_SIZE_32KB |
2210 | bool "32kB" | |
2211 | depends on CPU_CAVIUM_OCTEON | |
1e321fa9 | 2212 | depends on !MIPS_VA_BITS_48 |
c52399be RB |
2213 | help |
2214 | Using 32kB page size will result in higher performance kernel at | |
2215 | the price of higher memory consumption. This option is available | |
2216 | only on cnMIPS cores. Note that you will need a suitable Linux | |
2217 | distribution to support this. | |
2218 | ||
1da177e4 LT |
2219 | config PAGE_SIZE_64KB |
2220 | bool "64kB" | |
3b2db173 | 2221 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2222 | help |
2223 | Using 64kB page size will result in higher performance kernel at | |
2224 | the price of higher memory consumption. This option is available on | |
2225 | all non-R3000 family processor. Not that at the time of this | |
714bfad6 | 2226 | writing this option is still high experimental. |
1da177e4 LT |
2227 | |
2228 | endchoice | |
2229 | ||
c9bace7c DD |
2230 | config FORCE_MAX_ZONEORDER |
2231 | int "Maximum zone order" | |
e4362d1e AS |
2232 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
2233 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB | |
2234 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2235 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2236 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
2237 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
c9bace7c DD |
2238 | range 11 64 |
2239 | default "11" | |
2240 | help | |
2241 | The kernel memory allocator divides physically contiguous memory | |
2242 | blocks into "zones", where each zone is a power of two number of | |
2243 | pages. This option selects the largest power of two that the kernel | |
2244 | keeps in the memory allocator. If you need to allocate very large | |
2245 | blocks of physically contiguous memory, then you may need to | |
2246 | increase this value. | |
2247 | ||
2248 | This config option is actually maximum order plus one. For example, | |
2249 | a value of 11 means that the largest free memory block is 2^10 pages. | |
2250 | ||
2251 | The page size is not necessarily 4KB. Keep this in mind | |
2252 | when choosing a value for this option. | |
2253 | ||
1da177e4 LT |
2254 | config BOARD_SCACHE |
2255 | bool | |
2256 | ||
2257 | config IP22_CPU_SCACHE | |
2258 | bool | |
2259 | select BOARD_SCACHE | |
2260 | ||
9318c51a CD |
2261 | # |
2262 | # Support for a MIPS32 / MIPS64 style S-caches | |
2263 | # | |
2264 | config MIPS_CPU_SCACHE | |
2265 | bool | |
2266 | select BOARD_SCACHE | |
2267 | ||
1da177e4 LT |
2268 | config R5000_CPU_SCACHE |
2269 | bool | |
2270 | select BOARD_SCACHE | |
2271 | ||
2272 | config RM7000_CPU_SCACHE | |
2273 | bool | |
2274 | select BOARD_SCACHE | |
2275 | ||
2276 | config SIBYTE_DMA_PAGEOPS | |
2277 | bool "Use DMA to clear/copy pages" | |
2278 | depends on CPU_SB1 | |
2279 | help | |
2280 | Instead of using the CPU to zero and copy pages, use a Data Mover | |
2281 | channel. These DMA channels are otherwise unused by the standard | |
2282 | SiByte Linux port. Seems to give a small performance benefit. | |
2283 | ||
2284 | config CPU_HAS_PREFETCH | |
c8094b53 | 2285 | bool |
1da177e4 | 2286 | |
3165c846 FF |
2287 | config CPU_GENERIC_DUMP_TLB |
2288 | bool | |
3b2db173 | 2289 | default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) |
3165c846 | 2290 | |
c92e47e5 | 2291 | config MIPS_FP_SUPPORT |
183b40f9 PB |
2292 | bool "Floating Point support" if EXPERT |
2293 | default y | |
2294 | help | |
2295 | Select y to include support for floating point in the kernel | |
2296 | including initialization of FPU hardware, FP context save & restore | |
2297 | and emulation of an FPU where necessary. Without this support any | |
2298 | userland program attempting to use floating point instructions will | |
2299 | receive a SIGILL. | |
2300 | ||
2301 | If you know that your userland will not attempt to use floating point | |
2302 | instructions then you can say n here to shrink the kernel a little. | |
2303 | ||
2304 | If unsure, say y. | |
c92e47e5 | 2305 | |
97f7dcbf PB |
2306 | config CPU_R2300_FPU |
2307 | bool | |
c92e47e5 | 2308 | depends on MIPS_FP_SUPPORT |
97f7dcbf PB |
2309 | default y if CPU_R3000 || CPU_TX39XX |
2310 | ||
91405eb6 FF |
2311 | config CPU_R4K_FPU |
2312 | bool | |
c92e47e5 | 2313 | depends on MIPS_FP_SUPPORT |
97f7dcbf | 2314 | default y if !CPU_R2300_FPU |
91405eb6 | 2315 | |
62cedc4f FF |
2316 | config CPU_R4K_CACHE_TLB |
2317 | bool | |
2318 | default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) | |
2319 | ||
59d6ab86 | 2320 | config MIPS_MT_SMP |
a92b7f87 | 2321 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
5cbf9688 | 2322 | default y |
527f1028 | 2323 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS |
f7062ddb | 2324 | select CPU_MIPSR2_IRQ_VI |
d725cf38 | 2325 | select CPU_MIPSR2_IRQ_EI |
c080faa5 | 2326 | select SYNC_R4K |
f41ae0b2 | 2327 | select MIPS_MT |
41c594ab | 2328 | select SMP |
87353d8a | 2329 | select SMP_UP |
c080faa5 SH |
2330 | select SYS_SUPPORTS_SMP |
2331 | select SYS_SUPPORTS_SCHED_SMT | |
399aaa25 | 2332 | select MIPS_PERF_SHARED_TC_COUNTERS |
f41ae0b2 | 2333 | help |
c080faa5 SH |
2334 | This is a kernel model which is known as SMVP. This is supported |
2335 | on cores with the MT ASE and uses the available VPEs to implement | |
2336 | virtual processors which supports SMP. This is equivalent to the | |
2337 | Intel Hyperthreading feature. For further information go to | |
2338 | <http://www.imgtec.com/mips/mips-multithreading.asp>. | |
41c594ab | 2339 | |
f41ae0b2 RB |
2340 | config MIPS_MT |
2341 | bool | |
2342 | ||
0ab7aefc RB |
2343 | config SCHED_SMT |
2344 | bool "SMT (multithreading) scheduler support" | |
2345 | depends on SYS_SUPPORTS_SCHED_SMT | |
2346 | default n | |
2347 | help | |
2348 | SMT scheduler support improves the CPU scheduler's decision making | |
2349 | when dealing with MIPS MT enabled cores at a cost of slightly | |
2350 | increased overhead in some places. If unsure say N here. | |
2351 | ||
2352 | config SYS_SUPPORTS_SCHED_SMT | |
2353 | bool | |
2354 | ||
f41ae0b2 RB |
2355 | config SYS_SUPPORTS_MULTITHREADING |
2356 | bool | |
2357 | ||
f088fc84 RB |
2358 | config MIPS_MT_FPAFF |
2359 | bool "Dynamic FPU affinity for FP-intensive threads" | |
f088fc84 | 2360 | default y |
b633648c | 2361 | depends on MIPS_MT_SMP |
07cc0c9e | 2362 | |
b0a668fb LY |
2363 | config MIPSR2_TO_R6_EMULATOR |
2364 | bool "MIPS R2-to-R6 emulator" | |
9eaa9a82 | 2365 | depends on CPU_MIPSR6 |
c92e47e5 | 2366 | depends on MIPS_FP_SUPPORT |
b0a668fb LY |
2367 | default y |
2368 | help | |
2369 | Choose this option if you want to run non-R6 MIPS userland code. | |
2370 | Even if you say 'Y' here, the emulator will still be disabled by | |
07edf0d4 | 2371 | default. You can enable it using the 'mipsr2emu' kernel option. |
b0a668fb LY |
2372 | The only reason this is a build-time option is to save ~14K from the |
2373 | final kernel image. | |
b0a668fb | 2374 | |
f35764e7 JH |
2375 | config SYS_SUPPORTS_VPE_LOADER |
2376 | bool | |
2377 | depends on SYS_SUPPORTS_MULTITHREADING | |
2378 | help | |
2379 | Indicates that the platform supports the VPE loader, and provides | |
2380 | physical_memsize. | |
2381 | ||
07cc0c9e RB |
2382 | config MIPS_VPE_LOADER |
2383 | bool "VPE loader support." | |
f35764e7 | 2384 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
07cc0c9e RB |
2385 | select CPU_MIPSR2_IRQ_VI |
2386 | select CPU_MIPSR2_IRQ_EI | |
07cc0c9e RB |
2387 | select MIPS_MT |
2388 | help | |
2389 | Includes a loader for loading an elf relocatable object | |
2390 | onto another VPE and running it. | |
f088fc84 | 2391 | |
17a1d523 DCZ |
2392 | config MIPS_VPE_LOADER_CMP |
2393 | bool | |
2394 | default "y" | |
2395 | depends on MIPS_VPE_LOADER && MIPS_CMP | |
2396 | ||
1a2a6d7e DCZ |
2397 | config MIPS_VPE_LOADER_MT |
2398 | bool | |
2399 | default "y" | |
2400 | depends on MIPS_VPE_LOADER && !MIPS_CMP | |
2401 | ||
e01402b1 RB |
2402 | config MIPS_VPE_LOADER_TOM |
2403 | bool "Load VPE program into memory hidden from linux" | |
2404 | depends on MIPS_VPE_LOADER | |
2405 | default y | |
2406 | help | |
2407 | The loader can use memory that is present but has been hidden from | |
2408 | Linux using the kernel command line option "mem=xxMB". It's up to | |
2409 | you to ensure the amount you put in the option and the space your | |
2410 | program requires is less or equal to the amount physically present. | |
2411 | ||
e01402b1 | 2412 | config MIPS_VPE_APSP_API |
5e83d430 RB |
2413 | bool "Enable support for AP/SP API (RTLX)" |
2414 | depends on MIPS_VPE_LOADER | |
e01402b1 | 2415 | |
da615cf6 DCZ |
2416 | config MIPS_VPE_APSP_API_CMP |
2417 | bool | |
2418 | default "y" | |
2419 | depends on MIPS_VPE_APSP_API && MIPS_CMP | |
2420 | ||
2c973ef0 DCZ |
2421 | config MIPS_VPE_APSP_API_MT |
2422 | bool | |
2423 | default "y" | |
2424 | depends on MIPS_VPE_APSP_API && !MIPS_CMP | |
2425 | ||
4a16ff4c | 2426 | config MIPS_CMP |
5cac93b3 | 2427 | bool "MIPS CMP framework support (DEPRECATED)" |
5676319c | 2428 | depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
b10b43ba | 2429 | select SMP |
eb9b5141 | 2430 | select SYNC_R4K |
b10b43ba | 2431 | select SYS_SUPPORTS_SMP |
4a16ff4c RB |
2432 | select WEAK_ORDERING |
2433 | default n | |
2434 | help | |
044505c7 PB |
2435 | Select this if you are using a bootloader which implements the "CMP |
2436 | framework" protocol (ie. YAMON) and want your kernel to make use of | |
2437 | its ability to start secondary CPUs. | |
4a16ff4c | 2438 | |
5cac93b3 PB |
2439 | Unless you have a specific need, you should use CONFIG_MIPS_CPS |
2440 | instead of this. | |
2441 | ||
0ee958e1 PB |
2442 | config MIPS_CPS |
2443 | bool "MIPS Coherent Processing System support" | |
5a3e7c02 | 2444 | depends on SYS_SUPPORTS_MIPS_CPS |
0ee958e1 | 2445 | select MIPS_CM |
1d8f1f5a | 2446 | select MIPS_CPS_PM if HOTPLUG_CPU |
0ee958e1 PB |
2447 | select SMP |
2448 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) | |
1d8f1f5a | 2449 | select SYS_SUPPORTS_HOTPLUG_CPU |
c8b7712c | 2450 | select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
0ee958e1 PB |
2451 | select SYS_SUPPORTS_SMP |
2452 | select WEAK_ORDERING | |
2453 | help | |
2454 | Select this if you wish to run an SMP kernel across multiple cores | |
2455 | within a MIPS Coherent Processing System. When this option is | |
2456 | enabled the kernel will probe for other cores and boot them with | |
2457 | no external assistance. It is safe to enable this when hardware | |
2458 | support is unavailable. | |
2459 | ||
3179d37e | 2460 | config MIPS_CPS_PM |
39a59593 | 2461 | depends on MIPS_CPS |
3179d37e PB |
2462 | bool |
2463 | ||
9f98f3dd PB |
2464 | config MIPS_CM |
2465 | bool | |
3c9b4166 | 2466 | select MIPS_CPC |
9f98f3dd | 2467 | |
9c38cf44 PB |
2468 | config MIPS_CPC |
2469 | bool | |
4a16ff4c | 2470 | |
1da177e4 LT |
2471 | config SB1_PASS_2_WORKAROUNDS |
2472 | bool | |
2473 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) | |
2474 | default y | |
2475 | ||
2476 | config SB1_PASS_2_1_WORKAROUNDS | |
2477 | bool | |
2478 | depends on CPU_SB1 && CPU_SB1_PASS_2 | |
2479 | default y | |
2480 | ||
9e2b5372 MC |
2481 | choice |
2482 | prompt "SmartMIPS or microMIPS ASE support" | |
2483 | ||
2484 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS | |
2485 | bool "None" | |
2486 | help | |
2487 | Select this if you want neither microMIPS nor SmartMIPS support | |
2488 | ||
9693a853 FBH |
2489 | config CPU_HAS_SMARTMIPS |
2490 | depends on SYS_SUPPORTS_SMARTMIPS | |
9e2b5372 | 2491 | bool "SmartMIPS" |
9693a853 FBH |
2492 | help |
2493 | SmartMIPS is a extension of the MIPS32 architecture aimed at | |
2494 | increased security at both hardware and software level for | |
2495 | smartcards. Enabling this option will allow proper use of the | |
2496 | SmartMIPS instructions by Linux applications. However a kernel with | |
2497 | this option will not work on a MIPS core without SmartMIPS core. If | |
2498 | you don't know you probably don't have SmartMIPS and should say N | |
2499 | here. | |
2500 | ||
bce86083 | 2501 | config CPU_MICROMIPS |
7fd08ca5 | 2502 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
9e2b5372 | 2503 | bool "microMIPS" |
bce86083 SH |
2504 | help |
2505 | When this option is enabled the kernel will be built using the | |
2506 | microMIPS ISA | |
2507 | ||
9e2b5372 MC |
2508 | endchoice |
2509 | ||
a5e9a69e | 2510 | config CPU_HAS_MSA |
0ce3417e | 2511 | bool "Support for the MIPS SIMD Architecture" |
a5e9a69e | 2512 | depends on CPU_SUPPORTS_MSA |
c92e47e5 | 2513 | depends on MIPS_FP_SUPPORT |
2a6cb669 | 2514 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
a5e9a69e PB |
2515 | help |
2516 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers | |
2517 | and a set of SIMD instructions to operate on them. When this option | |
1db1af84 PB |
2518 | is enabled the kernel will support allocating & switching MSA |
2519 | vector register contexts. If you know that your kernel will only be | |
2520 | running on CPUs which do not support MSA or that your userland will | |
2521 | not be making use of it then you may wish to say N here to reduce | |
2522 | the size & complexity of your kernel. | |
a5e9a69e PB |
2523 | |
2524 | If unsure, say Y. | |
2525 | ||
1da177e4 | 2526 | config CPU_HAS_WB |
f7062ddb | 2527 | bool |
e01402b1 | 2528 | |
df0ac8a4 KC |
2529 | config XKS01 |
2530 | bool | |
2531 | ||
8256b17e FF |
2532 | config CPU_HAS_RIXI |
2533 | bool | |
2534 | ||
932afdee YC |
2535 | config CPU_HAS_LOAD_STORE_LR |
2536 | bool | |
2537 | help | |
2538 | CPU has support for unaligned load and store instructions: | |
2539 | LWL, LWR, SWL, SWR (Load/store word left/right). | |
2540 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems). | |
2541 | ||
f41ae0b2 RB |
2542 | # |
2543 | # Vectored interrupt mode is an R2 feature | |
2544 | # | |
e01402b1 | 2545 | config CPU_MIPSR2_IRQ_VI |
f41ae0b2 | 2546 | bool |
e01402b1 | 2547 | |
f41ae0b2 RB |
2548 | # |
2549 | # Extended interrupt mode is an R2 feature | |
2550 | # | |
e01402b1 | 2551 | config CPU_MIPSR2_IRQ_EI |
f41ae0b2 | 2552 | bool |
e01402b1 | 2553 | |
1da177e4 LT |
2554 | config CPU_HAS_SYNC |
2555 | bool | |
2556 | depends on !CPU_R3000 | |
2557 | default y | |
2558 | ||
20d60d99 MR |
2559 | # |
2560 | # CPU non-features | |
2561 | # | |
2562 | config CPU_DADDI_WORKAROUNDS | |
2563 | bool | |
2564 | ||
2565 | config CPU_R4000_WORKAROUNDS | |
2566 | bool | |
2567 | select CPU_R4400_WORKAROUNDS | |
2568 | ||
2569 | config CPU_R4400_WORKAROUNDS | |
2570 | bool | |
2571 | ||
4edf00a4 PB |
2572 | config MIPS_ASID_SHIFT |
2573 | int | |
2574 | default 6 if CPU_R3000 || CPU_TX39XX | |
2575 | default 4 if CPU_R8000 | |
2576 | default 0 | |
2577 | ||
2578 | config MIPS_ASID_BITS | |
2579 | int | |
2db003a5 | 2580 | default 0 if MIPS_ASID_BITS_VARIABLE |
4edf00a4 PB |
2581 | default 6 if CPU_R3000 || CPU_TX39XX |
2582 | default 8 | |
2583 | ||
2db003a5 PB |
2584 | config MIPS_ASID_BITS_VARIABLE |
2585 | bool | |
2586 | ||
4a5dc51e MN |
2587 | config MIPS_CRC_SUPPORT |
2588 | bool | |
2589 | ||
1da177e4 LT |
2590 | # |
2591 | # - Highmem only makes sense for the 32-bit kernel. | |
2592 | # - The current highmem code will only work properly on physically indexed | |
2593 | # caches such as R3000, SB1, R7000 or those that look like they're virtually | |
2594 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the | |
2595 | # moment we protect the user and offer the highmem option only on machines | |
2596 | # where it's known to be safe. This will not offer highmem on a few systems | |
2597 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically | |
2598 | # indexed CPUs but we're playing safe. | |
797798c1 RB |
2599 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
2600 | # know they might have memory configurations that could make use of highmem | |
2601 | # support. | |
1da177e4 LT |
2602 | # |
2603 | config HIGHMEM | |
2604 | bool "High Memory Support" | |
a6e18781 | 2605 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
797798c1 RB |
2606 | |
2607 | config CPU_SUPPORTS_HIGHMEM | |
2608 | bool | |
2609 | ||
2610 | config SYS_SUPPORTS_HIGHMEM | |
2611 | bool | |
1da177e4 | 2612 | |
9693a853 FBH |
2613 | config SYS_SUPPORTS_SMARTMIPS |
2614 | bool | |
2615 | ||
a6a4834c SH |
2616 | config SYS_SUPPORTS_MICROMIPS |
2617 | bool | |
2618 | ||
377cb1b6 RB |
2619 | config SYS_SUPPORTS_MIPS16 |
2620 | bool | |
2621 | help | |
2622 | This option must be set if a kernel might be executed on a MIPS16- | |
2623 | enabled CPU even if MIPS16 is not actually being used. In other | |
2624 | words, it makes the kernel MIPS16-tolerant. | |
2625 | ||
a5e9a69e PB |
2626 | config CPU_SUPPORTS_MSA |
2627 | bool | |
2628 | ||
b4819b59 YY |
2629 | config ARCH_FLATMEM_ENABLE |
2630 | def_bool y | |
f133f22d | 2631 | depends on !NUMA && !CPU_LOONGSON2 |
b4819b59 | 2632 | |
d8cb4e11 RB |
2633 | config ARCH_DISCONTIGMEM_ENABLE |
2634 | bool | |
2635 | default y if SGI_IP27 | |
2636 | help | |
3dde6ad8 | 2637 | Say Y to support efficient handling of discontiguous physical memory, |
d8cb4e11 RB |
2638 | for architectures which are either NUMA (Non-Uniform Memory Access) |
2639 | or have huge holes in the physical address space for other reasons. | |
ad56b738 | 2640 | See <file:Documentation/vm/numa.rst> for more. |
d8cb4e11 | 2641 | |
31473747 AN |
2642 | config ARCH_SPARSEMEM_ENABLE |
2643 | bool | |
7de58fab | 2644 | select SPARSEMEM_STATIC |
31473747 | 2645 | |
d8cb4e11 RB |
2646 | config NUMA |
2647 | bool "NUMA Support" | |
2648 | depends on SYS_SUPPORTS_NUMA | |
2649 | help | |
2650 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory | |
2651 | Access). This option improves performance on systems with more | |
2652 | than two nodes; on two node systems it is generally better to | |
2653 | leave it disabled; on single node systems disable this option | |
2654 | disabled. | |
2655 | ||
2656 | config SYS_SUPPORTS_NUMA | |
2657 | bool | |
2658 | ||
8c530ea3 MR |
2659 | config RELOCATABLE |
2660 | bool "Relocatable kernel" | |
3ff72be4 | 2661 | depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) |
8c530ea3 MR |
2662 | help |
2663 | This builds a kernel image that retains relocation information | |
2664 | so it can be loaded someplace besides the default 1MB. | |
2665 | The relocations make the kernel binary about 15% larger, | |
2666 | but are discarded at runtime | |
2667 | ||
069fd766 MR |
2668 | config RELOCATION_TABLE_SIZE |
2669 | hex "Relocation table size" | |
2670 | depends on RELOCATABLE | |
2671 | range 0x0 0x01000000 | |
2672 | default "0x00100000" | |
2673 | ---help--- | |
2674 | A table of relocation data will be appended to the kernel binary | |
2675 | and parsed at boot to fix up the relocated kernel. | |
2676 | ||
2677 | This option allows the amount of space reserved for the table to be | |
2678 | adjusted, although the default of 1Mb should be ok in most cases. | |
2679 | ||
2680 | The build will fail and a valid size suggested if this is too small. | |
2681 | ||
2682 | If unsure, leave at the default value. | |
2683 | ||
405bc8fd MR |
2684 | config RANDOMIZE_BASE |
2685 | bool "Randomize the address of the kernel image" | |
2686 | depends on RELOCATABLE | |
2687 | ---help--- | |
371a4151 EWI |
2688 | Randomizes the physical and virtual address at which the |
2689 | kernel image is loaded, as a security feature that | |
2690 | deters exploit attempts relying on knowledge of the location | |
2691 | of kernel internals. | |
405bc8fd | 2692 | |
371a4151 | 2693 | Entropy is generated using any coprocessor 0 registers available. |
405bc8fd | 2694 | |
371a4151 | 2695 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
405bc8fd | 2696 | |
371a4151 | 2697 | If unsure, say N. |
405bc8fd MR |
2698 | |
2699 | config RANDOMIZE_BASE_MAX_OFFSET | |
2700 | hex "Maximum kASLR offset" if EXPERT | |
2701 | depends on RANDOMIZE_BASE | |
2702 | range 0x0 0x40000000 if EVA || 64BIT | |
2703 | range 0x0 0x08000000 | |
2704 | default "0x01000000" | |
2705 | ---help--- | |
2706 | When kASLR is active, this provides the maximum offset that will | |
2707 | be applied to the kernel image. It should be set according to the | |
2708 | amount of physical RAM available in the target system minus | |
2709 | PHYSICAL_START and must be a power of 2. | |
2710 | ||
2711 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with | |
2712 | EVA or 64-bit. The default is 16Mb. | |
2713 | ||
c80d79d7 YG |
2714 | config NODES_SHIFT |
2715 | int | |
2716 | default "6" | |
2717 | depends on NEED_MULTIPLE_NODES | |
2718 | ||
14f70012 DCZ |
2719 | config HW_PERF_EVENTS |
2720 | bool "Enable hardware performance counter support for perf events" | |
23021b2b | 2721 | depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) |
14f70012 DCZ |
2722 | default y |
2723 | help | |
2724 | Enable hardware performance counter support for perf events. If | |
2725 | disabled, perf events will use software events only. | |
2726 | ||
1da177e4 LT |
2727 | config SMP |
2728 | bool "Multi-Processing support" | |
e73ea273 RB |
2729 | depends on SYS_SUPPORTS_SMP |
2730 | help | |
1da177e4 | 2731 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
2732 | a system with only one CPU, say N. If you have a system with more |
2733 | than one CPU, say Y. | |
1da177e4 | 2734 | |
4a474157 | 2735 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
2736 | machines, but will use only one CPU of a multiprocessor machine. If |
2737 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 2738 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
2739 | will run faster if you say N here. |
2740 | ||
2741 | People using multiprocessor machines who say Y here should also say | |
2742 | Y to "Enhanced Real Time Clock Support", below. | |
2743 | ||
03502faa AB |
2744 | See also the SMP-HOWTO available at |
2745 | <http://www.tldp.org/docs.html#howto>. | |
1da177e4 LT |
2746 | |
2747 | If you don't know what to do here, say N. | |
2748 | ||
7840d618 MR |
2749 | config HOTPLUG_CPU |
2750 | bool "Support for hot-pluggable CPUs" | |
2751 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU | |
2752 | help | |
2753 | Say Y here to allow turning CPUs off and on. CPUs can be | |
2754 | controlled through /sys/devices/system/cpu. | |
2755 | (Note: power management support will enable this option | |
2756 | automatically on SMP systems. ) | |
2757 | Say N if you want to disable CPU hotplug. | |
2758 | ||
87353d8a RB |
2759 | config SMP_UP |
2760 | bool | |
2761 | ||
4a16ff4c RB |
2762 | config SYS_SUPPORTS_MIPS_CMP |
2763 | bool | |
2764 | ||
0ee958e1 PB |
2765 | config SYS_SUPPORTS_MIPS_CPS |
2766 | bool | |
2767 | ||
e73ea273 RB |
2768 | config SYS_SUPPORTS_SMP |
2769 | bool | |
2770 | ||
130e2fb7 RB |
2771 | config NR_CPUS_DEFAULT_4 |
2772 | bool | |
2773 | ||
2774 | config NR_CPUS_DEFAULT_8 | |
2775 | bool | |
2776 | ||
2777 | config NR_CPUS_DEFAULT_16 | |
2778 | bool | |
2779 | ||
2780 | config NR_CPUS_DEFAULT_32 | |
2781 | bool | |
2782 | ||
2783 | config NR_CPUS_DEFAULT_64 | |
2784 | bool | |
2785 | ||
1da177e4 | 2786 | config NR_CPUS |
a91796a9 J |
2787 | int "Maximum number of CPUs (2-256)" |
2788 | range 2 256 | |
1da177e4 | 2789 | depends on SMP |
130e2fb7 RB |
2790 | default "4" if NR_CPUS_DEFAULT_4 |
2791 | default "8" if NR_CPUS_DEFAULT_8 | |
2792 | default "16" if NR_CPUS_DEFAULT_16 | |
2793 | default "32" if NR_CPUS_DEFAULT_32 | |
2794 | default "64" if NR_CPUS_DEFAULT_64 | |
1da177e4 LT |
2795 | help |
2796 | This allows you to specify the maximum number of CPUs which this | |
2797 | kernel will support. The maximum supported value is 32 for 32-bit | |
2798 | kernel and 64 for 64-bit kernels; the minimum value which makes | |
72ede9b1 AN |
2799 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
2800 | and 2 for all others. | |
1da177e4 LT |
2801 | |
2802 | This is purely to save memory - each supported CPU adds | |
72ede9b1 AN |
2803 | approximately eight kilobytes to the kernel image. For best |
2804 | performance should round up your number of processors to the next | |
2805 | power of two. | |
1da177e4 | 2806 | |
399aaa25 AC |
2807 | config MIPS_PERF_SHARED_TC_COUNTERS |
2808 | bool | |
7820b84b DD |
2809 | |
2810 | config MIPS_NR_CPU_NR_MAP_1024 | |
2811 | bool | |
2812 | ||
2813 | config MIPS_NR_CPU_NR_MAP | |
2814 | int | |
2815 | depends on SMP | |
2816 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 | |
2817 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 | |
399aaa25 | 2818 | |
1723b4a3 AN |
2819 | # |
2820 | # Timer Interrupt Frequency Configuration | |
2821 | # | |
2822 | ||
2823 | choice | |
2824 | prompt "Timer frequency" | |
2825 | default HZ_250 | |
2826 | help | |
371a4151 | 2827 | Allows the configuration of the timer frequency. |
1723b4a3 | 2828 | |
67596573 PB |
2829 | config HZ_24 |
2830 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ | |
2831 | ||
1723b4a3 | 2832 | config HZ_48 |
0f873585 | 2833 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
1723b4a3 AN |
2834 | |
2835 | config HZ_100 | |
2836 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ | |
2837 | ||
2838 | config HZ_128 | |
2839 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ | |
2840 | ||
2841 | config HZ_250 | |
2842 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ | |
2843 | ||
2844 | config HZ_256 | |
2845 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ | |
2846 | ||
2847 | config HZ_1000 | |
2848 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ | |
2849 | ||
2850 | config HZ_1024 | |
2851 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ | |
2852 | ||
2853 | endchoice | |
2854 | ||
67596573 PB |
2855 | config SYS_SUPPORTS_24HZ |
2856 | bool | |
2857 | ||
1723b4a3 AN |
2858 | config SYS_SUPPORTS_48HZ |
2859 | bool | |
2860 | ||
2861 | config SYS_SUPPORTS_100HZ | |
2862 | bool | |
2863 | ||
2864 | config SYS_SUPPORTS_128HZ | |
2865 | bool | |
2866 | ||
2867 | config SYS_SUPPORTS_250HZ | |
2868 | bool | |
2869 | ||
2870 | config SYS_SUPPORTS_256HZ | |
2871 | bool | |
2872 | ||
2873 | config SYS_SUPPORTS_1000HZ | |
2874 | bool | |
2875 | ||
2876 | config SYS_SUPPORTS_1024HZ | |
2877 | bool | |
2878 | ||
2879 | config SYS_SUPPORTS_ARBIT_HZ | |
2880 | bool | |
67596573 PB |
2881 | default y if !SYS_SUPPORTS_24HZ && \ |
2882 | !SYS_SUPPORTS_48HZ && \ | |
2883 | !SYS_SUPPORTS_100HZ && \ | |
2884 | !SYS_SUPPORTS_128HZ && \ | |
2885 | !SYS_SUPPORTS_250HZ && \ | |
2886 | !SYS_SUPPORTS_256HZ && \ | |
2887 | !SYS_SUPPORTS_1000HZ && \ | |
1723b4a3 AN |
2888 | !SYS_SUPPORTS_1024HZ |
2889 | ||
2890 | config HZ | |
2891 | int | |
67596573 | 2892 | default 24 if HZ_24 |
1723b4a3 AN |
2893 | default 48 if HZ_48 |
2894 | default 100 if HZ_100 | |
2895 | default 128 if HZ_128 | |
2896 | default 250 if HZ_250 | |
2897 | default 256 if HZ_256 | |
2898 | default 1000 if HZ_1000 | |
2899 | default 1024 if HZ_1024 | |
2900 | ||
96685b17 DCZ |
2901 | config SCHED_HRTICK |
2902 | def_bool HIGH_RES_TIMERS | |
2903 | ||
ea6e942b | 2904 | config KEXEC |
7d60717e | 2905 | bool "Kexec system call" |
2965faa5 | 2906 | select KEXEC_CORE |
ea6e942b AN |
2907 | help |
2908 | kexec is a system call that implements the ability to shutdown your | |
2909 | current kernel, and to start another kernel. It is like a reboot | |
3dde6ad8 | 2910 | but it is independent of the system firmware. And like a reboot |
ea6e942b AN |
2911 | you can start any kernel with it, not just Linux. |
2912 | ||
01dd2fbf | 2913 | The name comes from the similarity to the exec system call. |
ea6e942b AN |
2914 | |
2915 | It is an ongoing process to be certain the hardware in a machine | |
2916 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
2917 | initially work for you. As of this writing the exact hardware |
2918 | interface is strongly in flux, so no good recommendation can be | |
2919 | made. | |
ea6e942b | 2920 | |
7aa1c8f4 | 2921 | config CRASH_DUMP |
bff323d5 MN |
2922 | bool "Kernel crash dumps" |
2923 | help | |
7aa1c8f4 RB |
2924 | Generate crash dump after being started by kexec. |
2925 | This should be normally only set in special crash dump kernels | |
2926 | which are loaded in the main kernel with kexec-tools into | |
2927 | a specially reserved region and then later executed after | |
2928 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
2929 | to a memory address not used by the main kernel or firmware using | |
2930 | PHYSICAL_START. | |
2931 | ||
2932 | config PHYSICAL_START | |
bff323d5 | 2933 | hex "Physical address where the kernel is loaded" |
8bda3e26 | 2934 | default "0xffffffff84000000" |
bff323d5 MN |
2935 | depends on CRASH_DUMP |
2936 | help | |
7aa1c8f4 RB |
2937 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
2938 | If you plan to use kernel for capturing the crash dump change | |
2939 | this value to start of the reserved region (the "X" value as | |
2940 | specified in the "crashkernel=YM@XM" command line boot parameter | |
2941 | passed to the panic-ed kernel). | |
2942 | ||
ea6e942b AN |
2943 | config SECCOMP |
2944 | bool "Enable seccomp to safely compute untrusted bytecode" | |
293c5bd1 | 2945 | depends on PROC_FS |
ea6e942b AN |
2946 | default y |
2947 | help | |
2948 | This kernel feature is useful for number crunching applications | |
2949 | that may need to compute untrusted bytecode during their | |
2950 | execution. By using pipes or other transports made available to | |
2951 | the process as file descriptors supporting the read/write | |
2952 | syscalls, it's possible to isolate those applications in | |
2953 | their own address space using seccomp. Once seccomp is | |
2954 | enabled via /proc/<pid>/seccomp, it cannot be disabled | |
2955 | and the task is only allowed to execute a few safe syscalls | |
2956 | defined by each seccomp mode. | |
2957 | ||
2958 | If unsure, say Y. Only embedded should say N here. | |
2959 | ||
597ce172 | 2960 | config MIPS_O32_FP64_SUPPORT |
b7f1e273 | 2961 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
597ce172 | 2962 | depends on 32BIT || MIPS32_O32 |
597ce172 PB |
2963 | help |
2964 | When this is enabled, the kernel will support use of 64-bit floating | |
2965 | point registers with binaries using the O32 ABI along with the | |
2966 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On | |
2967 | 32-bit MIPS systems this support is at the cost of increasing the | |
2968 | size and complexity of the compiled FPU emulator. Thus if you are | |
2969 | running a MIPS32 system and know that none of your userland binaries | |
2970 | will require 64-bit floating point, you may wish to reduce the size | |
2971 | of your kernel & potentially improve FP emulation performance by | |
2972 | saying N here. | |
2973 | ||
06e2e882 PB |
2974 | Although binutils currently supports use of this flag the details |
2975 | concerning its effect upon the O32 ABI in userland are still being | |
2976 | worked on. In order to avoid userland becoming dependant upon current | |
2977 | behaviour before the details have been finalised, this option should | |
2978 | be considered experimental and only enabled by those working upon | |
2979 | said details. | |
2980 | ||
2981 | If unsure, say N. | |
597ce172 | 2982 | |
f2ffa5ab | 2983 | config USE_OF |
0b3e06fd | 2984 | bool |
f2ffa5ab | 2985 | select OF |
e6ce1324 | 2986 | select OF_EARLY_FLATTREE |
abd2363f | 2987 | select IRQ_DOMAIN |
f2ffa5ab | 2988 | |
2fe8ea39 DZ |
2989 | config UHI_BOOT |
2990 | bool | |
2991 | ||
7fafb068 AB |
2992 | config BUILTIN_DTB |
2993 | bool | |
2994 | ||
1da8f179 | 2995 | choice |
5b24d52c | 2996 | prompt "Kernel appended dtb support" if USE_OF |
1da8f179 JG |
2997 | default MIPS_NO_APPENDED_DTB |
2998 | ||
2999 | config MIPS_NO_APPENDED_DTB | |
3000 | bool "None" | |
3001 | help | |
3002 | Do not enable appended dtb support. | |
3003 | ||
87db537d AK |
3004 | config MIPS_ELF_APPENDED_DTB |
3005 | bool "vmlinux" | |
3006 | help | |
3007 | With this option, the boot code will look for a device tree binary | |
3008 | DTB) included in the vmlinux ELF section .appended_dtb. By default | |
3009 | it is empty and the DTB can be appended using binutils command | |
3010 | objcopy: | |
3011 | ||
3012 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux | |
3013 | ||
3014 | This is meant as a backward compatiblity convenience for those | |
3015 | systems with a bootloader that can't be upgraded to accommodate | |
3016 | the documented boot protocol using a device tree. | |
3017 | ||
1da8f179 | 3018 | config MIPS_RAW_APPENDED_DTB |
b8f54f2c | 3019 | bool "vmlinux.bin or vmlinuz.bin" |
1da8f179 JG |
3020 | help |
3021 | With this option, the boot code will look for a device tree binary | |
b8f54f2c | 3022 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
1da8f179 JG |
3023 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
3024 | ||
3025 | This is meant as a backward compatibility convenience for those | |
3026 | systems with a bootloader that can't be upgraded to accommodate | |
3027 | the documented boot protocol using a device tree. | |
3028 | ||
3029 | Beware that there is very little in terms of protection against | |
3030 | this option being confused by leftover garbage in memory that might | |
3031 | look like a DTB header after a reboot if no actual DTB is appended | |
3032 | to vmlinux.bin. Do not leave this option active in a production kernel | |
3033 | if you don't intend to always append a DTB. | |
3034 | endchoice | |
3035 | ||
2024972e JG |
3036 | choice |
3037 | prompt "Kernel command line type" if !CMDLINE_OVERRIDE | |
2bcef9b4 | 3038 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
3f5f0a44 | 3039 | !MIPS_MALTA && \ |
2bcef9b4 | 3040 | !CAVIUM_OCTEON_SOC |
2024972e JG |
3041 | default MIPS_CMDLINE_FROM_BOOTLOADER |
3042 | ||
3043 | config MIPS_CMDLINE_FROM_DTB | |
3044 | depends on USE_OF | |
3045 | bool "Dtb kernel arguments if available" | |
3046 | ||
3047 | config MIPS_CMDLINE_DTB_EXTEND | |
3048 | depends on USE_OF | |
3049 | bool "Extend dtb kernel arguments with bootloader arguments" | |
3050 | ||
3051 | config MIPS_CMDLINE_FROM_BOOTLOADER | |
3052 | bool "Bootloader kernel arguments if available" | |
ed47e153 RV |
3053 | |
3054 | config MIPS_CMDLINE_BUILTIN_EXTEND | |
3055 | depends on CMDLINE_BOOL | |
3056 | bool "Extend builtin kernel arguments with bootloader arguments" | |
2024972e JG |
3057 | endchoice |
3058 | ||
5e83d430 RB |
3059 | endmenu |
3060 | ||
1df0f0ff AN |
3061 | config LOCKDEP_SUPPORT |
3062 | bool | |
3063 | default y | |
3064 | ||
3065 | config STACKTRACE_SUPPORT | |
3066 | bool | |
3067 | default y | |
3068 | ||
e1e16115 AK |
3069 | config HAVE_LATENCYTOP_SUPPORT |
3070 | bool | |
3071 | default y | |
3072 | ||
a728ab52 KS |
3073 | config PGTABLE_LEVELS |
3074 | int | |
3377e227 | 3075 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
a728ab52 KS |
3076 | default 3 if 64BIT && !PAGE_SIZE_64KB |
3077 | default 2 | |
3078 | ||
6c359eb1 PB |
3079 | config MIPS_AUTO_PFN_OFFSET |
3080 | bool | |
3081 | ||
1da177e4 LT |
3082 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
3083 | ||
c5611df9 | 3084 | config PCI_DRIVERS_GENERIC |
2eac9c2d | 3085 | select PCI_DOMAINS_GENERIC if PCI |
c5611df9 PB |
3086 | bool |
3087 | ||
3088 | config PCI_DRIVERS_LEGACY | |
3089 | def_bool !PCI_DRIVERS_GENERIC | |
3090 | select NO_GENERIC_PCI_IOPORT_MAP | |
2eac9c2d | 3091 | select PCI_DOMAINS if PCI |
1da177e4 LT |
3092 | |
3093 | # | |
3094 | # ISA support is now enabled via select. Too many systems still have the one | |
3095 | # or other ISA chip on the board that users don't know about so don't expect | |
3096 | # users to choose the right thing ... | |
3097 | # | |
3098 | config ISA | |
3099 | bool | |
3100 | ||
1da177e4 LT |
3101 | config TC |
3102 | bool "TURBOchannel support" | |
3103 | depends on MACH_DECSTATION | |
3104 | help | |
50a23e6e JM |
3105 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
3106 | processors. TURBOchannel programming specifications are available | |
3107 | at: | |
3108 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> | |
3109 | and: | |
3110 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> | |
3111 | Linux driver support status is documented at: | |
3112 | <http://www.linux-mips.org/wiki/DECstation> | |
1da177e4 | 3113 | |
1da177e4 LT |
3114 | config MMU |
3115 | bool | |
3116 | default y | |
3117 | ||
109c32ff MR |
3118 | config ARCH_MMAP_RND_BITS_MIN |
3119 | default 12 if 64BIT | |
3120 | default 8 | |
3121 | ||
3122 | config ARCH_MMAP_RND_BITS_MAX | |
3123 | default 18 if 64BIT | |
3124 | default 15 | |
3125 | ||
3126 | config ARCH_MMAP_RND_COMPAT_BITS_MIN | |
371a4151 | 3127 | default 8 |
109c32ff MR |
3128 | |
3129 | config ARCH_MMAP_RND_COMPAT_BITS_MAX | |
371a4151 | 3130 | default 15 |
109c32ff | 3131 | |
d865bea4 RB |
3132 | config I8253 |
3133 | bool | |
798778b8 | 3134 | select CLKSRC_I8253 |
2d02612f | 3135 | select CLKEVT_I8253 |
9726b43a | 3136 | select MIPS_EXTERNAL_TIMER |
d865bea4 | 3137 | |
e05eb3f8 RB |
3138 | config ZONE_DMA |
3139 | bool | |
3140 | ||
cce335ae RB |
3141 | config ZONE_DMA32 |
3142 | bool | |
3143 | ||
1da177e4 LT |
3144 | endmenu |
3145 | ||
1da177e4 LT |
3146 | config TRAD_SIGNALS |
3147 | bool | |
1da177e4 | 3148 | |
1da177e4 | 3149 | config MIPS32_COMPAT |
78aaf956 | 3150 | bool |
1da177e4 LT |
3151 | |
3152 | config COMPAT | |
3153 | bool | |
1da177e4 | 3154 | |
05e43966 AN |
3155 | config SYSVIPC_COMPAT |
3156 | bool | |
05e43966 | 3157 | |
1da177e4 LT |
3158 | config MIPS32_O32 |
3159 | bool "Kernel support for o32 binaries" | |
78aaf956 RB |
3160 | depends on 64BIT |
3161 | select ARCH_WANT_OLD_COMPAT_IPC | |
3162 | select COMPAT | |
3163 | select MIPS32_COMPAT | |
3164 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3165 | help |
3166 | Select this option if you want to run o32 binaries. These are pure | |
3167 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of | |
3168 | existing binaries are in this format. | |
3169 | ||
3170 | If unsure, say Y. | |
3171 | ||
3172 | config MIPS32_N32 | |
3173 | bool "Kernel support for n32 binaries" | |
c22eacfe | 3174 | depends on 64BIT |
5a9372f7 | 3175 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
78aaf956 RB |
3176 | select COMPAT |
3177 | select MIPS32_COMPAT | |
3178 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3179 | help |
3180 | Select this option if you want to run n32 binaries. These are | |
3181 | 64-bit binaries using 32-bit quantities for addressing and certain | |
3182 | data that would normally be 64-bit. They are used in special | |
3183 | cases. | |
3184 | ||
3185 | If unsure, say N. | |
3186 | ||
3187 | config BINFMT_ELF32 | |
3188 | bool | |
3189 | default y if MIPS32_O32 || MIPS32_N32 | |
f43edca7 | 3190 | select ELFCORE |
1da177e4 | 3191 | |
2116245e RB |
3192 | menu "Power management options" |
3193 | ||
363c55ca WZ |
3194 | config ARCH_HIBERNATION_POSSIBLE |
3195 | def_bool y | |
3f5b3e17 | 3196 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
363c55ca | 3197 | |
f4cb5700 JB |
3198 | config ARCH_SUSPEND_POSSIBLE |
3199 | def_bool y | |
3f5b3e17 | 3200 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
f4cb5700 | 3201 | |
2116245e | 3202 | source "kernel/power/Kconfig" |
952fa954 | 3203 | |
1da177e4 LT |
3204 | endmenu |
3205 | ||
7a998935 VK |
3206 | config MIPS_EXTERNAL_TIMER |
3207 | bool | |
3208 | ||
7a998935 | 3209 | menu "CPU Power Management" |
c095ebaf PB |
3210 | |
3211 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER | |
7a998935 | 3212 | source "drivers/cpufreq/Kconfig" |
7a998935 | 3213 | endif |
9726b43a | 3214 | |
c095ebaf PB |
3215 | source "drivers/cpuidle/Kconfig" |
3216 | ||
3217 | endmenu | |
3218 | ||
98cdee0e RB |
3219 | source "drivers/firmware/Kconfig" |
3220 | ||
2235a54d | 3221 | source "arch/mips/kvm/Kconfig" |