[linux-block.git] / arch / microblaze / kernel / process.c

/*
 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
 * Copyright (C) 2008-2009 PetaLogix
 * Copyright (C) 2006 Atmark Techno, Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License. See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/cpu.h>
#include <linux/export.h>
#include <linux/sched.h>
#include <linux/sched/debug.h>
#include <linux/sched/task.h>
#include <linux/sched/task_stack.h>
#include <linux/pm.h>
#include <linux/tick.h>
#include <linux/bitops.h>
#include <linux/ptrace.h>
#include <asm/pgalloc.h>
#include <linux/uaccess.h> /* for USER_DS macros */
#include <asm/cacheflush.h>

void show_regs(struct pt_regs *regs)
{
	show_regs_print_info(KERN_INFO);

	pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode);
	pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
				regs->r1, regs->r2, regs->r3, regs->r4);
	pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
				regs->r5, regs->r6, regs->r7, regs->r8);
	pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
				regs->r9, regs->r10, regs->r11, regs->r12);
	pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
				regs->r13, regs->r14, regs->r15, regs->r16);
	pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
				regs->r17, regs->r18, regs->r19, regs->r20);
	pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
				regs->r21, regs->r22, regs->r23, regs->r24);
	pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
				regs->r25, regs->r26, regs->r27, regs->r28);
	pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
				regs->r29, regs->r30, regs->r31, regs->pc);
	pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
				regs->msr, regs->ear, regs->esr, regs->fsr);
}

void (*pm_power_off)(void) = NULL;
EXPORT_SYMBOL(pm_power_off);

void flush_thread(void)
{
}

int copy_thread(unsigned long clone_flags, unsigned long usp,
		unsigned long arg, struct task_struct *p)
{
	struct pt_regs *childregs = task_pt_regs(p);
	struct thread_info *ti = task_thread_info(p);

	if (unlikely(p->flags & PF_KTHREAD)) {
		/* if we're creating a new kernel thread then just zeroing all
		 * the registers. That's OK for a brand new thread.*/
		memset(childregs, 0, sizeof(struct pt_regs));
		memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
		ti->cpu_context.r1  = (unsigned long)childregs;
		ti->cpu_context.r20 = (unsigned long)usp; /* fn */
		ti->cpu_context.r19 = (unsigned long)arg;
		childregs->pt_mode = 1;
		local_save_flags(childregs->msr);
#ifdef CONFIG_MMU
		ti->cpu_context.msr = childregs->msr & ~MSR_IE;
#endif
		ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
		return 0;
	}
	*childregs = *current_pt_regs();
	if (usp)
		childregs->r1 = usp;

	memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
	ti->cpu_context.r1 = (unsigned long)childregs;
#ifndef CONFIG_MMU
	ti->cpu_context.msr = (unsigned long)childregs->msr;
#else
	childregs->msr |= MSR_UMS;

	/* we should consider the fact that childregs is a copy of the parent
	 * regs which were saved immediately after entering the kernel state
	 * before enabling VM. This MSR will be restored in switch_to and
	 * RETURN() and we want to have the right machine state there
	 * specifically this state must have INTs disabled before and enabled
	 * after performing rtbd
	 * compose the right MSR for RETURN(). It will work for switch_to also
	 * excepting for VM and UMS
	 * don't touch UMS , CARRY and cache bits
	 * right now MSR is a copy of parent one */
	childregs->msr &= ~MSR_EIP;
	childregs->msr |= MSR_IE;
	childregs->msr &= ~MSR_VM;
	childregs->msr |= MSR_VMS;
	childregs->msr |= MSR_EE; /* exceptions will be enabled*/

	ti->cpu_context.msr = (childregs->msr|MSR_VM);
	ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
	ti->cpu_context.msr &= ~MSR_IE;
#endif
	ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;

	/*
	 *  r21 is the thread reg, r10 is 6th arg to clone
	 *  which contains TLS area
	 */
	if (clone_flags & CLONE_SETTLS)
		childregs->r21 = childregs->r10;

	return 0;
}

#ifndef CONFIG_MMU
/*
 * Return saved PC of a blocked thread.
 */
unsigned long thread_saved_pc(struct task_struct *tsk)
{
	struct cpu_context *ctx =
		&(((struct thread_info *)(tsk->stack))->cpu_context);

	/* Check whether the thread is blocked in resume() */
	if (in_sched_functions(ctx->r15))
		return (unsigned long)ctx->r15;
	else
		return ctx->r14;
}
#endif

unsigned long get_wchan(struct task_struct *p)
{
/* TBD (used by procfs) */
	return 0;
}

/* Set up a thread for executing a new program */
void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
{
	regs->pc = pc;
	regs->r1 = usp;
	regs->pt_mode = 0;
#ifdef CONFIG_MMU
	regs->msr |= MSR_UMS;
	regs->msr &= ~MSR_VM;
#endif
}

#ifdef CONFIG_MMU
#include <linux/elfcore.h>
/*
 * Set up a thread for executing a new program
 */
int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
{
	return 0; /* MicroBlaze has no separate FPU registers */
}
#endif /* CONFIG_MMU */

void arch_cpu_idle(void)
{
       local_irq_enable();
}
Commit	Line	Data
6496a23a MS	1	/*
	2	* Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
	3	* Copyright (C) 2008-2009 PetaLogix
	4	* Copyright (C) 2006 Atmark Techno, Inc.
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10
579907e6	11	#include <linux/cpu.h>
d64af918	12	#include <linux/export.h>
6496a23a	13	#include <linux/sched.h>
b17b0153	14	#include <linux/sched/debug.h>
29930025	15	#include <linux/sched/task.h>
68db0cf1	16	#include <linux/sched/task_stack.h>
6496a23a MS	17	#include <linux/pm.h>
	18	#include <linux/tick.h>
	19	#include <linux/bitops.h>
f3268edb	20	#include <linux/ptrace.h>
6496a23a	21	#include <asm/pgalloc.h>
6bd55f0b	22	#include <linux/uaccess.h> /* for USER_DS macros */
a1f55113	23	#include <asm/cacheflush.h>
6496a23a MS	24
	25	void show_regs(struct pt_regs *regs)
	26	{
a43cb95d TH	27	show_regs_print_info(KERN_INFO);
a43cb95d TH	28
6bd55f0b MS	29	pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode);
6bd55f0b MS	30	pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
6496a23a	31	regs->r1, regs->r2, regs->r3, regs->r4);
6bd55f0b	32	pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
6496a23a	33	regs->r5, regs->r6, regs->r7, regs->r8);
6bd55f0b	34	pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
6496a23a	35	regs->r9, regs->r10, regs->r11, regs->r12);
6bd55f0b	36	pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
6496a23a	37	regs->r13, regs->r14, regs->r15, regs->r16);
6bd55f0b	38	pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
6496a23a	39	regs->r17, regs->r18, regs->r19, regs->r20);
6bd55f0b	40	pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
6496a23a	41	regs->r21, regs->r22, regs->r23, regs->r24);
6bd55f0b	42	pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
6496a23a	43	regs->r25, regs->r26, regs->r27, regs->r28);
6bd55f0b	44	pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
6496a23a	45	regs->r29, regs->r30, regs->r31, regs->pc);
6bd55f0b	46	pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
6496a23a	47	regs->msr, regs->ear, regs->esr, regs->fsr);
6496a23a MS	48	}
6496a23a MS	49
6496a23a MS	50	void (*pm_power_off)(void) = NULL;
	51	EXPORT_SYMBOL(pm_power_off);
	52
6496a23a MS	53	void flush_thread(void)
	54	{
	55	}
	56
a8fb748e	57	int copy_thread(unsigned long clone_flags, unsigned long usp,
afa86fc4	58	unsigned long arg, struct task_struct *p)
6496a23a MS	59	{
	60	struct pt_regs *childregs = task_pt_regs(p);
	61	struct thread_info *ti = task_thread_info(p);
	62
2319295d AV	63	if (unlikely(p->flags & PF_KTHREAD)) {
	64	/* if we're creating a new kernel thread then just zeroing all
	65	* the registers. That's OK for a brand new thread.*/
	66	memset(childregs, 0, sizeof(struct pt_regs));
	67	memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
	68	ti->cpu_context.r1 = (unsigned long)childregs;
	69	ti->cpu_context.r20 = (unsigned long)usp; /* fn */
	70	ti->cpu_context.r19 = (unsigned long)arg;
	71	childregs->pt_mode = 1;
	72	local_save_flags(childregs->msr);
	73	#ifdef CONFIG_MMU
	74	ti->cpu_context.msr = childregs->msr & ~MSR_IE;
	75	#endif
	76	ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
	77	return 0;
	78	}
f3268edb AV	79	childregs = current_pt_regs();
	80	if (usp)
	81	childregs->r1 = usp;
6496a23a MS	82
	83	memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
	84	ti->cpu_context.r1 = (unsigned long)childregs;
2319295d	85	#ifndef CONFIG_MMU
6496a23a	86	ti->cpu_context.msr = (unsigned long)childregs->msr;
5233806d	87	#else
2319295d	88	childregs->msr \|= MSR_UMS;
5233806d	89
5233806d MS	90	/* we should consider the fact that childregs is a copy of the parent
	91	* regs which were saved immediately after entering the kernel state
	92	* before enabling VM. This MSR will be restored in switch_to and
	93	* RETURN() and we want to have the right machine state there
	94	* specifically this state must have INTs disabled before and enabled
	95	* after performing rtbd
	96	* compose the right MSR for RETURN(). It will work for switch_to also
	97	* excepting for VM and UMS
	98	* don't touch UMS , CARRY and cache bits
	99	* right now MSR is a copy of parent one */
5233806d MS	100	childregs->msr &= ~MSR_EIP;
	101	childregs->msr \|= MSR_IE;
	102	childregs->msr &= ~MSR_VM;
	103	childregs->msr \|= MSR_VMS;
	104	childregs->msr \|= MSR_EE; /* exceptions will be enabled*/
	105
	106	ti->cpu_context.msr = (childregs->msr\|MSR_VM);
	107	ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
84ac218f	108	ti->cpu_context.msr &= ~MSR_IE;
5233806d	109	#endif
6496a23a MS	110	ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
6496a23a MS	111
d5c15f17 EI	112	/*
	113	* r21 is the thread reg, r10 is 6th arg to clone
	114	* which contains TLS area
	115	*/
6496a23a	116	if (clone_flags & CLONE_SETTLS)
d5c15f17	117	childregs->r21 = childregs->r10;
6496a23a MS	118
	119	return 0;
	120	}
	121
5233806d	122	#ifndef CONFIG_MMU
6496a23a MS	123	/*
	124	* Return saved PC of a blocked thread.
	125	*/
	126	unsigned long thread_saved_pc(struct task_struct *tsk)
	127	{
	128	struct cpu_context *ctx =
	129	&(((struct thread_info *)(tsk->stack))->cpu_context);
	130
	131	/* Check whether the thread is blocked in resume() */
	132	if (in_sched_functions(ctx->r15))
	133	return (unsigned long)ctx->r15;
	134	else
	135	return ctx->r14;
	136	}
5233806d	137	#endif
6496a23a	138
6496a23a MS	139	unsigned long get_wchan(struct task_struct *p)
	140	{
	141	/* TBD (used by procfs) */
	142	return 0;
	143	}
e1c4bd08 MS	144
	145	/* Set up a thread for executing a new program */
	146	void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
	147	{
e1c4bd08 MS	148	regs->pc = pc;
	149	regs->r1 = usp;
	150	regs->pt_mode = 0;
f1ae3f69	151	#ifdef CONFIG_MMU
866d7229	152	regs->msr \|= MSR_UMS;
99c59f60	153	regs->msr &= ~MSR_VM;
f1ae3f69	154	#endif
e1c4bd08	155	}
5233806d MS	156
	157	#ifdef CONFIG_MMU
	158	#include <linux/elfcore.h>
	159	/*
	160	* Set up a thread for executing a new program
	161	*/
	162	int dump_fpu(struct pt_regs regs, elf_fpregset_t fpregs)
	163	{
	164	return 0; /* MicroBlaze has no separate FPU registers */
	165	}
	166	#endif /* CONFIG_MMU */
a047775e MS	167
	168	void arch_cpu_idle(void)
	169	{
	170	local_irq_enable();
	171	}