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4115ac83 | 1 | /* |
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2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> |
3 | * Copyright (C) 2008-2009 PetaLogix | |
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4 | * Copyright (C) 2006 Atmark Techno, Inc. |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
11 | #ifndef _ASM_MICROBLAZE_REGISTERS_H | |
12 | #define _ASM_MICROBLAZE_REGISTERS_H | |
13 | ||
14 | #define MSR_BE (1<<0) /* 0x001 */ | |
15 | #define MSR_IE (1<<1) /* 0x002 */ | |
16 | #define MSR_C (1<<2) /* 0x004 */ | |
17 | #define MSR_BIP (1<<3) /* 0x008 */ | |
18 | #define MSR_FSL (1<<4) /* 0x010 */ | |
19 | #define MSR_ICE (1<<5) /* 0x020 */ | |
20 | #define MSR_DZ (1<<6) /* 0x040 */ | |
21 | #define MSR_DCE (1<<7) /* 0x080 */ | |
22 | #define MSR_EE (1<<8) /* 0x100 */ | |
23 | #define MSR_EIP (1<<9) /* 0x200 */ | |
24 | #define MSR_CC (1<<31) | |
25 | ||
26 | /* Floating Point Status Register (FSR) Bits */ | |
27 | #define FSR_IO (1<<4) /* Invalid operation */ | |
28 | #define FSR_DZ (1<<3) /* Divide-by-zero */ | |
29 | #define FSR_OF (1<<2) /* Overflow */ | |
30 | #define FSR_UF (1<<1) /* Underflow */ | |
31 | #define FSR_DO (1<<0) /* Denormalized operand error */ | |
32 | ||
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33 | # ifdef CONFIG_MMU |
34 | /* Machine State Register (MSR) Fields */ | |
35 | # define MSR_UM (1<<11) /* User Mode */ | |
36 | # define MSR_UMS (1<<12) /* User Mode Save */ | |
37 | # define MSR_VM (1<<13) /* Virtual Mode */ | |
38 | # define MSR_VMS (1<<14) /* Virtual Mode Save */ | |
39 | ||
40 | # define MSR_KERNEL (MSR_EE | MSR_VM) | |
41 | /* # define MSR_USER (MSR_KERNEL | MSR_UM | MSR_IE) */ | |
42 | # define MSR_KERNEL_VMS (MSR_EE | MSR_VMS) | |
43 | /* # define MSR_USER_VMS (MSR_KERNEL_VMS | MSR_UMS | MSR_IE) */ | |
44 | ||
45 | /* Exception State Register (ESR) Fields */ | |
46 | # define ESR_DIZ (1<<11) /* Zone Protection */ | |
47 | # define ESR_S (1<<10) /* Store instruction */ | |
48 | ||
49 | # endif /* CONFIG_MMU */ | |
4115ac83 | 50 | #endif /* _ASM_MICROBLAZE_REGISTERS_H */ |