Commit | Line | Data |
---|---|---|
830980a0 MS |
1 | /* |
2 | * This program is free software; you can redistribute it and/or | |
3 | * modify it under the terms of the GNU General Public License | |
4 | * as published by the Free Software Foundation; either version | |
5 | * 2 of the License, or (at your option) any later version. | |
6 | * | |
7 | * Based on powerpc version | |
8 | */ | |
9 | ||
10 | #ifndef __ASM_MICROBLAZE_PCI_H | |
11 | #define __ASM_MICROBLAZE_PCI_H | |
12 | #ifdef __KERNEL__ | |
13 | ||
14 | #include <linux/types.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/dma-mapping.h> | |
18 | #include <linux/pci.h> | |
84be456f | 19 | #include <linux/scatterlist.h> |
830980a0 | 20 | |
830980a0 MS |
21 | #include <asm/io.h> |
22 | #include <asm/prom.h> | |
23 | #include <asm/pci-bridge.h> | |
24 | ||
c74c8b1d JL |
25 | #include <asm-generic/pci-dma-compat.h> |
26 | ||
830980a0 MS |
27 | #define PCIBIOS_MIN_IO 0x1000 |
28 | #define PCIBIOS_MIN_MEM 0x10000000 | |
29 | ||
830980a0 MS |
30 | /* Values for the `which' argument to sys_pciconfig_iobase syscall. */ |
31 | #define IOBASE_BRIDGE_NUMBER 0 | |
32 | #define IOBASE_MEMORY 1 | |
33 | #define IOBASE_IO 2 | |
34 | #define IOBASE_ISA_IO 3 | |
35 | #define IOBASE_ISA_MEM 4 | |
36 | ||
37 | #define pcibios_scan_all_fns(a, b) 0 | |
38 | ||
39 | /* | |
40 | * Set this to 1 if you want the kernel to re-assign all PCI | |
41 | * bus numbers (don't do that on ppc64 yet !) | |
42 | */ | |
72bdee79 | 43 | #define pcibios_assign_all_busses() 0 |
830980a0 | 44 | |
830980a0 MS |
45 | extern int pci_domain_nr(struct pci_bus *bus); |
46 | ||
47 | /* Decide whether to display the domain number in /proc */ | |
48 | extern int pci_proc_domain(struct pci_bus *bus); | |
49 | ||
50 | struct vm_area_struct; | |
51 | /* Map a range of PCI memory or I/O space for a device into user space */ | |
52 | int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, | |
53 | enum pci_mmap_state mmap_state, int write_combine); | |
54 | ||
55 | /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ | |
56 | #define HAVE_PCI_MMAP 1 | |
57 | ||
58 | extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, | |
59 | size_t count); | |
60 | extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, | |
61 | size_t count); | |
62 | extern int pci_mmap_legacy_page_range(struct pci_bus *bus, | |
63 | struct vm_area_struct *vma, | |
64 | enum pci_mmap_state mmap_state); | |
65 | ||
66 | #define HAVE_PCI_LEGACY 1 | |
67 | ||
830980a0 MS |
68 | /* The PCI address space does equal the physical memory |
69 | * address space (no IOMMU). The IDE and SCSI device layers use | |
70 | * this boolean for bounce buffer decisions. | |
71 | */ | |
72 | #define PCI_DMA_BUS_IS_PHYS (1) | |
73 | ||
830980a0 MS |
74 | extern void pcibios_claim_one_bus(struct pci_bus *b); |
75 | ||
76 | extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); | |
77 | ||
78 | extern void pcibios_resource_survey(void); | |
79 | ||
830980a0 MS |
80 | struct file; |
81 | extern pgprot_t pci_phys_mem_access_prot(struct file *file, | |
82 | unsigned long pfn, | |
83 | unsigned long size, | |
84 | pgprot_t prot); | |
85 | ||
86 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER | |
87 | extern void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
88 | const struct resource *rsrc, | |
89 | resource_size_t *start, resource_size_t *end); | |
90 | ||
91 | extern void pcibios_setup_bus_devices(struct pci_bus *bus); | |
92 | extern void pcibios_setup_bus_self(struct pci_bus *bus); | |
93 | ||
25985edc | 94 | /* This part of code was originally in xilinx-pci.h */ |
733cc218 MS |
95 | #ifdef CONFIG_PCI_XILINX |
96 | extern void __init xilinx_pci_init(void); | |
97 | #else | |
98 | static inline void __init xilinx_pci_init(void) { return; } | |
99 | #endif | |
100 | ||
830980a0 MS |
101 | #endif /* __KERNEL__ */ |
102 | #endif /* __ASM_MICROBLAZE_PCI_H */ |