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2c572c28 | 1 | /* |
dc95be1f MS |
2 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> |
3 | * Copyright (C) 2007-2009 PetaLogix | |
2c572c28 MS |
4 | * Copyright (C) 2006 Atmark Techno, Inc. |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
11 | #ifndef _ASM_MICROBLAZE_IO_H | |
12 | #define _ASM_MICROBLAZE_IO_H | |
13 | ||
14 | #include <asm/byteorder.h> | |
15 | #include <asm/page.h> | |
16 | #include <linux/types.h> | |
dc95be1f | 17 | #include <linux/mm.h> /* Get struct page {...} */ |
2ddafeab | 18 | #include <asm-generic/iomap.h> |
dc95be1f | 19 | |
a6475c13 MS |
20 | #ifndef CONFIG_PCI |
21 | #define _IO_BASE 0 | |
22 | #define _ISA_MEM_BASE 0 | |
23 | #define PCI_DRAM_OFFSET 0 | |
24 | #else | |
25 | #define _IO_BASE isa_io_base | |
26 | #define _ISA_MEM_BASE isa_mem_base | |
27 | #define PCI_DRAM_OFFSET pci_dram_offset | |
28 | #endif | |
29 | ||
30 | extern unsigned long isa_io_base; | |
31 | extern unsigned long pci_io_base; | |
32 | extern unsigned long pci_dram_offset; | |
33 | ||
34 | extern resource_size_t isa_mem_base; | |
2c572c28 MS |
35 | |
36 | #define IO_SPACE_LIMIT (0xFFFFFFFF) | |
37 | ||
c74c8b1d JL |
38 | /* the following is needed to support PCI with some drivers */ |
39 | ||
40 | #define mmiowb() | |
41 | ||
2c572c28 MS |
42 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
43 | { | |
44 | return *(volatile unsigned char __force *)addr; | |
45 | } | |
46 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) | |
47 | { | |
48 | return *(volatile unsigned short __force *)addr; | |
49 | } | |
50 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) | |
51 | { | |
52 | return *(volatile unsigned int __force *)addr; | |
53 | } | |
54 | static inline unsigned long __raw_readq(const volatile void __iomem *addr) | |
55 | { | |
56 | return *(volatile unsigned long __force *)addr; | |
57 | } | |
58 | static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) | |
59 | { | |
60 | *(volatile unsigned char __force *)addr = v; | |
61 | } | |
62 | static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) | |
63 | { | |
64 | *(volatile unsigned short __force *)addr = v; | |
65 | } | |
66 | static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) | |
67 | { | |
68 | *(volatile unsigned int __force *)addr = v; | |
69 | } | |
70 | static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) | |
71 | { | |
72 | *(volatile unsigned long __force *)addr = v; | |
73 | } | |
74 | ||
75 | /* | |
76 | * read (readb, readw, readl, readq) and write (writeb, writew, | |
25985edc | 77 | * writel, writeq) accessors are for PCI and thus little endian. |
2c572c28 MS |
78 | * Linux 2.4 for Microblaze had this wrong. |
79 | */ | |
80 | static inline unsigned char readb(const volatile void __iomem *addr) | |
81 | { | |
82 | return *(volatile unsigned char __force *)addr; | |
83 | } | |
84 | static inline unsigned short readw(const volatile void __iomem *addr) | |
85 | { | |
86 | return le16_to_cpu(*(volatile unsigned short __force *)addr); | |
87 | } | |
88 | static inline unsigned int readl(const volatile void __iomem *addr) | |
89 | { | |
90 | return le32_to_cpu(*(volatile unsigned int __force *)addr); | |
91 | } | |
92 | static inline void writeb(unsigned char v, volatile void __iomem *addr) | |
93 | { | |
94 | *(volatile unsigned char __force *)addr = v; | |
95 | } | |
96 | static inline void writew(unsigned short v, volatile void __iomem *addr) | |
97 | { | |
98 | *(volatile unsigned short __force *)addr = cpu_to_le16(v); | |
99 | } | |
100 | static inline void writel(unsigned int v, volatile void __iomem *addr) | |
101 | { | |
102 | *(volatile unsigned int __force *)addr = cpu_to_le32(v); | |
103 | } | |
104 | ||
105 | /* ioread and iowrite variants. thease are for now same as __raw_ | |
106 | * variants of accessors. we might check for endianess in the feature | |
107 | */ | |
108 | #define ioread8(addr) __raw_readb((u8 *)(addr)) | |
109 | #define ioread16(addr) __raw_readw((u16 *)(addr)) | |
110 | #define ioread32(addr) __raw_readl((u32 *)(addr)) | |
111 | #define iowrite8(v, addr) __raw_writeb((u8)(v), (u8 *)(addr)) | |
112 | #define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr)) | |
113 | #define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr)) | |
114 | ||
7a325aa2 JL |
115 | #define ioread16be(addr) __raw_readw((u16 *)(addr)) |
116 | #define ioread32be(addr) __raw_readl((u32 *)(addr)) | |
117 | #define iowrite16be(v, addr) __raw_writew((u16)(v), (u16 *)(addr)) | |
118 | #define iowrite32be(v, addr) __raw_writel((u32)(v), (u32 *)(addr)) | |
119 | ||
2c572c28 MS |
120 | /* These are the definitions for the x86 IO instructions |
121 | * inb/inw/inl/outb/outw/outl, the "string" versions | |
122 | * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions | |
123 | * inb_p/inw_p/... | |
124 | * The macros don't do byte-swapping. | |
125 | */ | |
126 | #define inb(port) readb((u8 *)((port))) | |
127 | #define outb(val, port) writeb((val), (u8 *)((unsigned long)(port))) | |
128 | #define inw(port) readw((u16 *)((port))) | |
129 | #define outw(val, port) writew((val), (u16 *)((unsigned long)(port))) | |
130 | #define inl(port) readl((u32 *)((port))) | |
131 | #define outl(val, port) writel((val), (u32 *)((unsigned long)(port))) | |
132 | ||
133 | #define inb_p(port) inb((port)) | |
134 | #define outb_p(val, port) outb((val), (port)) | |
135 | #define inw_p(port) inw((port)) | |
136 | #define outw_p(val, port) outw((val), (port)) | |
137 | #define inl_p(port) inl((port)) | |
138 | #define outl_p(val, port) outl((val), (port)) | |
139 | ||
140 | #define memset_io(a, b, c) memset((void *)(a), (b), (c)) | |
141 | #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) | |
142 | #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) | |
143 | ||
dc95be1f MS |
144 | #ifdef CONFIG_MMU |
145 | ||
dc95be1f MS |
146 | #define phys_to_virt(addr) ((void *)__phys_to_virt(addr)) |
147 | #define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr)) | |
148 | #define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr)) | |
149 | ||
dc95be1f MS |
150 | #define page_to_bus(page) (page_to_phys(page)) |
151 | #define bus_to_virt(addr) (phys_to_virt(addr)) | |
152 | ||
6bd55f0b | 153 | extern void iounmap(void __iomem *addr); |
dc95be1f MS |
154 | /*extern void *__ioremap(phys_addr_t address, unsigned long size, |
155 | unsigned long flags);*/ | |
156 | extern void __iomem *ioremap(phys_addr_t address, unsigned long size); | |
157 | #define ioremap_writethrough(addr, size) ioremap((addr), (size)) | |
158 | #define ioremap_nocache(addr, size) ioremap((addr), (size)) | |
159 | #define ioremap_fullcache(addr, size) ioremap((addr), (size)) | |
160 | ||
161 | #else /* CONFIG_MMU */ | |
162 | ||
2c572c28 MS |
163 | /** |
164 | * virt_to_phys - map virtual addresses to physical | |
165 | * @address: address to remap | |
166 | * | |
167 | * The returned physical address is the physical (CPU) mapping for | |
168 | * the memory address given. It is only valid to use this function on | |
169 | * addresses directly mapped or allocated via kmalloc. | |
170 | * | |
171 | * This function does not give bus mappings for DMA transfers. In | |
172 | * almost all conceivable cases a device driver should not be using | |
173 | * this function | |
174 | */ | |
175 | static inline unsigned long __iomem virt_to_phys(volatile void *address) | |
176 | { | |
177 | return __pa((unsigned long)address); | |
178 | } | |
179 | ||
180 | #define virt_to_bus virt_to_phys | |
181 | ||
182 | /** | |
183 | * phys_to_virt - map physical address to virtual | |
184 | * @address: address to remap | |
185 | * | |
186 | * The returned virtual address is a current CPU mapping for | |
187 | * the memory address given. It is only valid to use this function on | |
188 | * addresses that have a kernel mapping | |
189 | * | |
190 | * This function does not handle bus mappings for DMA transfers. In | |
191 | * almost all conceivable cases a device driver should not be using | |
192 | * this function | |
193 | */ | |
194 | static inline void *phys_to_virt(unsigned long address) | |
195 | { | |
196 | return (void *)__va(address); | |
197 | } | |
198 | ||
199 | #define bus_to_virt(a) phys_to_virt(a) | |
200 | ||
201 | static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size, | |
202 | unsigned long flags) | |
203 | { | |
204 | return (void *)address; | |
205 | } | |
206 | ||
207 | #define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr)) | |
208 | #define iounmap(addr) ((void)0) | |
209 | #define ioremap_nocache(physaddr, size) ioremap(physaddr, size) | |
210 | ||
dc95be1f MS |
211 | #endif /* CONFIG_MMU */ |
212 | ||
2c572c28 MS |
213 | /* |
214 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
215 | * access | |
216 | */ | |
217 | #define xlate_dev_mem_ptr(p) __va(p) | |
218 | ||
219 | /* | |
220 | * Convert a virtual cached pointer to an uncached pointer | |
221 | */ | |
222 | #define xlate_dev_kmem_ptr(p) p | |
223 | ||
224 | /* | |
225 | * Big Endian | |
226 | */ | |
227 | #define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a)) | |
228 | #define out_be16(a, v) __raw_writew((v), (a)) | |
229 | ||
230 | #define in_be32(a) __raw_readl((const void __iomem __force *)(a)) | |
231 | #define in_be16(a) __raw_readw(a) | |
232 | ||
afc26cb3 JZ |
233 | #define writel_be(v, a) out_be32((__force unsigned *)a, v) |
234 | #define readl_be(a) in_be32((__force unsigned *)a) | |
235 | ||
2c572c28 MS |
236 | /* |
237 | * Little endian | |
238 | */ | |
239 | ||
83b4d17d | 240 | #define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a)) |
2c572c28 MS |
241 | #define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a)) |
242 | ||
243 | #define in_le32(a) __le32_to_cpu(__raw_readl(a)) | |
244 | #define in_le16(a) __le16_to_cpu(__raw_readw(a)) | |
245 | ||
246 | /* Byte ops */ | |
247 | #define out_8(a, v) __raw_writeb((v), (a)) | |
248 | #define in_8(a) __raw_readb(a) | |
249 | ||
ac2e7c92 MS |
250 | #define mmiowb() |
251 | ||
2ddafeab MS |
252 | #define ioport_map(port, nr) ((void __iomem *)(port)) |
253 | #define ioport_unmap(addr) | |
2c572c28 | 254 | |
9998517a MS |
255 | /* from asm-generic/io.h */ |
256 | #ifndef insb | |
257 | static inline void insb(unsigned long addr, void *buffer, int count) | |
258 | { | |
259 | if (count) { | |
260 | u8 *buf = buffer; | |
261 | do { | |
262 | u8 x = inb(addr); | |
263 | *buf++ = x; | |
264 | } while (--count); | |
265 | } | |
266 | } | |
267 | #endif | |
268 | ||
269 | #ifndef insw | |
270 | static inline void insw(unsigned long addr, void *buffer, int count) | |
271 | { | |
272 | if (count) { | |
273 | u16 *buf = buffer; | |
274 | do { | |
275 | u16 x = inw(addr); | |
276 | *buf++ = x; | |
277 | } while (--count); | |
278 | } | |
279 | } | |
280 | #endif | |
281 | ||
282 | #ifndef insl | |
283 | static inline void insl(unsigned long addr, void *buffer, int count) | |
284 | { | |
285 | if (count) { | |
286 | u32 *buf = buffer; | |
287 | do { | |
288 | u32 x = inl(addr); | |
289 | *buf++ = x; | |
290 | } while (--count); | |
291 | } | |
292 | } | |
293 | #endif | |
294 | ||
295 | #ifndef outsb | |
296 | static inline void outsb(unsigned long addr, const void *buffer, int count) | |
297 | { | |
298 | if (count) { | |
299 | const u8 *buf = buffer; | |
300 | do { | |
301 | outb(*buf++, addr); | |
302 | } while (--count); | |
303 | } | |
304 | } | |
305 | #endif | |
306 | ||
307 | #ifndef outsw | |
308 | static inline void outsw(unsigned long addr, const void *buffer, int count) | |
309 | { | |
310 | if (count) { | |
311 | const u16 *buf = buffer; | |
312 | do { | |
313 | outw(*buf++, addr); | |
314 | } while (--count); | |
315 | } | |
316 | } | |
317 | #endif | |
318 | ||
319 | #ifndef outsl | |
320 | static inline void outsl(unsigned long addr, const void *buffer, int count) | |
321 | { | |
322 | if (count) { | |
323 | const u32 *buf = buffer; | |
324 | do { | |
325 | outl(*buf++, addr); | |
326 | } while (--count); | |
327 | } | |
328 | } | |
329 | #endif | |
330 | ||
331 | #define ioread8_rep(p, dst, count) \ | |
332 | insb((unsigned long) (p), (dst), (count)) | |
333 | #define ioread16_rep(p, dst, count) \ | |
334 | insw((unsigned long) (p), (dst), (count)) | |
335 | #define ioread32_rep(p, dst, count) \ | |
336 | insl((unsigned long) (p), (dst), (count)) | |
337 | ||
338 | #define iowrite8_rep(p, src, count) \ | |
339 | outsb((unsigned long) (p), (src), (count)) | |
340 | #define iowrite16_rep(p, src, count) \ | |
341 | outsw((unsigned long) (p), (src), (count)) | |
342 | #define iowrite32_rep(p, src, count) \ | |
343 | outsl((unsigned long) (p), (src), (count)) | |
344 | ||
2c572c28 | 345 | #endif /* _ASM_MICROBLAZE_IO_H */ |