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406107da MS |
1 | /* |
2 | * Generic support for queying CPU info | |
3 | * | |
4 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> | |
5 | * Copyright (C) 2007-2009 PetaLogix | |
6 | * Copyright (C) 2007 John Williams <jwilliams@itee.uq.edu.au> | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General | |
9 | * Public License. See the file COPYING in the main directory of this | |
10 | * archive for more details. | |
11 | */ | |
12 | ||
13 | #ifndef _ASM_MICROBLAZE_CPUINFO_H | |
14 | #define _ASM_MICROBLAZE_CPUINFO_H | |
15 | ||
16 | #include <asm/prom.h> | |
17 | ||
18 | /* CPU Version and FPGA Family code conversion table type */ | |
19 | struct cpu_ver_key { | |
20 | const char *s; | |
21 | const unsigned k; | |
22 | }; | |
23 | ||
24 | extern const struct cpu_ver_key cpu_ver_lookup[]; | |
25 | ||
26 | struct family_string_key { | |
27 | const char *s; | |
28 | const unsigned k; | |
29 | }; | |
30 | ||
31 | extern const struct family_string_key family_string_lookup[]; | |
32 | ||
33 | struct cpuinfo { | |
34 | /* Core CPU configuration */ | |
35 | u32 use_instr; | |
36 | u32 use_mult; | |
37 | u32 use_fpu; | |
38 | u32 use_exc; | |
39 | u32 ver_code; | |
40 | u32 mmu; | |
8904976e | 41 | u32 mmu_privins; |
8e2ad016 | 42 | u32 endian; |
406107da MS |
43 | |
44 | /* CPU caches */ | |
45 | u32 use_icache; | |
46 | u32 icache_tagbits; | |
47 | u32 icache_write; | |
44e4e196 | 48 | u32 icache_line_length; |
406107da MS |
49 | u32 icache_size; |
50 | unsigned long icache_base; | |
51 | unsigned long icache_high; | |
52 | ||
53 | u32 use_dcache; | |
54 | u32 dcache_tagbits; | |
55 | u32 dcache_write; | |
44e4e196 | 56 | u32 dcache_line_length; |
406107da | 57 | u32 dcache_size; |
e051af57 | 58 | u32 dcache_wb; |
406107da MS |
59 | unsigned long dcache_base; |
60 | unsigned long dcache_high; | |
61 | ||
62 | /* Bus connections */ | |
63 | u32 use_dopb; | |
64 | u32 use_iopb; | |
65 | u32 use_dlmb; | |
66 | u32 use_ilmb; | |
67 | u32 num_fsl; | |
68 | ||
69 | /* CPU interrupt line info */ | |
70 | u32 irq_edge; | |
71 | u32 irq_positive; | |
72 | ||
73 | u32 area_optimised; | |
74 | ||
75 | /* HW debug support */ | |
76 | u32 hw_debug; | |
77 | u32 num_pc_brk; | |
78 | u32 num_rd_brk; | |
79 | u32 num_wr_brk; | |
80 | u32 cpu_clock_freq; /* store real freq of cpu */ | |
406107da MS |
81 | |
82 | /* FPGA family */ | |
83 | u32 fpga_family_code; | |
84 | ||
85 | /* User define */ | |
86 | u32 pvr_user1; | |
87 | u32 pvr_user2; | |
88 | }; | |
89 | ||
90 | extern struct cpuinfo cpuinfo; | |
91 | ||
92 | /* fwd declarations of the various CPUinfo populators */ | |
93 | void setup_cpuinfo(void); | |
94 | ||
95 | void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu); | |
96 | void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu); | |
97 | ||
98 | static inline unsigned int fcpu(struct device_node *cpu, char *n) | |
99 | { | |
8afe3839 MS |
100 | const __be32 *val; |
101 | return (val = of_get_property(cpu, n, NULL)) ? | |
02b08045 | 102 | be32_to_cpup(val) : 0; |
406107da MS |
103 | } |
104 | ||
105 | #endif /* _ASM_MICROBLAZE_CPUINFO_H */ |