treewide: Add SPDX license identifier - Makefile/Kconfig
[linux-2.6-block.git] / arch / microblaze / Kconfig
CommitLineData
ec8f24b7 1# SPDX-License-Identifier: GPL-2.0-only
575ca288
MS
2config MICROBLAZE
3 def_bool y
942fa985 4 select ARCH_32BIT_OFF_T
17c46a6a 5 select ARCH_NO_SWAP
58b04406 6 select ARCH_HAS_DMA_COHERENT_TO_PFN if MMU
957e3fac 7 select ARCH_HAS_GCOV_PROFILE_ALL
5411ad27
CH
8 select ARCH_HAS_SYNC_DMA_FOR_CPU
9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
355f65a3 10 select ARCH_MIGHT_HAVE_PC_PARPORT
07c75d7a 11 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
c1d7e01d 12 select ARCH_WANT_IPC_PARSE_VERSION
25213388 13 select BUILDTIME_EXTABLE_SORT
bb0eb050 14 select TIMER_OF
25213388
MS
15 select CLONE_BACKWARDS3
16 select COMMON_CLK
17 select GENERIC_ATOMIC64
18 select GENERIC_CLOCKEVENTS
19 select GENERIC_CPU_DEVICES
20 select GENERIC_IDLE_POLL_SETUP
b6e31629 21 select GENERIC_IRQ_PROBE
9d61c18b 22 select GENERIC_IRQ_SHOW
1b34d160 23 select GENERIC_PCI_IOMAP
839396ab 24 select GENERIC_SCHED_CLOCK
7b13277b 25 select HAVE_ARCH_HASH
25213388
MS
26 select HAVE_ARCH_KGDB
27 select HAVE_DEBUG_KMEMLEAK
25213388
MS
28 select HAVE_DYNAMIC_FTRACE
29 select HAVE_FTRACE_MCOUNT_RECORD
30 select HAVE_FUNCTION_GRAPH_TRACER
25213388 31 select HAVE_FUNCTION_TRACER
25213388
MS
32 select HAVE_MEMBLOCK_NODE_MAP
33 select HAVE_OPROFILE
eb01d42a 34 select HAVE_PCI
25213388 35 select IRQ_DOMAIN
0547dc78 36 select XILINX_INTC
786d35d4 37 select MODULES_USE_ELF_RELA
25213388
MS
38 select OF
39 select OF_EARLY_FLATTREE
2eac9c2d 40 select PCI_DOMAINS_GENERIC if PCI
20f1b79d 41 select PCI_SYSCALL if PCI
25213388
MS
42 select TRACING_SUPPORT
43 select VIRT_TO_BUS
fff7fb0b 44 select CPU_NO_EFFICIENT_FFS
6137fed0 45 select MMU_GATHER_NO_RANGE if MMU
575ca288 46
206d3642
BM
47# Endianness selection
48choice
49 prompt "Endianness selection"
428dbf15 50 default CPU_LITTLE_ENDIAN
206d3642
BM
51 help
52 microblaze architectures can be configured for either little or
53 big endian formats. Be sure to select the appropriate mode.
54
55config CPU_BIG_ENDIAN
56 bool "Big endian"
57
58config CPU_LITTLE_ENDIAN
59 bool "Little endian"
60
61endchoice
62
4e2e4124
MS
63config ZONE_DMA
64 def_bool y
65
575ca288
MS
66config ARCH_HAS_ILOG2_U32
67 def_bool n
68
69config ARCH_HAS_ILOG2_U64
70 def_bool n
71
575ca288
MS
72config GENERIC_HWEIGHT
73 def_bool y
74
575ca288
MS
75config GENERIC_CALIBRATE_DELAY
76 def_bool y
77
14f87389
RLB
78config GENERIC_CSUM
79 def_bool y
80
24b45a12
MS
81config STACKTRACE_SUPPORT
82 def_bool y
83
bf2d8096
MS
84config LOCKDEP_SUPPORT
85 def_bool y
86
c24cf712 87source "arch/microblaze/Kconfig.platform"
575ca288
MS
88
89menu "Processor type and features"
90
575ca288
MS
91source "kernel/Kconfig.hz"
92
93config MMU
a116f6d5
MS
94 bool "MMU support"
95 default n
575ca288 96
575ca288
MS
97comment "Boot options"
98
99config CMDLINE_BOOL
100 bool "Default bootloader kernel arguments"
101
102config CMDLINE
103 string "Default kernel command string"
104 depends on CMDLINE_BOOL
105 default "console=ttyUL0,115200"
106 help
107 On some architectures there is currently no way for the boot loader
108 to pass arguments to the kernel. For these architectures, you should
109 supply some command-line options at build time by entering them
110 here.
111
112config CMDLINE_FORCE
113 bool "Force default kernel command string"
114 depends on CMDLINE_BOOL
115 default n
116 help
117 Set this to have arguments from the default kernel command string
118 override those passed by the boot loader.
119
68c6ac33
MS
120config SECCOMP
121 bool "Enable seccomp to safely compute untrusted bytecode"
122 depends on PROC_FS
123 default y
124 help
125 This kernel feature is useful for number crunching applications
126 that may need to compute untrusted bytecode during their
127 execution. By using pipes or other transports made available to
128 the process as file descriptors supporting the read/write
129 syscalls, it's possible to isolate those applications in
130 their own address space using seccomp. Once seccomp is
131 enabled via /proc/<pid>/seccomp, it cannot be disabled
132 and the task is only allowed to execute a few safe syscalls
133 defined by each seccomp mode.
134
135 If unsure, say Y. Only embedded should say N here.
136
575ca288
MS
137endmenu
138
b408e2c2 139menu "Kernel features"
a116f6d5 140
4cbbbb43
MS
141config NR_CPUS
142 int
143 default "1"
144
a116f6d5
MS
145config ADVANCED_OPTIONS
146 bool "Prompt for advanced kernel configuration options"
a116f6d5
MS
147 help
148 This option will enable prompting for a variety of advanced kernel
149 configuration options. These options can cause the kernel to not
150 work if they are set incorrectly, but can be used to optimize certain
151 aspects of kernel memory management.
152
153 Unless you know what you are doing, say N here.
154
155comment "Default settings for advanced configuration options are used"
156 depends on !ADVANCED_OPTIONS
157
3a0d7a4d
MS
158config XILINX_UNCACHED_SHADOW
159 bool "Are you using uncached shadow for RAM ?"
160 depends on ADVANCED_OPTIONS && !MMU
161 default n
162 help
163 This is needed to be able to allocate uncachable memory regions.
164 The feature requires the design to define the RAM memory controller
165 window to be twice as large as the actual physical memory.
166
2f2f371f
MS
167config HIGHMEM
168 bool "High memory support"
a116f6d5 169 depends on MMU
a116f6d5 170 help
2f2f371f
MS
171 The address space of Microblaze processors is only 4 Gigabytes large
172 and it has to accommodate user address space, kernel address
173 space as well as some memory mapped IO. That means that, if you
174 have a large amount of physical memory and/or IO, not all of the
175 memory can be "permanently mapped" by the kernel. The physical
176 memory that is not permanently mapped is called "high memory".
a116f6d5 177
2f2f371f 178 If unsure, say n.
a116f6d5
MS
179
180config LOWMEM_SIZE_BOOL
181 bool "Set maximum low memory"
b8a84059 182 depends on ADVANCED_OPTIONS && MMU
a116f6d5
MS
183 help
184 This option allows you to set the maximum amount of memory which
185 will be used as "low memory", that is, memory which the kernel can
186 access directly, without having to set up a kernel virtual mapping.
187 This can be useful in optimizing the layout of kernel virtual
188 memory.
189
190 Say N here unless you know what you are doing.
191
192config LOWMEM_SIZE
193 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
a116f6d5
MS
194 default "0x30000000"
195
0b9b0200
MS
196config MANUAL_RESET_VECTOR
197 hex "Microblaze reset vector address setup"
198 default "0x0"
199 help
200 Set this option to have the kernel override the CPU Reset vector.
201 If zero, no change will be made to the MicroBlaze reset vector at
202 address 0x0.
203 If non-zero, a jump instruction to this address, will be written
204 to the reset vector at address 0x0.
205 If you are unsure, set it to default value 0x0.
206
a116f6d5
MS
207config KERNEL_START_BOOL
208 bool "Set custom kernel base address"
209 depends on ADVANCED_OPTIONS
210 help
211 This option allows you to set the kernel virtual address at which
212 the kernel will map low memory (the kernel image will be linked at
213 this address). This can be useful in optimizing the virtual memory
214 layout of the system.
215
216 Say N here unless you know what you are doing.
217
218config KERNEL_START
219 hex "Virtual address of kernel base" if KERNEL_START_BOOL
220 default "0xc0000000" if MMU
221 default KERNEL_BASE_ADDR if !MMU
222
223config TASK_SIZE_BOOL
224 bool "Set custom user task size"
b8a84059 225 depends on ADVANCED_OPTIONS && MMU
a116f6d5
MS
226 help
227 This option allows you to set the amount of virtual address space
228 allocated to user tasks. This can be useful in optimizing the
229 virtual memory layout of the system.
230
231 Say N here unless you know what you are doing.
232
233config TASK_SIZE
234 hex "Size of user task space" if TASK_SIZE_BOOL
a116f6d5
MS
235 default "0x80000000"
236
ba9c4f88
SM
237choice
238 prompt "Page size"
239 default MICROBLAZE_4K_PAGES
240 depends on ADVANCED_OPTIONS && !MMU
241 help
242 Select the kernel logical page size. Increasing the page size
243 will reduce software overhead at each page boundary, allow
244 hardware prefetch mechanisms to be more effective, and allow
245 larger dma transfers increasing IO efficiency and reducing
246 overhead. However the utilization of memory will increase.
247 For example, each cached file will using a multiple of the
248 page size to hold its contents and the difference between the
249 end of file and the end of page is wasted.
250
251 If unsure, choose 4K_PAGES.
252
253config MICROBLAZE_4K_PAGES
254 bool "4k page size"
255
ba9c4f88
SM
256config MICROBLAZE_16K_PAGES
257 bool "16k page size"
258
6e80cff5
MS
259config MICROBLAZE_64K_PAGES
260 bool "64k page size"
ba9c4f88
SM
261
262endchoice
263
575ca288
MS
264endmenu
265
a6475c13
MS
266menu "Bus Options"
267
733cc218
MS
268config PCI_XILINX
269 bool "Xilinx PCI host bridge support"
270 depends on PCI
271
a6475c13 272endmenu