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027f891f JH |
1 | /* |
2 | * tbiroot.S | |
3 | * | |
4 | * Copyright (C) 2001, 2002, 2012 Imagination Technologies. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it under | |
7 | * the terms of the GNU General Public License version 2 as published by the | |
8 | * Free Software Foundation. | |
9 | * | |
10 | * Module that creates and via ___TBI function returns a TBI Root Block for | |
11 | * interrupt and background processing on the current thread. | |
12 | */ | |
13 | ||
14 | .file "tbiroot.S" | |
15 | #include <asm/metag_regs.h> | |
16 | ||
17 | /* | |
18 | * Get data structures and defines from the TBI C header | |
19 | */ | |
20 | #include <asm/tbx.h> | |
21 | ||
22 | ||
23 | /* If signals need to be exchanged we must create a TBI Root Block */ | |
24 | ||
25 | .data | |
26 | .balign 8 | |
27 | .global ___pTBIs | |
28 | .type ___pTBIs,object | |
29 | ___pTBIs: | |
30 | .long 0 /* Bgnd+Int root block ptrs */ | |
31 | .long 0 | |
32 | .size ___pTBIs,.-___pTBIs | |
33 | ||
34 | ||
35 | /* | |
36 | * Return ___pTBIs value specific to execution level with promotion/demotion | |
37 | * | |
38 | * Register Usage: D1Ar1 is Id, D0Re0 is the primary result | |
39 | * D1Re0 is secondary result (___pTBIs for other exec level) | |
40 | */ | |
41 | .text | |
42 | .balign 4 | |
43 | .global ___TBI | |
44 | .type ___TBI,function | |
45 | ___TBI: | |
46 | TSTT D1Ar1,#HI(TBID_ISTAT_BIT) /* Bgnd or Int level? */ | |
47 | MOVT A1LbP,#HI(___pTBIs) | |
48 | ADD A1LbP,A1LbP,#LO(___pTBIs) | |
49 | GETL D0Re0,D1Re0,[A1LbP] /* Base of root block table */ | |
50 | SWAPNZ D0Re0,D1Re0 /* Swap if asked */ | |
51 | MOV PC,D1RtP | |
52 | .size ___TBI,.-___TBI | |
53 | ||
54 | ||
55 | /* | |
56 | * Return identifier of the current thread in TBI segment or signal format with | |
57 | * secondary mask to indicate privilege and interrupt level of thread | |
58 | */ | |
59 | .text | |
60 | .balign 4 | |
61 | .global ___TBIThrdPrivId | |
62 | .type ___TBIThrdPrivId,function | |
63 | ___TBIThrdPrivId: | |
64 | .global ___TBIThreadId | |
65 | .type ___TBIThreadId,function | |
66 | ___TBIThreadId: | |
67 | #ifndef METAC_0_1 | |
68 | MOV D1Re0,TXSTATUS /* Are we privileged or int? */ | |
69 | MOV D0Re0,TXENABLE /* Which thread are we? */ | |
70 | /* Disable privilege adaption for now */ | |
71 | ANDT D1Re0,D1Re0,#HI(TXSTATUS_ISTAT_BIT) /* +TXSTATUS_PSTAT_BIT) */ | |
72 | LSL D1Re0,D1Re0,#TBID_ISTAT_S-TXSTATUS_ISTAT_S | |
73 | AND D0Re0,D0Re0,#TXENABLE_THREAD_BITS | |
74 | LSL D0Re0,D0Re0,#TBID_THREAD_S-TXENABLE_THREAD_S | |
75 | #else | |
76 | /* Thread 0 only */ | |
77 | XOR D0Re0,D0Re0,D0Re0 | |
78 | XOR D1Re0,D1Re0,D1Re0 | |
79 | #endif | |
80 | MOV PC,D1RtP /* Return */ | |
81 | .size ___TBIThrdPrivId,.-___TBIThrdPrivId | |
82 | .size ___TBIThreadId,.-___TBIThreadId | |
83 | ||
84 | ||
85 | /* | |
86 | * End of tbiroot.S | |
87 | */ |