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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
f30c2269 | 3 | * linux/arch/m68k/mm/motorola.c |
1da177e4 LT |
4 | * |
5 | * Routines specific to the Motorola MMU, originally from: | |
6 | * linux/arch/m68k/init.c | |
7 | * which are Copyright (C) 1995 Hamish Macdonald | |
8 | * | |
9 | * Moved 8/20/1999 Sam Creasey | |
10 | */ | |
11 | ||
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/signal.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/mm.h> | |
16 | #include <linux/swap.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/string.h> | |
19 | #include <linux/types.h> | |
20 | #include <linux/init.h> | |
1008a115 | 21 | #include <linux/memblock.h> |
5a0e3ad6 | 22 | #include <linux/gfp.h> |
1da177e4 LT |
23 | |
24 | #include <asm/setup.h> | |
7c0f6ba6 | 25 | #include <linux/uaccess.h> |
1da177e4 LT |
26 | #include <asm/page.h> |
27 | #include <asm/pgalloc.h> | |
1da177e4 LT |
28 | #include <asm/machdep.h> |
29 | #include <asm/io.h> | |
30 | #include <asm/dma.h> | |
31 | #ifdef CONFIG_ATARI | |
32 | #include <asm/atari_stram.h> | |
33 | #endif | |
c85627fb | 34 | #include <asm/sections.h> |
1da177e4 LT |
35 | |
36 | #undef DEBUG | |
37 | ||
38 | #ifndef mm_cachebits | |
39 | /* | |
40 | * Bits to add to page descriptors for "normal" caching mode. | |
41 | * For 68020/030 this is 0. | |
42 | * For 68040, this is _PAGE_CACHE040 (cachable, copyback) | |
43 | */ | |
44 | unsigned long mm_cachebits; | |
45 | EXPORT_SYMBOL(mm_cachebits); | |
46 | #endif | |
47 | ||
12d810c1 | 48 | /* size of memory already mapped in head.S */ |
486df8bc | 49 | extern __initdata unsigned long m68k_init_mapped_size; |
12d810c1 RZ |
50 | |
51 | extern unsigned long availmem; | |
52 | ||
1da177e4 LT |
53 | static pte_t * __init kernel_page_table(void) |
54 | { | |
55 | pte_t *ptablep; | |
56 | ||
e8625dce | 57 | ptablep = (pte_t *)memblock_alloc_low(PAGE_SIZE, PAGE_SIZE); |
1da177e4 LT |
58 | |
59 | clear_page(ptablep); | |
60 | __flush_page_to_ram(ptablep); | |
61 | flush_tlb_kernel_page(ptablep); | |
62 | nocache_page(ptablep); | |
63 | ||
64 | return ptablep; | |
65 | } | |
66 | ||
67 | static pmd_t *last_pgtable __initdata = NULL; | |
68 | pmd_t *zero_pgtable __initdata = NULL; | |
69 | ||
70 | static pmd_t * __init kernel_ptr_table(void) | |
71 | { | |
72 | if (!last_pgtable) { | |
73 | unsigned long pmd, last; | |
74 | int i; | |
75 | ||
76 | /* Find the last ptr table that was used in head.S and | |
77 | * reuse the remaining space in that page for further | |
78 | * ptr tables. | |
79 | */ | |
80 | last = (unsigned long)kernel_pg_dir; | |
81 | for (i = 0; i < PTRS_PER_PGD; i++) { | |
82 | if (!pgd_present(kernel_pg_dir[i])) | |
83 | continue; | |
84 | pmd = __pgd_page(kernel_pg_dir[i]); | |
85 | if (pmd > last) | |
86 | last = pmd; | |
87 | } | |
88 | ||
89 | last_pgtable = (pmd_t *)last; | |
90 | #ifdef DEBUG | |
91 | printk("kernel_ptr_init: %p\n", last_pgtable); | |
92 | #endif | |
93 | } | |
94 | ||
95 | last_pgtable += PTRS_PER_PMD; | |
96 | if (((unsigned long)last_pgtable & ~PAGE_MASK) == 0) { | |
e8625dce MR |
97 | last_pgtable = (pmd_t *)memblock_alloc_low(PAGE_SIZE, |
98 | PAGE_SIZE); | |
1da177e4 LT |
99 | |
100 | clear_page(last_pgtable); | |
101 | __flush_page_to_ram(last_pgtable); | |
102 | flush_tlb_kernel_page(last_pgtable); | |
103 | nocache_page(last_pgtable); | |
104 | } | |
105 | ||
106 | return last_pgtable; | |
107 | } | |
108 | ||
12d810c1 | 109 | static void __init map_node(int node) |
1da177e4 LT |
110 | { |
111 | #define PTRTREESIZE (256*1024) | |
112 | #define ROOTTREESIZE (32*1024*1024) | |
12d810c1 | 113 | unsigned long physaddr, virtaddr, size; |
1da177e4 LT |
114 | pgd_t *pgd_dir; |
115 | pmd_t *pmd_dir; | |
116 | pte_t *pte_dir; | |
117 | ||
12d810c1 RZ |
118 | size = m68k_memory[node].size; |
119 | physaddr = m68k_memory[node].addr; | |
120 | virtaddr = (unsigned long)phys_to_virt(physaddr); | |
121 | physaddr |= m68k_supervisor_cachemode | | |
122 | _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY; | |
1da177e4 LT |
123 | if (CPU_IS_040_OR_060) |
124 | physaddr |= _PAGE_GLOBAL040; | |
125 | ||
126 | while (size > 0) { | |
127 | #ifdef DEBUG | |
128 | if (!(virtaddr & (PTRTREESIZE-1))) | |
129 | printk ("\npa=%#lx va=%#lx ", physaddr & PAGE_MASK, | |
130 | virtaddr); | |
131 | #endif | |
132 | pgd_dir = pgd_offset_k(virtaddr); | |
133 | if (virtaddr && CPU_IS_020_OR_030) { | |
134 | if (!(virtaddr & (ROOTTREESIZE-1)) && | |
135 | size >= ROOTTREESIZE) { | |
136 | #ifdef DEBUG | |
137 | printk ("[very early term]"); | |
138 | #endif | |
139 | pgd_val(*pgd_dir) = physaddr; | |
140 | size -= ROOTTREESIZE; | |
141 | virtaddr += ROOTTREESIZE; | |
142 | physaddr += ROOTTREESIZE; | |
143 | continue; | |
144 | } | |
145 | } | |
146 | if (!pgd_present(*pgd_dir)) { | |
147 | pmd_dir = kernel_ptr_table(); | |
148 | #ifdef DEBUG | |
149 | printk ("[new pointer %p]", pmd_dir); | |
150 | #endif | |
151 | pgd_set(pgd_dir, pmd_dir); | |
152 | } else | |
153 | pmd_dir = pmd_offset(pgd_dir, virtaddr); | |
154 | ||
155 | if (CPU_IS_020_OR_030) { | |
156 | if (virtaddr) { | |
157 | #ifdef DEBUG | |
158 | printk ("[early term]"); | |
159 | #endif | |
160 | pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr; | |
161 | physaddr += PTRTREESIZE; | |
162 | } else { | |
163 | int i; | |
164 | #ifdef DEBUG | |
165 | printk ("[zero map]"); | |
166 | #endif | |
167 | zero_pgtable = kernel_ptr_table(); | |
168 | pte_dir = (pte_t *)zero_pgtable; | |
169 | pmd_dir->pmd[0] = virt_to_phys(pte_dir) | | |
170 | _PAGE_TABLE | _PAGE_ACCESSED; | |
171 | pte_val(*pte_dir++) = 0; | |
172 | physaddr += PAGE_SIZE; | |
173 | for (i = 1; i < 64; physaddr += PAGE_SIZE, i++) | |
174 | pte_val(*pte_dir++) = physaddr; | |
175 | } | |
176 | size -= PTRTREESIZE; | |
177 | virtaddr += PTRTREESIZE; | |
178 | } else { | |
179 | if (!pmd_present(*pmd_dir)) { | |
180 | #ifdef DEBUG | |
181 | printk ("[new table]"); | |
182 | #endif | |
183 | pte_dir = kernel_page_table(); | |
184 | pmd_set(pmd_dir, pte_dir); | |
185 | } | |
186 | pte_dir = pte_offset_kernel(pmd_dir, virtaddr); | |
187 | ||
188 | if (virtaddr) { | |
189 | if (!pte_present(*pte_dir)) | |
190 | pte_val(*pte_dir) = physaddr; | |
191 | } else | |
192 | pte_val(*pte_dir) = 0; | |
193 | size -= PAGE_SIZE; | |
194 | virtaddr += PAGE_SIZE; | |
195 | physaddr += PAGE_SIZE; | |
196 | } | |
197 | ||
198 | } | |
199 | #ifdef DEBUG | |
200 | printk("\n"); | |
201 | #endif | |
1da177e4 LT |
202 | } |
203 | ||
204 | /* | |
205 | * paging_init() continues the virtual memory environment setup which | |
206 | * was begun by the code in arch/head.S. | |
207 | */ | |
208 | void __init paging_init(void) | |
209 | { | |
2dcf15b7 | 210 | unsigned long zones_size[MAX_NR_ZONES] = { 0, }; |
12d810c1 | 211 | unsigned long min_addr, max_addr; |
1008a115 | 212 | unsigned long addr; |
12d810c1 | 213 | int i; |
1da177e4 LT |
214 | |
215 | #ifdef DEBUG | |
fb425d0b | 216 | printk ("start of paging_init (%p, %lx)\n", kernel_pg_dir, availmem); |
1da177e4 LT |
217 | #endif |
218 | ||
219 | /* Fix the cache mode in the page descriptors for the 680[46]0. */ | |
220 | if (CPU_IS_040_OR_060) { | |
221 | int i; | |
222 | #ifndef mm_cachebits | |
223 | mm_cachebits = _PAGE_CACHE040; | |
224 | #endif | |
225 | for (i = 0; i < 16; i++) | |
226 | pgprot_val(protection_map[i]) |= _PAGE_CACHE040; | |
227 | } | |
228 | ||
12d810c1 RZ |
229 | min_addr = m68k_memory[0].addr; |
230 | max_addr = min_addr + m68k_memory[0].size; | |
231 | for (i = 1; i < m68k_num_memory;) { | |
232 | if (m68k_memory[i].addr < min_addr) { | |
233 | printk("Ignoring memory chunk at 0x%lx:0x%lx before the first chunk\n", | |
234 | m68k_memory[i].addr, m68k_memory[i].size); | |
235 | printk("Fix your bootloader or use a memfile to make use of this area!\n"); | |
236 | m68k_num_memory--; | |
237 | memmove(m68k_memory + i, m68k_memory + i + 1, | |
79930084 | 238 | (m68k_num_memory - i) * sizeof(struct m68k_mem_info)); |
12d810c1 RZ |
239 | continue; |
240 | } | |
241 | addr = m68k_memory[i].addr + m68k_memory[i].size; | |
242 | if (addr > max_addr) | |
243 | max_addr = addr; | |
244 | i++; | |
245 | } | |
246 | m68k_memoffset = min_addr - PAGE_OFFSET; | |
247 | m68k_virt_to_node_shift = fls(max_addr - min_addr - 1) - 6; | |
248 | ||
fbe9c961 RZ |
249 | module_fixup(NULL, __start_fixup, __stop_fixup); |
250 | flush_icache(); | |
251 | ||
12d810c1 RZ |
252 | high_memory = phys_to_virt(max_addr); |
253 | ||
254 | min_low_pfn = availmem >> PAGE_SHIFT; | |
79ae4fa5 | 255 | max_pfn = max_low_pfn = max_addr >> PAGE_SHIFT; |
12d810c1 | 256 | |
1008a115 MR |
257 | /* Reserve kernel text/data/bss and the memory allocated in head.S */ |
258 | memblock_reserve(m68k_memory[0].addr, availmem - m68k_memory[0].addr); | |
12d810c1 | 259 | |
1da177e4 LT |
260 | /* |
261 | * Map the physical memory available into the kernel virtual | |
1008a115 MR |
262 | * address space. Make sure memblock will not try to allocate |
263 | * pages beyond the memory we already mapped in head.S | |
1da177e4 | 264 | */ |
1008a115 MR |
265 | memblock_set_bottom_up(true); |
266 | ||
267 | for (i = 0; i < m68k_num_memory; i++) { | |
268 | m68k_setup_node(i); | |
12d810c1 | 269 | map_node(i); |
1008a115 | 270 | } |
1da177e4 LT |
271 | |
272 | flush_tlb_all(); | |
1da177e4 LT |
273 | |
274 | /* | |
275 | * initialize the bad page table and bad page to point | |
276 | * to a couple of allocated pages | |
277 | */ | |
15c3c114 | 278 | empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE); |
1da177e4 LT |
279 | |
280 | /* | |
281 | * Set up SFC/DFC registers | |
282 | */ | |
283 | set_fs(KERNEL_DS); | |
284 | ||
285 | #ifdef DEBUG | |
286 | printk ("before free_area_init\n"); | |
287 | #endif | |
12d810c1 RZ |
288 | for (i = 0; i < m68k_num_memory; i++) { |
289 | zones_size[ZONE_DMA] = m68k_memory[i].size >> PAGE_SHIFT; | |
9109fb7b | 290 | free_area_init_node(i, zones_size, |
12d810c1 | 291 | m68k_memory[i].addr >> PAGE_SHIFT, NULL); |
4aac0b48 MS |
292 | if (node_present_pages(i)) |
293 | node_set_state(i, N_NORMAL_MEMORY); | |
12d810c1 | 294 | } |
1da177e4 LT |
295 | } |
296 |