[linux-2.6-block.git] / arch / m68k / mac / oss.c

/*
 *	Operating System Services (OSS) chip handling
 *	Written by Joshua M. Thompson (funaho@jurai.org)
 *
 *
 *	This chip is used in the IIfx in place of VIA #2. It acts like a fancy
 *	VIA chip with prorammable interrupt levels.
 *
 * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some
 *		  recent insights into OSS operational details.
 * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped
 *		  to mostly match the A/UX interrupt scheme supported on the
 *		  VIA side. Also added support for enabling the ISM irq again
 *		  since we now have a functional IOP manager.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>

#include <asm/bootinfo.h>
#include <asm/macintosh.h>
#include <asm/macints.h>
#include <asm/mac_via.h>
#include <asm/mac_oss.h>

int oss_present;
volatile struct mac_oss *oss;

/*
 * Initialize the OSS
 *
 * The OSS "detection" code is actually in via_init() which is always called
 * before us. Thus we can count on oss_present being valid on entry.
 */

void __init oss_init(void)
{
	int i;

	if (!oss_present) return;

	oss = (struct mac_oss *) OSS_BASE;

	/* Disable all interrupts. Unlike a VIA it looks like we    */
	/* do this by setting the source's interrupt level to zero. */

	for (i = 0; i <= OSS_NUM_SOURCES; i++) {
		oss->irq_level[i] = 0;
	}
}

/*
 * Initialize OSS for Nubus access
 */

void __init oss_nubus_init(void)
{
}

/*
 * Handle miscellaneous OSS interrupts.
 */

static void oss_irq(unsigned int irq, struct irq_desc *desc)
{
	int events = oss->irq_pending &
	             (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM);

#ifdef DEBUG_IRQS
	if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
		printk("oss_irq: irq %u events = 0x%04X\n", irq,
			(int) oss->irq_pending);
	}
#endif

	if (events & OSS_IP_IOPSCC) {
		oss->irq_pending &= ~OSS_IP_IOPSCC;
		generic_handle_irq(IRQ_MAC_SCC);
	}

	if (events & OSS_IP_SCSI) {
		oss->irq_pending &= ~OSS_IP_SCSI;
		generic_handle_irq(IRQ_MAC_SCSI);
	}

	if (events & OSS_IP_IOPISM) {
		oss->irq_pending &= ~OSS_IP_IOPISM;
		generic_handle_irq(IRQ_MAC_ADB);
	}
}

/*
 * Nubus IRQ handler, OSS style
 *
 * Unlike the VIA/RBV this is on its own autovector interrupt level.
 */

static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc)
{
	int events, irq_bit, i;

	events = oss->irq_pending & OSS_IP_NUBUS;
	if (!events)
		return;

#ifdef DEBUG_NUBUS_INT
	if (console_loglevel > 7) {
		printk("oss_nubus_irq: events = 0x%04X\n", events);
	}
#endif
	/* There are only six slots on the OSS, not seven */

	i = 6;
	irq_bit = 0x40;
	do {
		--i;
		irq_bit >>= 1;
		if (events & irq_bit) {
			oss->irq_pending &= ~irq_bit;
			generic_handle_irq(NUBUS_SOURCE_BASE + i);
		}
	} while(events & (irq_bit - 1));
}

/*
 * Register the OSS and NuBus interrupt dispatchers.
 *
 * This IRQ mapping is laid out with two things in mind: first, we try to keep
 * things on their own levels to avoid having to do double-dispatches. Second,
 * the levels match as closely as possible the alternate IRQ mapping mode (aka
 * "A/UX mode") available on some VIA machines.
 */

#define OSS_IRQLEV_IOPISM    IRQ_AUTO_1
#define OSS_IRQLEV_SCSI      IRQ_AUTO_2
#define OSS_IRQLEV_NUBUS     IRQ_AUTO_3
#define OSS_IRQLEV_IOPSCC    IRQ_AUTO_4
#define OSS_IRQLEV_VIA1      IRQ_AUTO_6

void __init oss_register_interrupts(void)
{
	irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq);
	irq_set_chained_handler(OSS_IRQLEV_SCSI,   oss_irq);
	irq_set_chained_handler(OSS_IRQLEV_NUBUS,  oss_nubus_irq);
	irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq);
	irq_set_chained_handler(OSS_IRQLEV_VIA1,   via1_irq);

	/* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
	oss->irq_level[OSS_VIA1] = IRQ_AUTO_6;
}

/*
 * Enable an OSS interrupt
 *
 * It looks messy but it's rather straightforward. The switch() statement
 * just maps the machspec interrupt numbers to the right OSS interrupt
 * source (if the OSS handles that interrupt) and then sets the interrupt
 * level for that source to nonzero, thus enabling the interrupt.
 */

void oss_irq_enable(int irq) {
#ifdef DEBUG_IRQUSE
	printk("oss_irq_enable(%d)\n", irq);
#endif
	switch(irq) {
		case IRQ_MAC_SCC:
			oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
			return;
		case IRQ_MAC_ADB:
			oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
			return;
		case IRQ_MAC_SCSI:
			oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
			return;
		case IRQ_NUBUS_9:
		case IRQ_NUBUS_A:
		case IRQ_NUBUS_B:
		case IRQ_NUBUS_C:
		case IRQ_NUBUS_D:
		case IRQ_NUBUS_E:
			irq -= NUBUS_SOURCE_BASE;
			oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
			return;
	}

	if (IRQ_SRC(irq) == 1)
		via_irq_enable(irq);
}

/*
 * Disable an OSS interrupt
 *
 * Same as above except we set the source's interrupt level to zero,
 * to disable the interrupt.
 */

void oss_irq_disable(int irq) {
#ifdef DEBUG_IRQUSE
	printk("oss_irq_disable(%d)\n", irq);
#endif
	switch(irq) {
		case IRQ_MAC_SCC:
			oss->irq_level[OSS_IOPSCC] = 0;
			return;
		case IRQ_MAC_ADB:
			oss->irq_level[OSS_IOPISM] = 0;
			return;
		case IRQ_MAC_SCSI:
			oss->irq_level[OSS_SCSI] = 0;
			return;
		case IRQ_NUBUS_9:
		case IRQ_NUBUS_A:
		case IRQ_NUBUS_B:
		case IRQ_NUBUS_C:
		case IRQ_NUBUS_D:
		case IRQ_NUBUS_E:
			irq -= NUBUS_SOURCE_BASE;
			oss->irq_level[irq] = 0;
			return;
	}

	if (IRQ_SRC(irq) == 1)
		via_irq_disable(irq);
}
Commit	Line	Data
1da177e4	1	/*
da3fb3c9	2	* Operating System Services (OSS) chip handling
1da177e4 LT	3	* Written by Joshua M. Thompson (funaho@jurai.org)
	4	*
	5	*
	6	* This chip is used in the IIfx in place of VIA #2. It acts like a fancy
	7	* VIA chip with prorammable interrupt levels.
	8	*
	9	* 990502 (jmt) - Major rewrite for new interrupt architecture as well as some
	10	* recent insights into OSS operational details.
0c79cf6a	11	* 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped
1da177e4 LT	12	* to mostly match the A/UX interrupt scheme supported on the
	13	* VIA side. Also added support for enabling the ISM irq again
	14	* since we now have a functional IOP manager.
	15	*/
	16
	17	#include <linux/types.h>
	18	#include <linux/kernel.h>
	19	#include <linux/mm.h>
	20	#include <linux/delay.h>
	21	#include <linux/init.h>
ddc7fd25	22	#include <linux/irq.h>
1da177e4 LT	23
1da177e4 LT	24	#include <asm/bootinfo.h>
1da177e4 LT	25	#include <asm/macintosh.h>
	26	#include <asm/macints.h>
	27	#include <asm/mac_via.h>
	28	#include <asm/mac_oss.h>
	29
	30	int oss_present;
	31	volatile struct mac_oss *oss;
	32
1da177e4 LT	33	/*
	34	* Initialize the OSS
	35	*
	36	* The OSS "detection" code is actually in via_init() which is always called
	37	* before us. Thus we can count on oss_present being valid on entry.
	38	*/
	39
	40	void __init oss_init(void)
	41	{
	42	int i;
	43
	44	if (!oss_present) return;
	45
	46	oss = (struct mac_oss *) OSS_BASE;
	47
	48	/* Disable all interrupts. Unlike a VIA it looks like we */
	49	/* do this by setting the source's interrupt level to zero. */
	50
	51	for (i = 0; i <= OSS_NUM_SOURCES; i++) {
da3fb3c9	52	oss->irq_level[i] = 0;
1da177e4	53	}
1da177e4 LT	54	}
1da177e4 LT	55
1da177e4 LT	56	/*
	57	* Initialize OSS for Nubus access
	58	*/
	59
	60	void __init oss_nubus_init(void)
	61	{
	62	}
	63
	64	/*
da3fb3c9	65	* Handle miscellaneous OSS interrupts.
1da177e4 LT	66	*/
1da177e4 LT	67
9145db56 GU	68	static void oss_irq(unsigned int irq, struct irq_desc *desc)
9145db56 GU	69	{
da3fb3c9 FT	70	int events = oss->irq_pending &
da3fb3c9 FT	71	(OSS_IP_IOPSCC \| OSS_IP_SCSI \| OSS_IP_IOPISM);
9145db56 GU	72
	73	#ifdef DEBUG_IRQS
	74	if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
	75	printk("oss_irq: irq %u events = 0x%04X\n", irq,
	76	(int) oss->irq_pending);
	77	}
	78	#endif
9145db56	79
da3fb3c9 FT	80	if (events & OSS_IP_IOPSCC) {
	81	oss->irq_pending &= ~OSS_IP_IOPSCC;
	82	generic_handle_irq(IRQ_MAC_SCC);
	83	}
	84
	85	if (events & OSS_IP_SCSI) {
9145db56 GU	86	oss->irq_pending &= ~OSS_IP_SCSI;
9145db56 GU	87	generic_handle_irq(IRQ_MAC_SCSI);
da3fb3c9 FT	88	}
	89
	90	if (events & OSS_IP_IOPISM) {
	91	oss->irq_pending &= ~OSS_IP_IOPISM;
	92	generic_handle_irq(IRQ_MAC_ADB);
9145db56 GU	93	}
9145db56 GU	94	}
1da177e4 LT	95
	96	/*
	97	* Nubus IRQ handler, OSS style
	98	*
	99	* Unlike the VIA/RBV this is on its own autovector interrupt level.
	100	*/
	101
9145db56 GU	102	static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc)
	103	{
	104	int events, irq_bit, i;
	105
	106	events = oss->irq_pending & OSS_IP_NUBUS;
	107	if (!events)
	108	return;
	109
	110	#ifdef DEBUG_NUBUS_INT
	111	if (console_loglevel > 7) {
	112	printk("oss_nubus_irq: events = 0x%04X\n", events);
	113	}
	114	#endif
	115	/* There are only six slots on the OSS, not seven */
	116
	117	i = 6;
	118	irq_bit = 0x40;
	119	do {
	120	--i;
	121	irq_bit >>= 1;
	122	if (events & irq_bit) {
	123	oss->irq_pending &= ~irq_bit;
	124	generic_handle_irq(NUBUS_SOURCE_BASE + i);
	125	}
	126	} while(events & (irq_bit - 1));
	127	}
9145db56 GU	128
	129	/*
	130	* Register the OSS and NuBus interrupt dispatchers.
da3fb3c9 FT	131	*
	132	* This IRQ mapping is laid out with two things in mind: first, we try to keep
	133	* things on their own levels to avoid having to do double-dispatches. Second,
	134	* the levels match as closely as possible the alternate IRQ mapping mode (aka
	135	* "A/UX mode") available on some VIA machines.
9145db56 GU	136	*/
9145db56 GU	137
da3fb3c9 FT	138	#define OSS_IRQLEV_IOPISM IRQ_AUTO_1
	139	#define OSS_IRQLEV_SCSI IRQ_AUTO_2
	140	#define OSS_IRQLEV_NUBUS IRQ_AUTO_3
	141	#define OSS_IRQLEV_IOPSCC IRQ_AUTO_4
	142	#define OSS_IRQLEV_VIA1 IRQ_AUTO_6
	143
9145db56 GU	144	void __init oss_register_interrupts(void)
9145db56 GU	145	{
da3fb3c9 FT	146	irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq);
	147	irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq);
	148	irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
	149	irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq);
	150	irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
	151
	152	/* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
	153	oss->irq_level[OSS_VIA1] = IRQ_AUTO_6;
9145db56	154	}
1da177e4 LT	155
	156	/*
	157	* Enable an OSS interrupt
	158	*
	159	* It looks messy but it's rather straightforward. The switch() statement
	160	* just maps the machspec interrupt numbers to the right OSS interrupt
	161	* source (if the OSS handles that interrupt) and then sets the interrupt
	162	* level for that source to nonzero, thus enabling the interrupt.
	163	*/
	164
	165	void oss_irq_enable(int irq) {
	166	#ifdef DEBUG_IRQUSE
	167	printk("oss_irq_enable(%d)\n", irq);
	168	#endif
	169	switch(irq) {
80614e5a	170	case IRQ_MAC_SCC:
1da177e4	171	oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
da3fb3c9	172	return;
1da177e4 LT	173	case IRQ_MAC_ADB:
1da177e4 LT	174	oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
da3fb3c9	175	return;
1da177e4 LT	176	case IRQ_MAC_SCSI:
1da177e4 LT	177	oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
da3fb3c9	178	return;
1da177e4 LT	179	case IRQ_NUBUS_9:
	180	case IRQ_NUBUS_A:
	181	case IRQ_NUBUS_B:
	182	case IRQ_NUBUS_C:
	183	case IRQ_NUBUS_D:
	184	case IRQ_NUBUS_E:
	185	irq -= NUBUS_SOURCE_BASE;
	186	oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
da3fb3c9	187	return;
1da177e4	188	}
da3fb3c9 FT	189
	190	if (IRQ_SRC(irq) == 1)
	191	via_irq_enable(irq);
1da177e4 LT	192	}
	193
	194	/*
	195	* Disable an OSS interrupt
	196	*
	197	* Same as above except we set the source's interrupt level to zero,
	198	* to disable the interrupt.
	199	*/
	200
	201	void oss_irq_disable(int irq) {
	202	#ifdef DEBUG_IRQUSE
	203	printk("oss_irq_disable(%d)\n", irq);
	204	#endif
	205	switch(irq) {
80614e5a	206	case IRQ_MAC_SCC:
da3fb3c9 FT	207	oss->irq_level[OSS_IOPSCC] = 0;
da3fb3c9 FT	208	return;
1da177e4	209	case IRQ_MAC_ADB:
da3fb3c9 FT	210	oss->irq_level[OSS_IOPISM] = 0;
da3fb3c9 FT	211	return;
1da177e4	212	case IRQ_MAC_SCSI:
da3fb3c9 FT	213	oss->irq_level[OSS_SCSI] = 0;
da3fb3c9 FT	214	return;
1da177e4 LT	215	case IRQ_NUBUS_9:
	216	case IRQ_NUBUS_A:
	217	case IRQ_NUBUS_B:
	218	case IRQ_NUBUS_C:
	219	case IRQ_NUBUS_D:
	220	case IRQ_NUBUS_E:
	221	irq -= NUBUS_SOURCE_BASE;
da3fb3c9 FT	222	oss->irq_level[irq] = 0;
da3fb3c9 FT	223	return;
1da177e4	224	}
da3fb3c9 FT	225
	226	if (IRQ_SRC(irq) == 1)
	227	via_irq_disable(irq);
1da177e4	228	}