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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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2 | /****************************************************************************/ |
3 | ||
4 | /* | |
5 | * nettel.h -- Lineo (formerly Moreton Bay) NETtel support. | |
6 | * | |
7 | * (C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com) | |
8 | * (C) Copyright 2000-2001, Lineo Inc. (www.lineo.com) | |
9 | * (C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com) | |
10 | */ | |
11 | ||
12 | /****************************************************************************/ | |
13 | #ifndef nettel_h | |
14 | #define nettel_h | |
15 | /****************************************************************************/ | |
16 | ||
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17 | |
18 | /****************************************************************************/ | |
19 | #ifdef CONFIG_NETtel | |
20 | /****************************************************************************/ | |
21 | ||
22 | #ifdef CONFIG_COLDFIRE | |
23 | #include <asm/coldfire.h> | |
24 | #include <asm/mcfsim.h> | |
4fb62ede | 25 | #include <asm/io.h> |
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26 | #endif |
27 | ||
28 | /*---------------------------------------------------------------------------*/ | |
29 | #if defined(CONFIG_M5307) | |
30 | /* | |
31 | * NETtel/5307 based hardware first. DTR/DCD lines are wired to | |
32 | * GPIO lines. Most of the LED's are driver through a latch | |
33 | * connected to CS2. | |
34 | */ | |
35 | #define MCFPP_DCD1 0x0001 | |
36 | #define MCFPP_DCD0 0x0002 | |
37 | #define MCFPP_DTR1 0x0004 | |
38 | #define MCFPP_DTR0 0x0008 | |
39 | ||
40 | #define NETtel_LEDADDR 0x30400000 | |
41 | ||
42 | #ifndef __ASSEMBLY__ | |
43 | ||
44 | extern volatile unsigned short ppdata; | |
45 | ||
46 | /* | |
47 | * These functions defined to give quasi generic access to the | |
48 | * PPIO bits used for DTR/DCD. | |
49 | */ | |
50 | static __inline__ unsigned int mcf_getppdata(void) | |
51 | { | |
52 | volatile unsigned short *pp; | |
732c611e | 53 | pp = (volatile unsigned short *) MCFSIM_PADAT; |
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54 | return((unsigned int) *pp); |
55 | } | |
56 | ||
57 | static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits) | |
58 | { | |
59 | volatile unsigned short *pp; | |
732c611e | 60 | pp = (volatile unsigned short *) MCFSIM_PADAT; |
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61 | ppdata = (ppdata & ~mask) | bits; |
62 | *pp = ppdata; | |
63 | } | |
64 | #endif | |
65 | ||
66 | /*---------------------------------------------------------------------------*/ | |
67 | #elif defined(CONFIG_M5206e) | |
68 | /* | |
69 | * NETtel/5206e based hardware has leds on latch on CS3. | |
70 | * No support modem for lines?? | |
71 | */ | |
72 | #define NETtel_LEDADDR 0x50000000 | |
73 | ||
74 | /*---------------------------------------------------------------------------*/ | |
75 | #elif defined(CONFIG_M5272) | |
76 | /* | |
77 | * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines. | |
78 | */ | |
79 | #define MCFPP_DCD0 0x0080 | |
80 | #define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */ | |
81 | #define MCFPP_DTR0 0x0040 | |
82 | #define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */ | |
83 | ||
84 | #ifndef __ASSEMBLY__ | |
85 | /* | |
86 | * These functions defined to give quasi generic access to the | |
87 | * PPIO bits used for DTR/DCD. | |
88 | */ | |
89 | static __inline__ unsigned int mcf_getppdata(void) | |
90 | { | |
4fb62ede | 91 | return readw(MCFSIM_PBDAT); |
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92 | } |
93 | ||
94 | static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits) | |
95 | { | |
36d050d9 | 96 | writew((readw(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT); |
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97 | } |
98 | #endif | |
99 | ||
100 | #endif | |
101 | /*---------------------------------------------------------------------------*/ | |
102 | ||
103 | /****************************************************************************/ | |
104 | #endif /* CONFIG_NETtel */ | |
105 | /****************************************************************************/ | |
106 | #endif /* nettel_h */ |