[linux-2.6-block.git] / arch / m68k / include / asm / motorola_pgtable.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _MOTOROLA_PGTABLE_H
#define _MOTOROLA_PGTABLE_H


/*
 * Definitions for MMU descriptors
 */
#define _PAGE_PRESENT	0x001
#define _PAGE_SHORT	0x002
#define _PAGE_RONLY	0x004
#define _PAGE_READWRITE	0x000
#define _PAGE_ACCESSED	0x008
#define _PAGE_DIRTY	0x010
#define _PAGE_SUPER	0x080	/* 68040 supervisor only */
#define _PAGE_GLOBAL040	0x400	/* 68040 global bit, used for kva descs */
#define _PAGE_NOCACHE030 0x040	/* 68030 no-cache mode */
#define _PAGE_NOCACHE	0x060	/* 68040 cache mode, non-serialized */
#define _PAGE_NOCACHE_S	0x040	/* 68040 no-cache mode, serialized */
#define _PAGE_CACHE040	0x020	/* 68040 cache mode, cachable, copyback */
#define _PAGE_CACHE040W	0x000	/* 68040 cache mode, cachable, write-through */

#define _DESCTYPE_MASK	0x003

#define _CACHEMASK040	(~0x060)

/*
 * Currently set to the minimum alignment of table pointers (256 bytes).
 * The hardware only uses the low 4 bits for state:
 *
 *    3 - Used
 *    2 - Write Protected
 *  0,1 - Descriptor Type
 *
 * and has the rest of the bits reserved.
 */
#define _TABLE_MASK	(0xffffff00)

#define _PAGE_TABLE	(_PAGE_SHORT)
#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_NOCACHE)

#define _PAGE_PROTNONE	0x004

#ifndef __ASSEMBLY__

/* This is the cache mode to be used for pages containing page descriptors for
 * processors >= '040. It is in pte_mknocache(), and the variable is defined
 * and initialized in head.S */
extern int m68k_pgtable_cachemode;

/* This is the cache mode for normal pages, for supervisor access on
 * processors >= '040. It is used in pte_mkcache(), and the variable is
 * defined and initialized in head.S */

#if defined(CPU_M68060_ONLY) && defined(CONFIG_060_WRITETHROUGH)
#define m68k_supervisor_cachemode _PAGE_CACHE040W
#elif defined(CPU_M68040_OR_M68060_ONLY)
#define m68k_supervisor_cachemode _PAGE_CACHE040
#elif defined(CPU_M68020_OR_M68030_ONLY)
#define m68k_supervisor_cachemode 0
#else
extern int m68k_supervisor_cachemode;
#endif

#if defined(CPU_M68040_OR_M68060_ONLY)
#define mm_cachebits _PAGE_CACHE040
#elif defined(CPU_M68020_OR_M68030_ONLY)
#define mm_cachebits 0
#else
extern unsigned long mm_cachebits;
#endif

#define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | mm_cachebits)

/* Alternate definitions that are compile time constants, for
   initializing protection_map.  The cachebits are fixed later.  */
#define PAGE_NONE_C	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
#define PAGE_SHARED_C	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
#define PAGE_COPY_C	__pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
#define PAGE_READONLY_C	__pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)

/*
 * The m68k can't do page protection for execute, and considers that the same are read.
 * Also, write permissions imply read permissions. This is the closest we can get..
 */
#define __P000	PAGE_NONE_C
#define __P001	PAGE_READONLY_C
#define __P010	PAGE_COPY_C
#define __P011	PAGE_COPY_C
#define __P100	PAGE_READONLY_C
#define __P101	PAGE_READONLY_C
#define __P110	PAGE_COPY_C
#define __P111	PAGE_COPY_C

#define __S000	PAGE_NONE_C
#define __S001	PAGE_READONLY_C
#define __S010	PAGE_SHARED_C
#define __S011	PAGE_SHARED_C
#define __S100	PAGE_READONLY_C
#define __S101	PAGE_READONLY_C
#define __S110	PAGE_SHARED_C
#define __S111	PAGE_SHARED_C

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))

static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
	return pte;
}

static inline void pmd_set(pmd_t *pmdp, pte_t *ptep)
{
	pmd_val(*pmdp) = virt_to_phys(ptep) | _PAGE_TABLE | _PAGE_ACCESSED;
}

static inline void pud_set(pud_t *pudp, pmd_t *pmdp)
{
	pud_val(*pudp) = _PAGE_TABLE | _PAGE_ACCESSED | __pa(pmdp);
}

#define __pte_page(pte) ((unsigned long)__va(pte_val(pte) & PAGE_MASK))
#define __pmd_page(pmd) ((unsigned long)__va(pmd_val(pmd) & _TABLE_MASK))
#define pud_page_vaddr(pud) ((unsigned long)__va(pud_val(pud) & _TABLE_MASK))


#define pte_none(pte)		(!pte_val(pte))
#define pte_present(pte)	(pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE))
#define pte_clear(mm,addr,ptep)		({ pte_val(*(ptep)) = 0; })

#define pte_page(pte)		virt_to_page(__va(pte_val(pte)))
#define pte_pfn(pte)		(pte_val(pte) >> PAGE_SHIFT)
#define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))

#define pmd_none(pmd)		(!pmd_val(pmd))
#define pmd_bad(pmd)		((pmd_val(pmd) & _DESCTYPE_MASK) != _PAGE_TABLE)
#define pmd_present(pmd)	(pmd_val(pmd) & _PAGE_TABLE)
#define pmd_clear(pmdp)		({ pmd_val(*pmdp) = 0; })

/*
 * m68k does not have huge pages (020/030 actually could), but generic code
 * expects pmd_page() to exists, only to then DCE it all. Provide a dummy to
 * make the compiler happy.
 */
#define pmd_page(pmd)		NULL


#define pud_none(pud)		(!pud_val(pud))
#define pud_bad(pud)		((pud_val(pud) & _DESCTYPE_MASK) != _PAGE_TABLE)
#define pud_present(pud)	(pud_val(pud) & _PAGE_TABLE)
#define pud_clear(pudp)		({ pud_val(*pudp) = 0; })
#define pud_page(pud)		(mem_map + ((unsigned long)(__va(pud_val(pud)) - PAGE_OFFSET) >> PAGE_SHIFT))

#define pte_ERROR(e) \
	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \
	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
#define pgd_ERROR(e) \
	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))


/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
static inline int pte_write(pte_t pte)		{ return !(pte_val(pte) & _PAGE_RONLY); }
static inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }

static inline pte_t pte_wrprotect(pte_t pte)	{ pte_val(pte) |= _PAGE_RONLY; return pte; }
static inline pte_t pte_mkclean(pte_t pte)	{ pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
static inline pte_t pte_mkold(pte_t pte)	{ pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
static inline pte_t pte_mkwrite(pte_t pte)	{ pte_val(pte) &= ~_PAGE_RONLY; return pte; }
static inline pte_t pte_mkdirty(pte_t pte)	{ pte_val(pte) |= _PAGE_DIRTY; return pte; }
static inline pte_t pte_mkyoung(pte_t pte)	{ pte_val(pte) |= _PAGE_ACCESSED; return pte; }
static inline pte_t pte_mknocache(pte_t pte)
{
	pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_pgtable_cachemode;
	return pte;
}
static inline pte_t pte_mkcache(pte_t pte)
{
	pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_supervisor_cachemode;
	return pte;
}

#define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))

#define pgd_index(address)     ((address) >> PGDIR_SHIFT)

/* to find an entry in a page-table-directory */
static inline pgd_t *pgd_offset(const struct mm_struct *mm,
				unsigned long address)
{
	return mm->pgd + pgd_index(address);
}

#define swapper_pg_dir kernel_pg_dir
extern pgd_t kernel_pg_dir[128];

static inline pgd_t *pgd_offset_k(unsigned long address)
{
	return kernel_pg_dir + (address >> PGDIR_SHIFT);
}


/* Find an entry in the second-level page table.. */
static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
{
	return (pmd_t *)pud_page_vaddr(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PMD-1));
}

/* Find an entry in the third-level page table.. */
static inline pte_t *pte_offset_kernel(pmd_t *pmdp, unsigned long address)
{
	return (pte_t *)__pmd_page(*pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
}

#define pte_offset_map(pmdp,address) ((pte_t *)__pmd_page(*pmdp) + (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
#define pte_unmap(pte)		((void)0)

/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
#define __swp_type(x)		(((x).val >> 4) & 0xff)
#define __swp_offset(x)		((x).val >> 12)
#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 12) })
#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x)	((pte_t) { (x).val })

#endif	/* !__ASSEMBLY__ */
#endif /* _MOTOROLA_PGTABLE_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	#ifndef _MOTOROLA_PGTABLE_H
	3	#define _MOTOROLA_PGTABLE_H
	4
1da177e4 LT	5
	6	/*
	7	* Definitions for MMU descriptors
	8	*/
	9	#define _PAGE_PRESENT 0x001
	10	#define _PAGE_SHORT 0x002
	11	#define _PAGE_RONLY 0x004
d49316e8	12	#define _PAGE_READWRITE 0x000
1da177e4 LT	13	#define _PAGE_ACCESSED 0x008
	14	#define _PAGE_DIRTY 0x010
	15	#define _PAGE_SUPER 0x080 /* 68040 supervisor only */
	16	#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
	17	#define _PAGE_NOCACHE030 0x040 /* 68030 no-cache mode */
	18	#define _PAGE_NOCACHE 0x060 /* 68040 cache mode, non-serialized */
	19	#define _PAGE_NOCACHE_S 0x040 /* 68040 no-cache mode, serialized */
	20	#define _PAGE_CACHE040 0x020 /* 68040 cache mode, cachable, copyback */
	21	#define _PAGE_CACHE040W 0x000 /* 68040 cache mode, cachable, write-through */
	22
	23	#define _DESCTYPE_MASK 0x003
	24
	25	#define _CACHEMASK040 (~0x060)
ef9285f6 PZ	26
	27	/*
	28	* Currently set to the minimum alignment of table pointers (256 bytes).
	29	* The hardware only uses the low 4 bits for state:
	30	*
	31	* 3 - Used
	32	* 2 - Write Protected
	33	* 0,1 - Descriptor Type
	34	*
	35	* and has the rest of the bits reserved.
	36	*/
	37	#define _TABLE_MASK (0xffffff00)
1da177e4 LT	38
	39	#define _PAGE_TABLE (_PAGE_SHORT)
	40	#define _PAGE_CHG_MASK (PAGE_MASK \| _PAGE_ACCESSED \| _PAGE_DIRTY \| _PAGE_NOCACHE)
	41
	42	#define _PAGE_PROTNONE 0x004
1da177e4 LT	43
	44	#ifndef __ASSEMBLY__
	45
	46	/* This is the cache mode to be used for pages containing page descriptors for
	47	* processors >= '040. It is in pte_mknocache(), and the variable is defined
	48	* and initialized in head.S */
	49	extern int m68k_pgtable_cachemode;
	50
	51	/* This is the cache mode for normal pages, for supervisor access on
	52	* processors >= '040. It is used in pte_mkcache(), and the variable is
	53	* defined and initialized in head.S */
	54
	55	#if defined(CPU_M68060_ONLY) && defined(CONFIG_060_WRITETHROUGH)
	56	#define m68k_supervisor_cachemode _PAGE_CACHE040W
	57	#elif defined(CPU_M68040_OR_M68060_ONLY)
	58	#define m68k_supervisor_cachemode _PAGE_CACHE040
	59	#elif defined(CPU_M68020_OR_M68030_ONLY)
	60	#define m68k_supervisor_cachemode 0
	61	#else
	62	extern int m68k_supervisor_cachemode;
	63	#endif
	64
	65	#if defined(CPU_M68040_OR_M68060_ONLY)
	66	#define mm_cachebits _PAGE_CACHE040
	67	#elif defined(CPU_M68020_OR_M68030_ONLY)
	68	#define mm_cachebits 0
	69	#else
	70	extern unsigned long mm_cachebits;
	71	#endif
	72
	73	#define PAGE_NONE __pgprot(_PAGE_PROTNONE \| _PAGE_ACCESSED \| mm_cachebits)
	74	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_ACCESSED \| mm_cachebits)
	75	#define PAGE_COPY __pgprot(_PAGE_PRESENT \| _PAGE_RONLY \| _PAGE_ACCESSED \| mm_cachebits)
	76	#define PAGE_READONLY __pgprot(_PAGE_PRESENT \| _PAGE_RONLY \| _PAGE_ACCESSED \| mm_cachebits)
	77	#define PAGE_KERNEL __pgprot(_PAGE_PRESENT \| _PAGE_DIRTY \| _PAGE_ACCESSED \| mm_cachebits)
	78
	79	/* Alternate definitions that are compile time constants, for
	80	initializing protection_map. The cachebits are fixed later. */
	81	#define PAGE_NONE_C __pgprot(_PAGE_PROTNONE \| _PAGE_ACCESSED)
	82	#define PAGE_SHARED_C __pgprot(_PAGE_PRESENT \| _PAGE_ACCESSED)
	83	#define PAGE_COPY_C __pgprot(_PAGE_PRESENT \| _PAGE_RONLY \| _PAGE_ACCESSED)
	84	#define PAGE_READONLY_C __pgprot(_PAGE_PRESENT \| _PAGE_RONLY \| _PAGE_ACCESSED)
	85
	86	/*
	87	* The m68k can't do page protection for execute, and considers that the same are read.
	88	* Also, write permissions imply read permissions. This is the closest we can get..
	89	*/
	90	#define __P000 PAGE_NONE_C
	91	#define __P001 PAGE_READONLY_C
	92	#define __P010 PAGE_COPY_C
	93	#define __P011 PAGE_COPY_C
	94	#define __P100 PAGE_READONLY_C
	95	#define __P101 PAGE_READONLY_C
	96	#define __P110 PAGE_COPY_C
	97	#define __P111 PAGE_COPY_C
	98
	99	#define __S000 PAGE_NONE_C
	100	#define __S001 PAGE_READONLY_C
	101	#define __S010 PAGE_SHARED_C
	102	#define __S011 PAGE_SHARED_C
	103	#define __S100 PAGE_READONLY_C
	104	#define __S101 PAGE_READONLY_C
	105	#define __S110 PAGE_SHARED_C
	106	#define __S111 PAGE_SHARED_C
107
108	/*
109	* Conversion functions: convert a page and protection to a page entry,
110	* and a page entry and page directory to the page they refer to.
111	*/
112	#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
113
114	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
115	{
116	pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) \| pgprot_val(newprot);
117	return pte;
118	}
119
120	static inline void pmd_set(pmd_t pmdp, pte_t ptep)
121	{
ef22d8ab	122	pmd_val(*pmdp) = virt_to_phys(ptep) \| _PAGE_TABLE \| _PAGE_ACCESSED;
1da177e4 LT	123	}
1da177e4 LT	124
60e50f34	125	static inline void pud_set(pud_t pudp, pmd_t pmdp)
1da177e4	126	{
60e50f34	127	pud_val(*pudp) = _PAGE_TABLE \| _PAGE_ACCESSED \| __pa(pmdp);
1da177e4 LT	128	}
	129
	130	#define __pte_page(pte) ((unsigned long)__va(pte_val(pte) & PAGE_MASK))
	131	#define __pmd_page(pmd) ((unsigned long)__va(pmd_val(pmd) & _TABLE_MASK))
60e50f34	132	#define pud_page_vaddr(pud) ((unsigned long)__va(pud_val(pud) & _TABLE_MASK))
1da177e4 LT	133
	134
	135	#define pte_none(pte) (!pte_val(pte))
	136	#define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT \| _PAGE_PROTNONE))
	137	#define pte_clear(mm,addr,ptep) ({ pte_val(*(ptep)) = 0; })
	138
12d810c1	139	#define pte_page(pte) virt_to_page(__va(pte_val(pte)))
1da177e4 LT	140	#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
	141	#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) \| pgprot_val(prot))
	142
	143	#define pmd_none(pmd) (!pmd_val(pmd))
	144	#define pmd_bad(pmd) ((pmd_val(pmd) & _DESCTYPE_MASK) != _PAGE_TABLE)
	145	#define pmd_present(pmd) (pmd_val(pmd) & _PAGE_TABLE)
ef22d8ab	146	#define pmd_clear(pmdp) ({ pmd_val(*pmdp) = 0; })
61c64a25 PZ	147
	148	/*
	149	* m68k does not have huge pages (020/030 actually could), but generic code
	150	* expects pmd_page() to exists, only to then DCE it all. Provide a dummy to
	151	* make the compiler happy.
	152	*/
	153	#define pmd_page(pmd) NULL
1da177e4 LT	154
1da177e4 LT	155
60e50f34 MR	156	#define pud_none(pud) (!pud_val(pud))
	157	#define pud_bad(pud) ((pud_val(pud) & _DESCTYPE_MASK) != _PAGE_TABLE)
	158	#define pud_present(pud) (pud_val(pud) & _PAGE_TABLE)
	159	#define pud_clear(pudp) ({ pud_val(*pudp) = 0; })
	160	#define pud_page(pud) (mem_map + ((unsigned long)(__va(pud_val(pud)) - PAGE_OFFSET) >> PAGE_SHIFT))
1da177e4 LT	161
	162	#define pte_ERROR(e) \
	163	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
	164	#define pmd_ERROR(e) \
	165	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
	166	#define pgd_ERROR(e) \
	167	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
	168
	169
	170	/*
	171	* The following only work if pte_present() is true.
	172	* Undefined behaviour if not..
	173	*/
1da177e4	174	static inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_RONLY); }
1da177e4 LT	175	static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
1da177e4 LT	176	static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
1da177e4 LT	177
1da177e4 LT	178	static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) \|= _PAGE_RONLY; return pte; }
1da177e4 LT	179	static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
	180	static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
	181	static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_RONLY; return pte; }
1da177e4 LT	182	static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) \|= _PAGE_DIRTY; return pte; }
	183	static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) \|= _PAGE_ACCESSED; return pte; }
	184	static inline pte_t pte_mknocache(pte_t pte)
	185	{
	186	pte_val(pte) = (pte_val(pte) & _CACHEMASK040) \| m68k_pgtable_cachemode;
	187	return pte;
	188	}
	189	static inline pte_t pte_mkcache(pte_t pte)
	190	{
	191	pte_val(pte) = (pte_val(pte) & _CACHEMASK040) \| m68k_supervisor_cachemode;
	192	return pte;
	193	}
	194
	195	#define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))
	196
	197	#define pgd_index(address) ((address) >> PGDIR_SHIFT)
	198
	199	/* to find an entry in a page-table-directory */
5b808a59 GU	200	static inline pgd_t pgd_offset(const struct mm_struct mm,
5b808a59 GU	201	unsigned long address)
1da177e4 LT	202	{
	203	return mm->pgd + pgd_index(address);
	204	}
	205
	206	#define swapper_pg_dir kernel_pg_dir
	207	extern pgd_t kernel_pg_dir[128];
	208
	209	static inline pgd_t *pgd_offset_k(unsigned long address)
	210	{
	211	return kernel_pg_dir + (address >> PGDIR_SHIFT);
	212	}
	213
	214
	215	/* Find an entry in the second-level page table.. */
60e50f34	216	static inline pmd_t pmd_offset(pud_t dir, unsigned long address)
1da177e4	217	{
60e50f34	218	return (pmd_t )pud_page_vaddr(dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PMD-1));
1da177e4 LT	219	}
	220
	221	/* Find an entry in the third-level page table.. */
	222	static inline pte_t pte_offset_kernel(pmd_t pmdp, unsigned long address)
	223	{
	224	return (pte_t )__pmd_page(pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
	225	}
	226
12d810c1	227	#define pte_offset_map(pmdp,address) ((pte_t )__pmd_page(pmdp) + (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
12d810c1	228	#define pte_unmap(pte) ((void)0)
1da177e4	229
1da177e4 LT	230	/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
	231	#define __swp_type(x) (((x).val >> 4) & 0xff)
	232	#define __swp_offset(x) ((x).val >> 12)
	233	#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) \| ((offset) << 12) })
	234	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
	235	#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
	236
	237	#endif /* !__ASSEMBLY__ */
	238	#endif /* _MOTOROLA_PGTABLE_H */