projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 1da177e4 LT |
2 | /***************************************************************************/ |
| 3 | ||
| 4 | /* | |
| ece9ae65 | 5 | * m5272.c -- platform support for ColdFire 5272 based boards |
| 1da177e4 LT |
6 | * |
| 7 | * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) | |
| 8 | * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com) | |
| 9 | */ | |
| 10 | ||
| 11 | /***************************************************************************/ | |
| 12 | ||
| 1da177e4 | 13 | #include <linux/kernel.h> |
| 1da177e4 LT |
14 | #include <linux/param.h> |
| 15 | #include <linux/init.h> | |
| 84e6defa | 16 | #include <linux/io.h> |
| 41a2159b GU |
17 | #include <linux/phy.h> |
| 18 | #include <linux/phy_fixed.h> | |
| 1da177e4 LT |
19 | #include <asm/machdep.h> |
| 20 | #include <asm/coldfire.h> | |
| 1da177e4 | 21 | #include <asm/mcfsim.h> |
| 84e6defa | 22 | #include <asm/mcfuart.h> |
| 7acef7a2 | 23 | #include <asm/mcfclk.h> |
| 1da177e4 LT |
24 | |
| 25 | /***************************************************************************/ | |
| 26 | ||
| 1da177e4 LT |
27 | /* |
| 28 | * Some platforms need software versions of the GPIO data registers. | |
| 29 | */ | |
| 30 | unsigned short ppdata; | |
| 31 | unsigned char ledbank = 0xff; | |
| 32 | ||
| 33 | /***************************************************************************/ | |
| 34 | ||
| 7acef7a2 GU |
35 | DEFINE_CLK(pll, "pll.0", MCF_CLK); |
| 36 | DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); | |
| 37 | DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); | |
| 38 | DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); | |
| 39 | DEFINE_CLK(mcftmr2, "mcftmr.2", MCF_BUSCLK); | |
| 40 | DEFINE_CLK(mcftmr3, "mcftmr.3", MCF_BUSCLK); | |
| 41 | DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); | |
| 42 | DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); | |
| 74859523 | 43 | DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); |
| 7acef7a2 GU |
44 | DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); |
| 45 | ||
| 46 | struct clk *mcf_clks[] = { | |
| 47 | &clk_pll, | |
| 48 | &clk_sys, | |
| 49 | &clk_mcftmr0, | |
| 50 | &clk_mcftmr1, | |
| 51 | &clk_mcftmr2, | |
| 52 | &clk_mcftmr3, | |
| 53 | &clk_mcfuart0, | |
| 54 | &clk_mcfuart1, | |
| 74859523 | 55 | &clk_mcfqspi0, |
| 7acef7a2 GU |
56 | &clk_fec0, |
| 57 | NULL | |
| 58 | }; | |
| 59 | ||
| 60 | /***************************************************************************/ | |
| 61 | ||
| 6b656e8a | 62 | static void __init m5272_uarts_init(void) |
| 84e6defa GU |
63 | { |
| 64 | u32 v; | |
| 65 | ||
| 6b656e8a | 66 | /* Enable the output lines for the serial ports */ |
| 4fb62ede | 67 | v = readl(MCFSIM_PBCNT); |
| 6b656e8a | 68 | v = (v & ~0x000000ff) | 0x00000055; |
| 4fb62ede | 69 | writel(v, MCFSIM_PBCNT); |
| 84e6defa | 70 | |
| 4fb62ede | 71 | v = readl(MCFSIM_PDCNT); |
| 6b656e8a | 72 | v = (v & ~0x000003fc) | 0x000002a8; |
| 4fb62ede | 73 | writel(v, MCFSIM_PDCNT); |
| 84e6defa | 74 | } |
| 1da177e4 LT |
75 | |
| 76 | /***************************************************************************/ | |
| 77 | ||
| 05728aec GU |
78 | static void m5272_cpu_reset(void) |
| 79 | { | |
| 80 | local_irq_disable(); | |
| 81 | /* Set watchdog to reset, and enabled */ | |
| 660b73e3 GU |
82 | __raw_writew(0, MCFSIM_WIRR); |
| 83 | __raw_writew(1, MCFSIM_WRRR); | |
| 84 | __raw_writew(0, MCFSIM_WCR); | |
| 05728aec GU |
85 | for (;;) |
| 86 | /* wait for watchdog to timeout */; | |
| 87 | } | |
| 88 | ||
| 89 | /***************************************************************************/ | |
| 90 | ||
| 84e6defa | 91 | void __init config_BSP(char *commandp, int size) |
| 1da177e4 | 92 | { |
| a7962660 | 93 | #if defined (CONFIG_MOD5272) |
| 1da177e4 | 94 | /* Set base of device vectors to be 64 */ |
| d72a5abb | 95 | writeb(0x40, MCFSIM_PIVR); |
| 1da177e4 LT |
96 | #endif |
| 97 | ||
| bc72450a | 98 | #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES) |
| 1da177e4 LT |
99 | /* Copy command line from FLASH to local buffer... */ |
| 100 | memcpy(commandp, (char *) 0xf0004000, size); | |
| 101 | commandp[size-1] = 0; | |
| 1da177e4 LT |
102 | #elif defined(CONFIG_CANCam) |
| 103 | /* Copy command line from FLASH to local buffer... */ | |
| 104 | memcpy(commandp, (char *) 0xf0010000, size); | |
| 105 | commandp[size-1] = 0; | |
| 1da177e4 LT |
106 | #endif |
| 107 | ||
| 05728aec | 108 | mach_reset = m5272_cpu_reset; |
| 35aefb26 | 109 | mach_sched_init = hw_timer_init; |
| 1da177e4 LT |
110 | } |
| 111 | ||
| 112 | /***************************************************************************/ | |
| 84e6defa | 113 | |
| 41a2159b | 114 | /* |
| 86a8280a | 115 | * Some 5272 based boards have the FEC ethernet directly connected to |
| 41a2159b GU |
116 | * an ethernet switch. In this case we need to use the fixed phy type, |
| 117 | * and we need to declare it early in boot. | |
| 118 | */ | |
| 119 | static struct fixed_phy_status nettel_fixed_phy_status __initdata = { | |
| 120 | .link = 1, | |
| 121 | .speed = 100, | |
| 122 | .duplex = 0, | |
| 123 | }; | |
| 124 | ||
| 125 | /***************************************************************************/ | |
| 126 | ||
| 84e6defa GU |
127 | static int __init init_BSP(void) |
| 128 | { | |
| 129 | m5272_uarts_init(); | |
| a5597008 | 130 | fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status, -1); |
| 84e6defa GU |
131 | return 0; |
| 132 | } | |
| 133 | ||
| 134 | arch_initcall(init_BSP); | |
| 135 | ||
| 136 | /***************************************************************************/ |