projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 1da177e4 LT |
2 | /***************************************************************************/ |
| 3 | ||
| 4 | /* | |
| ece9ae65 | 5 | * m5272.c -- platform support for ColdFire 5272 based boards |
| 1da177e4 LT |
6 | * |
| 7 | * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) | |
| 8 | * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com) | |
| 9 | */ | |
| 10 | ||
| 11 | /***************************************************************************/ | |
| 12 | ||
| 63aadb77 | 13 | #include <linux/clkdev.h> |
| 1da177e4 | 14 | #include <linux/kernel.h> |
| 1da177e4 LT |
15 | #include <linux/param.h> |
| 16 | #include <linux/init.h> | |
| 84e6defa | 17 | #include <linux/io.h> |
| 41a2159b GU |
18 | #include <linux/phy.h> |
| 19 | #include <linux/phy_fixed.h> | |
| 1da177e4 LT |
20 | #include <asm/machdep.h> |
| 21 | #include <asm/coldfire.h> | |
| 1da177e4 | 22 | #include <asm/mcfsim.h> |
| 84e6defa | 23 | #include <asm/mcfuart.h> |
| 7acef7a2 | 24 | #include <asm/mcfclk.h> |
| 1da177e4 LT |
25 | |
| 26 | /***************************************************************************/ | |
| 27 | ||
| 1da177e4 LT |
28 | /* |
| 29 | * Some platforms need software versions of the GPIO data registers. | |
| 30 | */ | |
| 31 | unsigned short ppdata; | |
| 32 | unsigned char ledbank = 0xff; | |
| 33 | ||
| 34 | /***************************************************************************/ | |
| 35 | ||
| 7acef7a2 GU |
36 | DEFINE_CLK(pll, "pll.0", MCF_CLK); |
| 37 | DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); | |
| 63aadb77 AB |
38 | |
| 39 | static struct clk_lookup m5272_clk_lookup[] = { | |
| 40 | CLKDEV_INIT(NULL, "pll.0", &clk_pll), | |
| 41 | CLKDEV_INIT(NULL, "sys.0", &clk_sys), | |
| 42 | CLKDEV_INIT("mcftmr.0", NULL, &clk_sys), | |
| 43 | CLKDEV_INIT("mcftmr.1", NULL, &clk_sys), | |
| 44 | CLKDEV_INIT("mcftmr.2", NULL, &clk_sys), | |
| 45 | CLKDEV_INIT("mcftmr.3", NULL, &clk_sys), | |
| 46 | CLKDEV_INIT("mcfuart.0", NULL, &clk_sys), | |
| 47 | CLKDEV_INIT("mcfuart.1", NULL, &clk_sys), | |
| 48 | CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys), | |
| 49 | CLKDEV_INIT("fec.0", NULL, &clk_sys), | |
| 7acef7a2 GU |
50 | }; |
| 51 | ||
| 52 | /***************************************************************************/ | |
| 53 | ||
| 6b656e8a | 54 | static void __init m5272_uarts_init(void) |
| 84e6defa GU |
55 | { |
| 56 | u32 v; | |
| 57 | ||
| 6b656e8a | 58 | /* Enable the output lines for the serial ports */ |
| 4fb62ede | 59 | v = readl(MCFSIM_PBCNT); |
| 6b656e8a | 60 | v = (v & ~0x000000ff) | 0x00000055; |
| 4fb62ede | 61 | writel(v, MCFSIM_PBCNT); |
| 84e6defa | 62 | |
| 4fb62ede | 63 | v = readl(MCFSIM_PDCNT); |
| 6b656e8a | 64 | v = (v & ~0x000003fc) | 0x000002a8; |
| 4fb62ede | 65 | writel(v, MCFSIM_PDCNT); |
| 84e6defa | 66 | } |
| 1da177e4 LT |
67 | |
| 68 | /***************************************************************************/ | |
| 69 | ||
| 05728aec GU |
70 | static void m5272_cpu_reset(void) |
| 71 | { | |
| 72 | local_irq_disable(); | |
| 73 | /* Set watchdog to reset, and enabled */ | |
| 660b73e3 GU |
74 | __raw_writew(0, MCFSIM_WIRR); |
| 75 | __raw_writew(1, MCFSIM_WRRR); | |
| 76 | __raw_writew(0, MCFSIM_WCR); | |
| 05728aec GU |
77 | for (;;) |
| 78 | /* wait for watchdog to timeout */; | |
| 79 | } | |
| 80 | ||
| 81 | /***************************************************************************/ | |
| 82 | ||
| 84e6defa | 83 | void __init config_BSP(char *commandp, int size) |
| 1da177e4 | 84 | { |
| a7962660 | 85 | #if defined (CONFIG_MOD5272) |
| 1da177e4 | 86 | /* Set base of device vectors to be 64 */ |
| d72a5abb | 87 | writeb(0x40, MCFSIM_PIVR); |
| 1da177e4 LT |
88 | #endif |
| 89 | ||
| bc72450a | 90 | #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES) |
| 1da177e4 LT |
91 | /* Copy command line from FLASH to local buffer... */ |
| 92 | memcpy(commandp, (char *) 0xf0004000, size); | |
| 93 | commandp[size-1] = 0; | |
| 1da177e4 LT |
94 | #elif defined(CONFIG_CANCam) |
| 95 | /* Copy command line from FLASH to local buffer... */ | |
| 96 | memcpy(commandp, (char *) 0xf0010000, size); | |
| 97 | commandp[size-1] = 0; | |
| 1da177e4 LT |
98 | #endif |
| 99 | ||
| 05728aec | 100 | mach_reset = m5272_cpu_reset; |
| 35aefb26 | 101 | mach_sched_init = hw_timer_init; |
| 1da177e4 LT |
102 | } |
| 103 | ||
| 104 | /***************************************************************************/ | |
| 84e6defa | 105 | |
| 41a2159b | 106 | /* |
| 86a8280a | 107 | * Some 5272 based boards have the FEC ethernet directly connected to |
| 41a2159b GU |
108 | * an ethernet switch. In this case we need to use the fixed phy type, |
| 109 | * and we need to declare it early in boot. | |
| 110 | */ | |
| 111 | static struct fixed_phy_status nettel_fixed_phy_status __initdata = { | |
| 112 | .link = 1, | |
| 113 | .speed = 100, | |
| 114 | .duplex = 0, | |
| 115 | }; | |
| 116 | ||
| 117 | /***************************************************************************/ | |
| 118 | ||
| 84e6defa GU |
119 | static int __init init_BSP(void) |
| 120 | { | |
| 121 | m5272_uarts_init(); | |
| 5468e82f | 122 | fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status); |
| 63aadb77 | 123 | clkdev_add_table(m5272_clk_lookup, ARRAY_SIZE(m5272_clk_lookup)); |
| 84e6defa GU |
124 | return 0; |
| 125 | } | |
| 126 | ||
| 127 | arch_initcall(init_BSP); | |
| 128 | ||
| 129 | /***************************************************************************/ |