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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
0e152d80 GU |
2 | comment "Processor Type" |
3 | ||
ad8f955d GU |
4 | choice |
5 | prompt "CPU family support" | |
6 | default M68KCLASSIC if MMU | |
7 | default COLDFIRE if !MMU | |
8 | help | |
9 | The Freescale (was Motorola) M68K family of processors implements | |
10 | the full 68000 processor instruction set. | |
6b2aac42 | 11 | The Freescale ColdFire family of processors is a modern derivative |
ad8f955d GU |
12 | of the 68000 processor family. They are mainly targeted at embedded |
13 | applications, and are all System-On-Chip (SOC) devices, as opposed | |
14 | to stand alone CPUs. They implement a subset of the original 68000 | |
15 | processor instruction set. | |
16 | If you anticipate running this kernel on a computer with a classic | |
17 | MC68xxx processor, select M68KCLASSIC. | |
18 | If you anticipate running this kernel on a computer with a ColdFire | |
19 | processor, select COLDFIRE. | |
20 | ||
21 | config M68KCLASSIC | |
22 | bool "Classic M68K CPU family support" | |
fcd353a3 | 23 | select HAVE_ARCH_PFN_VALID |
ad8f955d GU |
24 | |
25 | config COLDFIRE | |
26 | bool "Coldfire CPU family support" | |
7563bbf8 | 27 | select ARCH_HAVE_CUSTOM_GPIO_H |
ad8f955d | 28 | select CPU_HAS_NO_BITFIELDS |
2189e928 | 29 | select CPU_HAS_NO_CAS |
ad8f955d GU |
30 | select CPU_HAS_NO_MULDIV64 |
31 | select GENERIC_CSUM | |
e05f2e18 | 32 | select GPIOLIB |
bbd7ffdb | 33 | select HAVE_LEGACY_CLK |
ad8f955d GU |
34 | |
35 | endchoice | |
36 | ||
37 | if M68KCLASSIC | |
38 | ||
0e152d80 | 39 | config M68000 |
8b22820e | 40 | bool |
9da1a84a | 41 | depends on !MMU |
0e152d80 | 42 | select CPU_HAS_NO_BITFIELDS |
2189e928 | 43 | select CPU_HAS_NO_CAS |
84f3fb7a | 44 | select CPU_HAS_NO_MULDIV64 |
9f1f1180 | 45 | select CPU_HAS_NO_UNALIGNED |
7f73bafc | 46 | select GENERIC_CSUM |
fff7fb0b | 47 | select CPU_NO_EFFICIENT_FFS |
14c44b95 | 48 | select HAVE_ARCH_HASH |
0e152d80 GU |
49 | help |
50 | The Freescale (was Motorola) 68000 CPU is the first generation of | |
51 | the well known M68K family of processors. The CPU core as well as | |
52 | being available as a stand alone CPU was also used in many | |
53 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain | |
54 | a paging MMU. | |
55 | ||
0e152d80 GU |
56 | config M68020 |
57 | bool "68020 support" | |
58 | depends on MMU | |
e5f8d1f0 | 59 | select FPU |
e08d703c | 60 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
61 | help |
62 | If you anticipate running this kernel on a computer with a MC68020 | |
63 | processor, say Y. Otherwise, say N. Note that the 68020 requires a | |
64 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the | |
65 | Sun 3, which provides its own version. | |
66 | ||
67 | config M68030 | |
68 | bool "68030 support" | |
69 | depends on MMU && !MMU_SUN3 | |
e5f8d1f0 | 70 | select FPU |
e08d703c | 71 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
72 | help |
73 | If you anticipate running this kernel on a computer with a MC68030 | |
74 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not | |
75 | work, as it does not include an MMU (Memory Management Unit). | |
76 | ||
77 | config M68040 | |
78 | bool "68040 support" | |
79 | depends on MMU && !MMU_SUN3 | |
e5f8d1f0 | 80 | select FPU |
e08d703c | 81 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
82 | help |
83 | If you anticipate running this kernel on a computer with a MC68LC040 | |
84 | or MC68040 processor, say Y. Otherwise, say N. Note that an | |
85 | MC68EC040 will not work, as it does not include an MMU (Memory | |
86 | Management Unit). | |
87 | ||
88 | config M68060 | |
89 | bool "68060 support" | |
90 | depends on MMU && !MMU_SUN3 | |
e5f8d1f0 | 91 | select FPU |
e08d703c | 92 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
93 | help |
94 | If you anticipate running this kernel on a computer with a MC68060 | |
95 | processor, say Y. Otherwise, say N. | |
96 | ||
97 | config M68328 | |
8b22820e | 98 | bool |
0e152d80 | 99 | depends on !MMU |
09323308 | 100 | select LEGACY_TIMER_TICK |
0e152d80 GU |
101 | select M68000 |
102 | help | |
103 | Motorola 68328 processor support. | |
104 | ||
105 | config M68EZ328 | |
8b22820e | 106 | bool |
0e152d80 | 107 | depends on !MMU |
09323308 | 108 | select LEGACY_TIMER_TICK |
0e152d80 GU |
109 | select M68000 |
110 | help | |
111 | Motorola 68EX328 processor support. | |
112 | ||
113 | config M68VZ328 | |
8b22820e | 114 | bool |
0e152d80 | 115 | depends on !MMU |
09323308 | 116 | select LEGACY_TIMER_TICK |
0e152d80 GU |
117 | select M68000 |
118 | help | |
119 | Motorola 68VZ328 processor support. | |
120 | ||
ad8f955d GU |
121 | endif # M68KCLASSIC |
122 | ||
123 | if COLDFIRE | |
124 | ||
fa95a1dd GU |
125 | choice |
126 | prompt "ColdFire SoC type" | |
127 | default M520x | |
128 | help | |
129 | Select the type of ColdFire System-on-Chip (SoC) that you want | |
130 | to build for. | |
131 | ||
0e152d80 GU |
132 | config M5206 |
133 | bool "MCF5206" | |
134 | depends on !MMU | |
0e152d80 | 135 | select COLDFIRE_SW_A7 |
275e70e4 | 136 | select COLDFIRE_TIMERS |
0e152d80 | 137 | select HAVE_MBAR |
fff7fb0b | 138 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
139 | help |
140 | Motorola ColdFire 5206 processor support. | |
141 | ||
142 | config M5206e | |
143 | bool "MCF5206e" | |
144 | depends on !MMU | |
0e152d80 | 145 | select COLDFIRE_SW_A7 |
275e70e4 | 146 | select COLDFIRE_TIMERS |
0e152d80 | 147 | select HAVE_MBAR |
fff7fb0b | 148 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
149 | help |
150 | Motorola ColdFire 5206e processor support. | |
151 | ||
152 | config M520x | |
153 | bool "MCF520x" | |
154 | depends on !MMU | |
275e70e4 | 155 | select COLDFIRE_PIT_TIMER |
0e152d80 GU |
156 | select HAVE_CACHE_SPLIT |
157 | help | |
158 | Freescale Coldfire 5207/5208 processor support. | |
159 | ||
160 | config M523x | |
161 | bool "MCF523x" | |
162 | depends on !MMU | |
275e70e4 | 163 | select COLDFIRE_PIT_TIMER |
0e152d80 GU |
164 | select HAVE_CACHE_SPLIT |
165 | select HAVE_IPSBAR | |
166 | help | |
167 | Freescale Coldfire 5230/1/2/4/5 processor support | |
168 | ||
169 | config M5249 | |
170 | bool "MCF5249" | |
171 | depends on !MMU | |
0e152d80 | 172 | select COLDFIRE_SW_A7 |
275e70e4 | 173 | select COLDFIRE_TIMERS |
0e152d80 | 174 | select HAVE_MBAR |
fff7fb0b | 175 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
176 | help |
177 | Motorola ColdFire 5249 processor support. | |
178 | ||
04e037aa SK |
179 | config M525x |
180 | bool "MCF525x" | |
181 | depends on !MMU | |
182 | select COLDFIRE_SW_A7 | |
275e70e4 | 183 | select COLDFIRE_TIMERS |
04e037aa | 184 | select HAVE_MBAR |
fff7fb0b | 185 | select CPU_NO_EFFICIENT_FFS |
04e037aa SK |
186 | help |
187 | Freescale (Motorola) Coldfire 5251/5253 processor support. | |
188 | ||
0e152d80 GU |
189 | config M5271 |
190 | bool "MCF5271" | |
191 | depends on !MMU | |
275e70e4 | 192 | select COLDFIRE_PIT_TIMER |
0e152d80 GU |
193 | select M527x |
194 | select HAVE_CACHE_SPLIT | |
195 | select HAVE_IPSBAR | |
0e152d80 GU |
196 | help |
197 | Freescale (Motorola) ColdFire 5270/5271 processor support. | |
198 | ||
199 | config M5272 | |
200 | bool "MCF5272" | |
201 | depends on !MMU | |
0e152d80 | 202 | select COLDFIRE_SW_A7 |
275e70e4 | 203 | select COLDFIRE_TIMERS |
0e152d80 | 204 | select HAVE_MBAR |
fff7fb0b | 205 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
206 | help |
207 | Motorola ColdFire 5272 processor support. | |
208 | ||
209 | config M5275 | |
210 | bool "MCF5275" | |
211 | depends on !MMU | |
275e70e4 | 212 | select COLDFIRE_PIT_TIMER |
0e152d80 GU |
213 | select M527x |
214 | select HAVE_CACHE_SPLIT | |
215 | select HAVE_IPSBAR | |
0e152d80 GU |
216 | help |
217 | Freescale (Motorola) ColdFire 5274/5275 processor support. | |
218 | ||
219 | config M528x | |
220 | bool "MCF528x" | |
221 | depends on !MMU | |
275e70e4 | 222 | select COLDFIRE_PIT_TIMER |
0e152d80 GU |
223 | select HAVE_CACHE_SPLIT |
224 | select HAVE_IPSBAR | |
225 | help | |
226 | Motorola ColdFire 5280/5282 processor support. | |
227 | ||
228 | config M5307 | |
229 | bool "MCF5307" | |
230 | depends on !MMU | |
275e70e4 | 231 | select COLDFIRE_TIMERS |
0e152d80 GU |
232 | select COLDFIRE_SW_A7 |
233 | select HAVE_CACHE_CB | |
234 | select HAVE_MBAR | |
fff7fb0b | 235 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
236 | help |
237 | Motorola ColdFire 5307 processor support. | |
238 | ||
239 | config M532x | |
240 | bool "MCF532x" | |
241 | depends on !MMU | |
275e70e4 | 242 | select COLDFIRE_TIMERS |
6eac4027 | 243 | select M53xx |
0e152d80 GU |
244 | select HAVE_CACHE_CB |
245 | help | |
246 | Freescale (Motorola) ColdFire 532x processor support. | |
247 | ||
e9d9dc6a GU |
248 | config M537x |
249 | bool "MCF537x" | |
250 | depends on !MMU | |
275e70e4 | 251 | select COLDFIRE_TIMERS |
e9d9dc6a GU |
252 | select M53xx |
253 | select HAVE_CACHE_CB | |
254 | help | |
255 | Freescale ColdFire 537x processor support. | |
256 | ||
0e152d80 GU |
257 | config M5407 |
258 | bool "MCF5407" | |
259 | depends on !MMU | |
0e152d80 | 260 | select COLDFIRE_SW_A7 |
275e70e4 | 261 | select COLDFIRE_TIMERS |
0e152d80 GU |
262 | select HAVE_CACHE_CB |
263 | select HAVE_MBAR | |
fff7fb0b | 264 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
265 | help |
266 | Motorola ColdFire 5407 processor support. | |
267 | ||
0e152d80 GU |
268 | config M547x |
269 | bool "MCF547x" | |
0e152d80 | 270 | select M54xx |
275e70e4 | 271 | select COLDFIRE_SLTIMERS |
1f7034b9 | 272 | select MMU_COLDFIRE if MMU |
e5f8d1f0 | 273 | select FPU if MMU |
0e152d80 GU |
274 | select HAVE_CACHE_CB |
275 | select HAVE_MBAR | |
fff7fb0b | 276 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
277 | help |
278 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. | |
279 | ||
280 | config M548x | |
281 | bool "MCF548x" | |
275e70e4 | 282 | select COLDFIRE_SLTIMERS |
1f7034b9 | 283 | select MMU_COLDFIRE if MMU |
e5f8d1f0 | 284 | select FPU if MMU |
0e152d80 GU |
285 | select M54xx |
286 | select HAVE_CACHE_CB | |
287 | select HAVE_MBAR | |
fff7fb0b | 288 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
289 | help |
290 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. | |
291 | ||
bea8bcb1 SK |
292 | config M5441x |
293 | bool "MCF5441x" | |
275e70e4 | 294 | select COLDFIRE_PIT_TIMER |
b47c7b6f | 295 | select MMU_COLDFIRE if MMU |
bea8bcb1 SK |
296 | select HAVE_CACHE_CB |
297 | help | |
298 | Freescale Coldfire 54410/54415/54416/54417/54418 processor support. | |
299 | ||
fa95a1dd GU |
300 | endchoice |
301 | ||
302 | config M527x | |
303 | bool | |
304 | ||
305 | config M53xx | |
306 | bool | |
307 | ||
308 | config M54xx | |
eb01d42a | 309 | select HAVE_PCI |
fa95a1dd GU |
310 | bool |
311 | ||
275e70e4 AB |
312 | config COLDFIRE_PIT_TIMER |
313 | bool | |
275e70e4 AB |
314 | |
315 | config COLDFIRE_TIMERS | |
316 | bool | |
317 | select LEGACY_TIMER_TICK | |
318 | ||
319 | config COLDFIRE_SLTIMERS | |
320 | bool | |
321 | select LEGACY_TIMER_TICK | |
322 | ||
ad8f955d GU |
323 | endif # COLDFIRE |
324 | ||
0e152d80 GU |
325 | |
326 | comment "Processor Specific Options" | |
327 | ||
328 | config M68KFPU_EMU | |
112f8b12 | 329 | bool "Math emulation support" |
0e152d80 | 330 | depends on MMU |
0e152d80 GU |
331 | help |
332 | At some point in the future, this will cause floating-point math | |
333 | instructions to be emulated by the kernel on machines that lack a | |
334 | floating-point math coprocessor. Thrill-seekers and chronically | |
335 | sleep-deprived psychotic hacker types can say Y now, everyone else | |
336 | should probably wait a while. | |
337 | ||
338 | config M68KFPU_EMU_EXTRAPREC | |
339 | bool "Math emulation extra precision" | |
340 | depends on M68KFPU_EMU | |
341 | help | |
342 | The fpu uses normally a few bit more during calculations for | |
343 | correct rounding, the emulator can (often) do the same but this | |
344 | extra calculation can cost quite some time, so you can disable | |
345 | it here. The emulator will then "only" calculate with a 64 bit | |
346 | mantissa and round slightly incorrect, what is more than enough | |
347 | for normal usage. | |
348 | ||
349 | config M68KFPU_EMU_ONLY | |
350 | bool "Math emulation only kernel" | |
351 | depends on M68KFPU_EMU | |
352 | help | |
353 | This option prevents any floating-point instructions from being | |
354 | compiled into the kernel, thereby the kernel doesn't save any | |
355 | floating point context anymore during task switches, so this | |
356 | kernel will only be usable on machines without a floating-point | |
357 | math coprocessor. This makes the kernel a bit faster as no tests | |
358 | needs to be executed whether a floating-point instruction in the | |
359 | kernel should be executed or not. | |
360 | ||
361 | config ADVANCED | |
362 | bool "Advanced configuration options" | |
363 | depends on MMU | |
a7f7f624 | 364 | help |
0e152d80 GU |
365 | This gives you access to some advanced options for the CPU. The |
366 | defaults should be fine for most users, but these options may make | |
367 | it possible for you to improve performance somewhat if you know what | |
368 | you are doing. | |
369 | ||
370 | Note that the answer to this question won't directly affect the | |
371 | kernel: saying N will just cause the configurator to skip all | |
372 | the questions about these options. | |
373 | ||
374 | Most users should say N to this question. | |
375 | ||
376 | config RMW_INSNS | |
377 | bool "Use read-modify-write instructions" | |
2189e928 | 378 | depends on ADVANCED && !CPU_HAS_NO_CAS |
a7f7f624 | 379 | help |
0e152d80 GU |
380 | This allows to use certain instructions that work with indivisible |
381 | read-modify-write bus cycles. While this is faster than the | |
382 | workaround of disabling interrupts, it can conflict with DMA | |
383 | ( = direct memory access) on many Amiga systems, and it is also said | |
384 | to destabilize other machines. It is very likely that this will | |
385 | cause serious problems on any Amiga or Atari Medusa if set. The only | |
386 | configuration where it should work are 68030-based Ataris, where it | |
387 | apparently improves performance. But you've been warned! Unless you | |
388 | really know what you are doing, say N. Try Y only if you're quite | |
389 | adventurous. | |
390 | ||
391 | config SINGLE_MEMORY_CHUNK | |
392 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 | |
393 | depends on MMU | |
6b2ad8d7 | 394 | default y if SUN3 || MMU_COLDFIRE |
0e152d80 GU |
395 | help |
396 | Ignore all but the first contiguous chunk of physical memory for VM | |
397 | purposes. This will save a few bytes kernel size and may speed up | |
fcd353a3 MR |
398 | some operations. |
399 | When this option os set to N, you may want to lower "Maximum zone | |
400 | order" to save memory that could be wasted for unused memory map. | |
401 | Say N if not sure. | |
0e152d80 | 402 | |
fcd353a3 MR |
403 | config FORCE_MAX_ZONEORDER |
404 | int "Maximum zone order" if ADVANCED | |
405 | depends on !SINGLE_MEMORY_CHUNK | |
406 | default "11" | |
407 | help | |
408 | The kernel memory allocator divides physically contiguous memory | |
409 | blocks into "zones", where each zone is a power of two number of | |
410 | pages. This option selects the largest power of two that the kernel | |
411 | keeps in the memory allocator. If you need to allocate very large | |
412 | blocks of physically contiguous memory, then you may need to | |
413 | increase this value. | |
414 | ||
415 | For systems that have holes in their physical address space this | |
416 | value also defines the minimal size of the hole that allows | |
417 | freeing unused memory map. | |
418 | ||
419 | This config option is actually maximum order plus one. For example, | |
420 | a value of 11 means that the largest free memory block is 2^10 pages. | |
421 | ||
0e152d80 GU |
422 | config 060_WRITETHROUGH |
423 | bool "Use write-through caching for 68060 supervisor accesses" | |
424 | depends on ADVANCED && M68060 | |
a7f7f624 | 425 | help |
0e152d80 GU |
426 | The 68060 generally uses copyback caching of recently accessed data. |
427 | Copyback caching means that memory writes will be held in an on-chip | |
428 | cache and only written back to memory some time later. Saying Y | |
429 | here will force supervisor (kernel) accesses to use writethrough | |
430 | caching. Writethrough caching means that data is written to memory | |
431 | straight away, so that cache and memory data always agree. | |
432 | Writethrough caching is less efficient, but is needed for some | |
433 | drivers on 68060 based systems where the 68060 bus snooping signal | |
434 | is hardwired on. The 53c710 SCSI driver is known to suffer from | |
435 | this problem. | |
436 | ||
437 | config M68K_L2_CACHE | |
438 | bool | |
439 | depends on MAC | |
440 | default y | |
441 | ||
022613e0 GU |
442 | config CPU_HAS_NO_BITFIELDS |
443 | bool | |
444 | ||
2189e928 GU |
445 | config CPU_HAS_NO_CAS |
446 | bool | |
447 | ||
022613e0 GU |
448 | config CPU_HAS_NO_MULDIV64 |
449 | bool | |
450 | ||
9f1f1180 GU |
451 | config CPU_HAS_NO_UNALIGNED |
452 | bool | |
453 | ||
022613e0 GU |
454 | config CPU_HAS_ADDRESS_SPACES |
455 | bool | |
456 | ||
0e152d80 GU |
457 | config FPU |
458 | bool | |
459 | ||
460 | config COLDFIRE_SW_A7 | |
461 | bool | |
462 | ||
463 | config HAVE_CACHE_SPLIT | |
464 | bool | |
465 | ||
466 | config HAVE_CACHE_CB | |
467 | bool | |
468 | ||
469 | config HAVE_MBAR | |
470 | bool | |
471 | ||
472 | config HAVE_IPSBAR | |
473 | bool | |
474 | ||
0e152d80 GU |
475 | config CLOCK_FREQ |
476 | int "Set the core clock frequency" | |
15c2ca4e GU |
477 | default "25000000" if M5206 |
478 | default "54000000" if M5206e | |
479 | default "166666666" if M520x | |
480 | default "140000000" if M5249 | |
481 | default "150000000" if M527x || M523x | |
482 | default "90000000" if M5307 | |
483 | default "50000000" if M5407 | |
484 | default "266000000" if M54xx | |
0e152d80 | 485 | default "66666666" |
d9ee4896 | 486 | depends on COLDFIRE |
0e152d80 GU |
487 | help |
488 | Define the CPU clock frequency in use. This is the core clock | |
489 | frequency, it may or may not be the same as the external clock | |
490 | crystal fitted to your board. Some processors have an internal | |
491 | PLL and can have their frequency programmed at run time, others | |
492 | use internal dividers. In general the kernel won't setup a PLL | |
493 | if it is fitted (there are some exceptions). This value will be | |
494 | specific to the exact CPU that you are using. | |
495 | ||
496 | config OLDMASK | |
497 | bool "Old mask 5307 (1H55J) silicon" | |
498 | depends on M5307 | |
499 | help | |
500 | Build support for the older revision ColdFire 5307 silicon. | |
501 | Specifically this is the 1H55J mask revision. | |
502 | ||
503 | if HAVE_CACHE_SPLIT | |
504 | choice | |
505 | prompt "Split Cache Configuration" | |
506 | default CACHE_I | |
507 | ||
508 | config CACHE_I | |
509 | bool "Instruction" | |
510 | help | |
511 | Use all of the ColdFire CPU cache memory as an instruction cache. | |
512 | ||
513 | config CACHE_D | |
514 | bool "Data" | |
515 | help | |
516 | Use all of the ColdFire CPU cache memory as a data cache. | |
517 | ||
518 | config CACHE_BOTH | |
519 | bool "Both" | |
520 | help | |
521 | Split the ColdFire CPU cache, and use half as an instruction cache | |
522 | and half as a data cache. | |
523 | endchoice | |
524 | endif | |
525 | ||
526 | if HAVE_CACHE_CB | |
527 | choice | |
528 | prompt "Data cache mode" | |
529 | default CACHE_WRITETHRU | |
530 | ||
531 | config CACHE_WRITETHRU | |
532 | bool "Write-through" | |
533 | help | |
534 | The ColdFire CPU cache is set into Write-through mode. | |
535 | ||
536 | config CACHE_COPYBACK | |
537 | bool "Copy-back" | |
538 | help | |
539 | The ColdFire CPU cache is set into Copy-back mode. | |
540 | endchoice | |
541 | endif |