[linux-block.git] / arch / m32r / kernel / setup_mappi3.c

/*
 *  linux/arch/m32r/kernel/setup_mappi3.c
 *
 *  Setup routines for Renesas MAPPI-III(M3A-2170) Board
 *
 *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
 *                           Hitoshi Yamamoto, Mamoru Sakugawa
 */

#include <linux/config.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>

#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))

#ifndef CONFIG_SMP
typedef struct {
	unsigned long icucr;  /* ICU Control Register */
} icu_data_t;
#endif /* CONFIG_SMP */

icu_data_t icu_data[NR_IRQS];

static void disable_mappi3_irq(unsigned int irq)
{
	unsigned long port, data;

	if ((irq == 0) ||(irq >= NR_IRQS))  {
		printk("bad irq 0x%08x\n", irq);
		return;
	}
	port = irq2port(irq);
	data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
	outl(data, port);
}

static void enable_mappi3_irq(unsigned int irq)
{
	unsigned long port, data;

	if ((irq == 0) ||(irq >= NR_IRQS))  {
		printk("bad irq 0x%08x\n", irq);
		return;
	}
	port = irq2port(irq);
	data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
	outl(data, port);
}

static void mask_and_ack_mappi3(unsigned int irq)
{
	disable_mappi3_irq(irq);
}

static void end_mappi3_irq(unsigned int irq)
{
	enable_mappi3_irq(irq);
}

static unsigned int startup_mappi3_irq(unsigned int irq)
{
	enable_mappi3_irq(irq);
	return (0);
}

static void shutdown_mappi3_irq(unsigned int irq)
{
	unsigned long port;

	port = irq2port(irq);
	outl(M32R_ICUCR_ILEVEL7, port);
}

static struct hw_interrupt_type mappi3_irq_type =
{
	.typename = "MAPPI3-IRQ",
	.startup = startup_mappi3_irq,
	.shutdown = shutdown_mappi3_irq,
	.enable = enable_mappi3_irq,
	.disable = disable_mappi3_irq,
	.ack = mask_and_ack_mappi3,
	.end = end_mappi3_irq
};

void __init init_IRQ(void)
{
#if defined(CONFIG_SMC91X)
	/* INT0 : LAN controller (SMC91111) */
	irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type;
	irq_desc[M32R_IRQ_INT0].action = 0;
	irq_desc[M32R_IRQ_INT0].depth = 1;
	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
	disable_mappi3_irq(M32R_IRQ_INT0);
#endif  /* CONFIG_SMC91X */

	/* MFT2 : system timer */
	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type;
	irq_desc[M32R_IRQ_MFT2].action = 0;
	irq_desc[M32R_IRQ_MFT2].depth = 1;
	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
	disable_mappi3_irq(M32R_IRQ_MFT2);

#ifdef CONFIG_SERIAL_M32R_SIO
	/* SIO0_R : uart receive data */
	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type;
	irq_desc[M32R_IRQ_SIO0_R].action = 0;
	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
	disable_mappi3_irq(M32R_IRQ_SIO0_R);

	/* SIO0_S : uart send data */
	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type;
	irq_desc[M32R_IRQ_SIO0_S].action = 0;
	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
	disable_mappi3_irq(M32R_IRQ_SIO0_S);
	/* SIO1_R : uart receive data */
	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type;
	irq_desc[M32R_IRQ_SIO1_R].action = 0;
	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
	disable_mappi3_irq(M32R_IRQ_SIO1_R);

	/* SIO1_S : uart send data */
	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type;
	irq_desc[M32R_IRQ_SIO1_S].action = 0;
	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
	disable_mappi3_irq(M32R_IRQ_SIO1_S);
#endif  /* CONFIG_M32R_USE_DBG_CONSOLE */

#if defined(CONFIG_USB)
	/* INT1 : USB Host controller interrupt */
	irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
	irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type;
	irq_desc[M32R_IRQ_INT1].action = 0;
	irq_desc[M32R_IRQ_INT1].depth = 1;
	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
	disable_mappi3_irq(M32R_IRQ_INT1);
#endif /* CONFIG_USB */

	/* ICUCR40: CFC IREQ */
	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
	irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
	irq_desc[PLD_IRQ_CFIREQ].action = 0;
	irq_desc[PLD_IRQ_CFIREQ].depth = 1;	/* disable nested irq */
	icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
	disable_mappi3_irq(PLD_IRQ_CFIREQ);

#if defined(CONFIG_M32R_CFC)
	/* ICUCR41: CFC Insert */
	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
	irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1;	/* disable nested irq */
	icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
	disable_mappi3_irq(PLD_IRQ_CFC_INSERT);

	/* ICUCR42: CFC Eject */
	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
	irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi3_irq_type;
	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;	/* disable nested irq */
	icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
	disable_mappi3_irq(PLD_IRQ_CFC_EJECT);
#endif /* CONFIG_M32R_CFC */
}

#if defined(CONFIG_SMC91X)

#define LAN_IOSTART     0x300
#define LAN_IOEND       0x320
static struct resource smc91x_resources[] = {
	[0] = {
		.start  = (LAN_IOSTART),
		.end    = (LAN_IOEND),
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = M32R_IRQ_INT0,
		.end    = M32R_IRQ_INT0,
		.flags  = IORESOURCE_IRQ,
	}
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources  = ARRAY_SIZE(smc91x_resources),
	.resource       = smc91x_resources,
};

#endif

#if defined(CONFIG_FB_S1D13XXX)

#include <video/s1d13xxxfb.h>
#include <asm/s1d13806.h>

static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
	.initregs		= s1d13xxxfb_initregs,
	.initregssize		= ARRAY_SIZE(s1d13xxxfb_initregs),
	.platform_init_video	= NULL,
#ifdef CONFIG_PM
	.platform_suspend_video	= NULL,
	.platform_resume_video	= NULL,
#endif
};

static struct resource s1d13xxxfb_resources[] = {
	[0] = {
		.start  = 0x1d600000UL,
		.end    = 0x1d73FFFFUL,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 0x1d400000UL,
		.end    = 0x1d4001FFUL,
		.flags  = IORESOURCE_MEM,
	}
};

static struct platform_device s1d13xxxfb_device = {
	.name		= S1D_DEVICENAME,
	.id		= 0,
	.dev            = {
		.platform_data  = &s1d13xxxfb_data,
	},
	.num_resources  = ARRAY_SIZE(s1d13xxxfb_resources),
	.resource       = s1d13xxxfb_resources,
};
#endif

static int __init platform_init(void)
{
#if defined(CONFIG_SMC91X)
	platform_device_register(&smc91x_device);
#endif
#if defined(CONFIG_FB_S1D13XXX)
	platform_device_register(&s1d13xxxfb_device);
#endif
	return 0;
}
arch_initcall(platform_init);
Commit	Line	Data
23680863 HT	1	/*
	2	* linux/arch/m32r/kernel/setup_mappi3.c
	3	*
	4	* Setup routines for Renesas MAPPI-III(M3A-2170) Board
	5	*
316240f6 HT	6	* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
316240f6 HT	7	* Hitoshi Yamamoto, Mamoru Sakugawa
23680863 HT	8	*/
	9
	10	#include <linux/config.h>
	11	#include <linux/irq.h>
	12	#include <linux/kernel.h>
	13	#include <linux/init.h>
d052d1be	14	#include <linux/platform_device.h>
23680863 HT	15
	16	#include <asm/system.h>
	17	#include <asm/m32r.h>
	18	#include <asm/io.h>
	19
	20	#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
	21
	22	#ifndef CONFIG_SMP
	23	typedef struct {
	24	unsigned long icucr; /* ICU Control Register */
	25	} icu_data_t;
	26	#endif /* CONFIG_SMP */
	27
	28	icu_data_t icu_data[NR_IRQS];
	29
	30	static void disable_mappi3_irq(unsigned int irq)
	31	{
	32	unsigned long port, data;
	33
	34	if ((irq == 0) \|\|(irq >= NR_IRQS)) {
	35	printk("bad irq 0x%08x\n", irq);
	36	return;
	37	}
	38	port = irq2port(irq);
	39	data = icu_data[irq].icucr\|M32R_ICUCR_ILEVEL7;
	40	outl(data, port);
	41	}
	42
	43	static void enable_mappi3_irq(unsigned int irq)
	44	{
	45	unsigned long port, data;
	46
	47	if ((irq == 0) \|\|(irq >= NR_IRQS)) {
	48	printk("bad irq 0x%08x\n", irq);
	49	return;
	50	}
	51	port = irq2port(irq);
	52	data = icu_data[irq].icucr\|M32R_ICUCR_IEN\|M32R_ICUCR_ILEVEL6;
	53	outl(data, port);
	54	}
	55
	56	static void mask_and_ack_mappi3(unsigned int irq)
	57	{
	58	disable_mappi3_irq(irq);
	59	}
	60
	61	static void end_mappi3_irq(unsigned int irq)
	62	{
	63	enable_mappi3_irq(irq);
	64	}
	65
	66	static unsigned int startup_mappi3_irq(unsigned int irq)
	67	{
	68	enable_mappi3_irq(irq);
	69	return (0);
	70	}
	71
	72	static void shutdown_mappi3_irq(unsigned int irq)
	73	{
	74	unsigned long port;
	75
	76	port = irq2port(irq);
	77	outl(M32R_ICUCR_ILEVEL7, port);
	78	}
79
80	static struct hw_interrupt_type mappi3_irq_type =
81	{
6f973b00 HT	82	.typename = "MAPPI3-IRQ",
	83	.startup = startup_mappi3_irq,
	84	.shutdown = shutdown_mappi3_irq,
	85	.enable = enable_mappi3_irq,
	86	.disable = disable_mappi3_irq,
	87	.ack = mask_and_ack_mappi3,
	88	.end = end_mappi3_irq
23680863 HT	89	};
	90
	91	void __init init_IRQ(void)
	92	{
	93	#if defined(CONFIG_SMC91X)
	94	/* INT0 : LAN controller (SMC91111) */
	95	irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
	96	irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type;
	97	irq_desc[M32R_IRQ_INT0].action = 0;
	98	irq_desc[M32R_IRQ_INT0].depth = 1;
	99	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD10;
	100	disable_mappi3_irq(M32R_IRQ_INT0);
	101	#endif /* CONFIG_SMC91X */
	102
	103	/* MFT2 : system timer */
	104	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
	105	irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type;
	106	irq_desc[M32R_IRQ_MFT2].action = 0;
	107	irq_desc[M32R_IRQ_MFT2].depth = 1;
	108	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
	109	disable_mappi3_irq(M32R_IRQ_MFT2);
	110
	111	#ifdef CONFIG_SERIAL_M32R_SIO
	112	/* SIO0_R : uart receive data */
	113	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
	114	irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type;
	115	irq_desc[M32R_IRQ_SIO0_R].action = 0;
	116	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
	117	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
	118	disable_mappi3_irq(M32R_IRQ_SIO0_R);
	119
	120	/* SIO0_S : uart send data */
	121	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
	122	irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type;
	123	irq_desc[M32R_IRQ_SIO0_S].action = 0;
	124	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
	125	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
	126	disable_mappi3_irq(M32R_IRQ_SIO0_S);
	127	/* SIO1_R : uart receive data */
	128	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
	129	irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type;
	130	irq_desc[M32R_IRQ_SIO1_R].action = 0;
	131	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
	132	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
	133	disable_mappi3_irq(M32R_IRQ_SIO1_R);
	134
	135	/* SIO1_S : uart send data */
	136	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
	137	irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type;
	138	irq_desc[M32R_IRQ_SIO1_S].action = 0;
	139	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
	140	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
	141	disable_mappi3_irq(M32R_IRQ_SIO1_S);
	142	#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
	143
	144	#if defined(CONFIG_USB)
	145	/* INT1 : USB Host controller interrupt */
	146	irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
	147	irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type;
	148	irq_desc[M32R_IRQ_INT1].action = 0;
	149	irq_desc[M32R_IRQ_INT1].depth = 1;
	150	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
	151	disable_mappi3_irq(M32R_IRQ_INT1);
	152	#endif /* CONFIG_USB */
153
154	/* ICUCR40: CFC IREQ */
155	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
156	irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
157	irq_desc[PLD_IRQ_CFIREQ].action = 0;
158	irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
159	icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD01;
160	disable_mappi3_irq(PLD_IRQ_CFIREQ);
161
162	#if defined(CONFIG_M32R_CFC)
163	/* ICUCR41: CFC Insert */
164	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
165	irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
166	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
167	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
168	icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD00;
169	disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
170
171	/* ICUCR42: CFC Eject */
172	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
173	irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi3_irq_type;
174	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
175	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
176	icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD10;
177	disable_mappi3_irq(PLD_IRQ_CFC_EJECT);
178	#endif /* CONFIG_M32R_CFC */
179	}
180
316240f6 HT	181	#if defined(CONFIG_SMC91X)
316240f6 HT	182
23680863 HT	183	#define LAN_IOSTART 0x300
	184	#define LAN_IOEND 0x320
	185	static struct resource smc91x_resources[] = {
	186	[0] = {
	187	.start = (LAN_IOSTART),
	188	.end = (LAN_IOEND),
	189	.flags = IORESOURCE_MEM,
	190	},
	191	[1] = {
	192	.start = M32R_IRQ_INT0,
	193	.end = M32R_IRQ_INT0,
	194	.flags = IORESOURCE_IRQ,
	195	}
	196	};
	197
	198	static struct platform_device smc91x_device = {
	199	.name = "smc91x",
	200	.id = 0,
	201	.num_resources = ARRAY_SIZE(smc91x_resources),
	202	.resource = smc91x_resources,
	203	};
	204
316240f6 HT	205	#endif
	206
	207	#if defined(CONFIG_FB_S1D13XXX)
	208
	209	#include <video/s1d13xxxfb.h>
	210	#include <asm/s1d13806.h>
	211
	212	static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
	213	.initregs = s1d13xxxfb_initregs,
	214	.initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
	215	.platform_init_video = NULL,
	216	#ifdef CONFIG_PM
	217	.platform_suspend_video = NULL,
	218	.platform_resume_video = NULL,
	219	#endif
	220	};
	221
	222	static struct resource s1d13xxxfb_resources[] = {
	223	[0] = {
	224	.start = 0x1d600000UL,
	225	.end = 0x1d73FFFFUL,
	226	.flags = IORESOURCE_MEM,
	227	},
	228	[1] = {
	229	.start = 0x1d400000UL,
	230	.end = 0x1d4001FFUL,
	231	.flags = IORESOURCE_MEM,
	232	}
	233	};
	234
	235	static struct platform_device s1d13xxxfb_device = {
	236	.name = S1D_DEVICENAME,
	237	.id = 0,
	238	.dev = {
	239	.platform_data = &s1d13xxxfb_data,
	240	},
	241	.num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
	242	.resource = s1d13xxxfb_resources,
	243	};
	244	#endif
	245
23680863 HT	246	static int __init platform_init(void)
23680863 HT	247	{
316240f6	248	#if defined(CONFIG_SMC91X)
23680863	249	platform_device_register(&smc91x_device);
316240f6 HT	250	#endif
	251	#if defined(CONFIG_FB_S1D13XXX)
	252	platform_device_register(&s1d13xxxfb_device);
	253	#endif
23680863 HT	254	return 0;
	255	}
	256	arch_initcall(platform_init);