Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/m32r/kernel/setup.c | |
3 | * | |
4 | * Setup routines for Renesas M32R | |
5 | * | |
6 | * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata, | |
7 | * Hitoshi Yamamoto | |
8 | */ | |
9 | ||
1da177e4 | 10 | #include <linux/init.h> |
7c1c4e54 | 11 | #include <linux/kernel.h> |
1da177e4 LT |
12 | #include <linux/stddef.h> |
13 | #include <linux/fs.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/ioport.h> | |
16 | #include <linux/mm.h> | |
17 | #include <linux/bootmem.h> | |
18 | #include <linux/console.h> | |
19 | #include <linux/initrd.h> | |
20 | #include <linux/major.h> | |
21 | #include <linux/root_dev.h> | |
22 | #include <linux/seq_file.h> | |
23 | #include <linux/timex.h> | |
894673ee | 24 | #include <linux/screen_info.h> |
1da177e4 LT |
25 | #include <linux/cpu.h> |
26 | #include <linux/nodemask.h> | |
22a9835c | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | |
29 | #include <asm/processor.h> | |
30 | #include <asm/pgtable.h> | |
31 | #include <asm/io.h> | |
32 | #include <asm/mmu_context.h> | |
33 | #include <asm/m32r.h> | |
34 | #include <asm/setup.h> | |
35 | #include <asm/sections.h> | |
36 | ||
37 | #ifdef CONFIG_MMU | |
38 | extern void init_mmu(void); | |
39 | #endif | |
40 | ||
1da177e4 LT |
41 | extern char _end[]; |
42 | ||
43 | /* | |
44 | * Machine setup.. | |
45 | */ | |
46 | struct cpuinfo_m32r boot_cpu_data; | |
47 | ||
48 | #ifdef CONFIG_BLK_DEV_RAM | |
49 | extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */ | |
50 | extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */ | |
51 | extern int rd_image_start; /* starting block # of image */ | |
52 | #endif | |
53 | ||
54 | #if defined(CONFIG_VGA_CONSOLE) | |
55 | struct screen_info screen_info = { | |
56 | .orig_video_lines = 25, | |
57 | .orig_video_cols = 80, | |
58 | .orig_video_mode = 0, | |
59 | .orig_video_ega_bx = 0, | |
60 | .orig_video_isVGA = 1, | |
61 | .orig_video_points = 8 | |
62 | }; | |
63 | #endif | |
64 | ||
65 | extern int root_mountflags; | |
66 | ||
3561794d | 67 | static char __initdata command_line[COMMAND_LINE_SIZE]; |
1da177e4 LT |
68 | |
69 | static struct resource data_resource = { | |
70 | .name = "Kernel data", | |
71 | .start = 0, | |
72 | .end = 0, | |
73 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM | |
74 | }; | |
75 | ||
76 | static struct resource code_resource = { | |
77 | .name = "Kernel code", | |
78 | .start = 0, | |
79 | .end = 0, | |
80 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM | |
81 | }; | |
82 | ||
83 | unsigned long memory_start; | |
84 | unsigned long memory_end; | |
85 | ||
86 | void __init setup_arch(char **); | |
87 | int get_cpuinfo(char *); | |
88 | ||
89 | static __inline__ void parse_mem_cmdline(char ** cmdline_p) | |
90 | { | |
91 | char c = ' '; | |
92 | char *to = command_line; | |
93 | char *from = COMMAND_LINE; | |
94 | int len = 0; | |
95 | int usermem = 0; | |
96 | ||
97 | /* Save unparsed command line copy for /proc/cmdline */ | |
3561794d ABL |
98 | memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE); |
99 | boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; | |
1da177e4 LT |
100 | |
101 | memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET; | |
102 | memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE; | |
103 | ||
104 | for ( ; ; ) { | |
105 | if (c == ' ' && !memcmp(from, "mem=", 4)) { | |
106 | if (to != command_line) | |
107 | to--; | |
108 | ||
109 | { | |
110 | unsigned long mem_size; | |
111 | ||
112 | usermem = 1; | |
113 | mem_size = memparse(from+4, &from); | |
114 | memory_end = memory_start + mem_size; | |
115 | } | |
116 | } | |
117 | c = *(from++); | |
118 | if (!c) | |
119 | break; | |
120 | ||
121 | if (COMMAND_LINE_SIZE <= ++len) | |
122 | break; | |
123 | ||
124 | *(to++) = c; | |
125 | } | |
126 | *to = '\0'; | |
127 | *cmdline_p = command_line; | |
128 | if (usermem) | |
129 | printk(KERN_INFO "user-defined physical RAM map:\n"); | |
130 | } | |
131 | ||
132 | #ifndef CONFIG_DISCONTIGMEM | |
133 | static unsigned long __init setup_memory(void) | |
134 | { | |
135 | unsigned long start_pfn, max_low_pfn, bootmap_size; | |
136 | ||
137 | start_pfn = PFN_UP( __pa(_end) ); | |
138 | max_low_pfn = PFN_DOWN( __pa(memory_end) ); | |
139 | ||
140 | /* | |
141 | * Initialize the boot-time allocator (with low memory only): | |
142 | */ | |
143 | bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, | |
144 | CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn); | |
145 | ||
146 | /* | |
147 | * Register fully available low RAM pages with the bootmem allocator. | |
148 | */ | |
149 | { | |
150 | unsigned long curr_pfn; | |
151 | unsigned long last_pfn; | |
152 | unsigned long pages; | |
153 | ||
154 | /* | |
155 | * We are rounding up the start address of usable memory: | |
156 | */ | |
157 | curr_pfn = PFN_UP(__pa(memory_start)); | |
158 | ||
159 | /* | |
160 | * ... and at the end of the usable range downwards: | |
161 | */ | |
162 | last_pfn = PFN_DOWN(__pa(memory_end)); | |
163 | ||
164 | if (last_pfn > max_low_pfn) | |
165 | last_pfn = max_low_pfn; | |
166 | ||
167 | pages = last_pfn - curr_pfn; | |
168 | free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages)); | |
169 | } | |
170 | ||
171 | /* | |
172 | * Reserve the kernel text and | |
173 | * Reserve the bootmem bitmap. We do this in two steps (first step | |
174 | * was init_bootmem()), because this catches the (definitely buggy) | |
175 | * case of us accidentally initializing the bootmem allocator with | |
176 | * an invalid RAM area. | |
177 | */ | |
178 | reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE, | |
179 | (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1) | |
72a7fe39 BW |
180 | - CONFIG_MEMORY_START, |
181 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
182 | |
183 | /* | |
184 | * reserve physical page 0 - it's a special BIOS page on many boxes, | |
185 | * enabling clean reboots, SMP operation, laptop functions. | |
186 | */ | |
72a7fe39 | 187 | reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE, BOOTMEM_DEFAULT); |
1da177e4 LT |
188 | |
189 | /* | |
190 | * reserve memory hole | |
191 | */ | |
192 | #ifdef CONFIG_MEMHOLE | |
72a7fe39 BW |
193 | reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE, |
194 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
195 | #endif |
196 | ||
197 | #ifdef CONFIG_BLK_DEV_INITRD | |
198 | if (LOADER_TYPE && INITRD_START) { | |
199 | if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) { | |
72a7fe39 BW |
200 | reserve_bootmem(INITRD_START, INITRD_SIZE, |
201 | BOOTMEM_DEFAULT); | |
19e5d9c0 | 202 | initrd_start = INITRD_START + PAGE_OFFSET; |
1da177e4 LT |
203 | initrd_end = initrd_start + INITRD_SIZE; |
204 | printk("initrd:start[%08lx],size[%08lx]\n", | |
205 | initrd_start, INITRD_SIZE); | |
206 | } else { | |
207 | printk("initrd extends beyond end of memory " | |
208 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", | |
209 | INITRD_START + INITRD_SIZE, | |
210 | max_low_pfn << PAGE_SHIFT); | |
211 | ||
212 | initrd_start = 0; | |
213 | } | |
214 | } | |
215 | #endif | |
216 | ||
217 | return max_low_pfn; | |
218 | } | |
219 | #else /* CONFIG_DISCONTIGMEM */ | |
220 | extern unsigned long setup_memory(void); | |
221 | #endif /* CONFIG_DISCONTIGMEM */ | |
222 | ||
1da177e4 LT |
223 | void __init setup_arch(char **cmdline_p) |
224 | { | |
225 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); | |
226 | ||
227 | boot_cpu_data.cpu_clock = M32R_CPUCLK; | |
228 | boot_cpu_data.bus_clock = M32R_BUSCLK; | |
229 | boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE; | |
230 | ||
231 | #ifdef CONFIG_BLK_DEV_RAM | |
232 | rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; | |
233 | rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); | |
234 | rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); | |
235 | #endif | |
236 | ||
237 | if (!MOUNT_ROOT_RDONLY) | |
238 | root_mountflags &= ~MS_RDONLY; | |
239 | ||
240 | #ifdef CONFIG_VT | |
241 | #if defined(CONFIG_VGA_CONSOLE) | |
242 | conswitchp = &vga_con; | |
243 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
244 | conswitchp = &dummy_con; | |
245 | #endif | |
246 | #endif | |
247 | ||
248 | #ifdef CONFIG_DISCONTIGMEM | |
249 | nodes_clear(node_online_map); | |
250 | node_set_online(0); | |
251 | node_set_online(1); | |
252 | #endif /* CONFIG_DISCONTIGMEM */ | |
253 | ||
254 | init_mm.start_code = (unsigned long) _text; | |
255 | init_mm.end_code = (unsigned long) _etext; | |
256 | init_mm.end_data = (unsigned long) _edata; | |
257 | init_mm.brk = (unsigned long) _end; | |
258 | ||
259 | code_resource.start = virt_to_phys(_text); | |
260 | code_resource.end = virt_to_phys(_etext)-1; | |
261 | data_resource.start = virt_to_phys(_etext); | |
262 | data_resource.end = virt_to_phys(_edata)-1; | |
263 | ||
264 | parse_mem_cmdline(cmdline_p); | |
265 | ||
266 | setup_memory(); | |
267 | ||
268 | paging_init(); | |
269 | } | |
270 | ||
7c1c4e54 | 271 | static struct cpu cpu_devices[NR_CPUS]; |
1da177e4 LT |
272 | |
273 | static int __init topology_init(void) | |
274 | { | |
7c1c4e54 | 275 | int i; |
1da177e4 | 276 | |
7c1c4e54 | 277 | for_each_present_cpu(i) |
76b67ed9 | 278 | register_cpu(&cpu_devices[i], i); |
1da177e4 LT |
279 | |
280 | return 0; | |
281 | } | |
282 | ||
283 | subsys_initcall(topology_init); | |
284 | ||
285 | #ifdef CONFIG_PROC_FS | |
286 | /* | |
287 | * Get CPU information for use by the procfs. | |
288 | */ | |
289 | static int show_cpuinfo(struct seq_file *m, void *v) | |
290 | { | |
291 | struct cpuinfo_m32r *c = v; | |
292 | unsigned long cpu = c - cpu_data; | |
293 | ||
294 | #ifdef CONFIG_SMP | |
295 | if (!cpu_online(cpu)) | |
296 | return 0; | |
297 | #endif /* CONFIG_SMP */ | |
298 | ||
299 | seq_printf(m, "processor\t: %ld\n", cpu); | |
300 | ||
c978b017 | 301 | #if defined(CONFIG_CHIP_VDEC2) |
1da177e4 LT |
302 | seq_printf(m, "cpu family\t: VDEC2\n" |
303 | "cache size\t: Unknown\n"); | |
c978b017 | 304 | #elif defined(CONFIG_CHIP_M32700) |
1da177e4 LT |
305 | seq_printf(m,"cpu family\t: M32700\n" |
306 | "cache size\t: I-8KB/D-8KB\n"); | |
c978b017 | 307 | #elif defined(CONFIG_CHIP_M32102) |
1da177e4 LT |
308 | seq_printf(m,"cpu family\t: M32102\n" |
309 | "cache size\t: I-8KB\n"); | |
c978b017 | 310 | #elif defined(CONFIG_CHIP_OPSP) |
1da177e4 LT |
311 | seq_printf(m,"cpu family\t: OPSP\n" |
312 | "cache size\t: I-8KB/D-8KB\n"); | |
c978b017 | 313 | #elif defined(CONFIG_CHIP_MP) |
1da177e4 LT |
314 | seq_printf(m, "cpu family\t: M32R-MP\n" |
315 | "cache size\t: I-xxKB/D-xxKB\n"); | |
9287d95e HT |
316 | #elif defined(CONFIG_CHIP_M32104) |
317 | seq_printf(m,"cpu family\t: M32104\n" | |
318 | "cache size\t: I-8KB/D-8KB\n"); | |
1da177e4 LT |
319 | #else |
320 | seq_printf(m, "cpu family\t: Unknown\n"); | |
321 | #endif | |
322 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
323 | c->loops_per_jiffy/(500000/HZ), | |
324 | (c->loops_per_jiffy/(5000/HZ)) % 100); | |
c978b017 | 325 | #if defined(CONFIG_PLAT_MAPPI) |
1da177e4 | 326 | seq_printf(m, "Machine\t\t: Mappi Evaluation board\n"); |
c978b017 | 327 | #elif defined(CONFIG_PLAT_MAPPI2) |
1da177e4 | 328 | seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n"); |
c978b017 | 329 | #elif defined(CONFIG_PLAT_MAPPI3) |
23680863 | 330 | seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n"); |
c978b017 | 331 | #elif defined(CONFIG_PLAT_M32700UT) |
1da177e4 | 332 | seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n"); |
c978b017 | 333 | #elif defined(CONFIG_PLAT_OPSPUT) |
1da177e4 | 334 | seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n"); |
c978b017 | 335 | #elif defined(CONFIG_PLAT_USRV) |
1da177e4 | 336 | seq_printf(m, "Machine\t\t: uServer\n"); |
c978b017 | 337 | #elif defined(CONFIG_PLAT_OAKS32R) |
1da177e4 | 338 | seq_printf(m, "Machine\t\t: OAKS32R\n"); |
9287d95e HT |
339 | #elif defined(CONFIG_PLAT_M32104UT) |
340 | seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n"); | |
1da177e4 LT |
341 | #else |
342 | seq_printf(m, "Machine\t\t: Unknown\n"); | |
343 | #endif | |
344 | ||
345 | #define PRINT_CLOCK(name, value) \ | |
346 | seq_printf(m, name " clock\t: %d.%02dMHz\n", \ | |
347 | ((value) / 1000000), ((value) % 1000000)/10000) | |
348 | ||
349 | PRINT_CLOCK("CPU", (int)c->cpu_clock); | |
350 | PRINT_CLOCK("Bus", (int)c->bus_clock); | |
351 | ||
352 | seq_printf(m, "\n"); | |
353 | ||
354 | return 0; | |
355 | } | |
356 | ||
357 | static void *c_start(struct seq_file *m, loff_t *pos) | |
358 | { | |
359 | return *pos < NR_CPUS ? cpu_data + *pos : NULL; | |
360 | } | |
361 | ||
362 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
363 | { | |
364 | ++*pos; | |
365 | return c_start(m, pos); | |
366 | } | |
367 | ||
368 | static void c_stop(struct seq_file *m, void *v) | |
369 | { | |
370 | } | |
371 | ||
03a44825 | 372 | const struct seq_operations cpuinfo_op = { |
7857a7f5 AV |
373 | .start = c_start, |
374 | .next = c_next, | |
375 | .stop = c_stop, | |
376 | .show = show_cpuinfo, | |
1da177e4 LT |
377 | }; |
378 | #endif /* CONFIG_PROC_FS */ | |
379 | ||
380 | unsigned long cpu_initialized __initdata = 0; | |
381 | ||
382 | /* | |
383 | * cpu_init() initializes state that is per-CPU. Some data is already | |
384 | * initialized (naturally) in the bootstrap process. | |
385 | * We reload them nevertheless, this function acts as a | |
386 | * 'CPU state barrier', nothing should get across. | |
387 | */ | |
388 | #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ | |
389 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ | |
9287d95e | 390 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
1da177e4 LT |
391 | void __init cpu_init (void) |
392 | { | |
393 | int cpu_id = smp_processor_id(); | |
394 | ||
395 | if (test_and_set_bit(cpu_id, &cpu_initialized)) { | |
396 | printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id); | |
397 | for ( ; ; ) | |
398 | local_irq_enable(); | |
399 | } | |
400 | printk(KERN_INFO "Initializing CPU#%d\n", cpu_id); | |
401 | ||
402 | /* Set up and load the per-CPU TSS and LDT */ | |
403 | atomic_inc(&init_mm.mm_count); | |
404 | current->active_mm = &init_mm; | |
405 | if (current->mm) | |
406 | BUG(); | |
407 | ||
408 | /* Force FPU initialization */ | |
409 | current_thread_info()->status = 0; | |
410 | clear_used_math(); | |
411 | ||
412 | #ifdef CONFIG_MMU | |
413 | /* Set up MMU */ | |
414 | init_mmu(); | |
415 | #endif | |
416 | ||
417 | /* Set up ICUIMASK */ | |
418 | outl(0x00070000, M32R_ICU_IMASK_PORTL); /* imask=111 */ | |
419 | } | |
420 | #endif /* defined(CONFIG_CHIP_VDEC2) ... */ |