[linux-2.6-block.git] / arch / m32r / kernel / entry.S

/*
 *  linux/arch/m32r/kernel/entry.S
 *
 *  Copyright (c) 2001, 2002  Hirokazu Takata, Hitoshi Yamamoto, H. Kondo
 *  Copyright (c) 2003  Hitoshi Yamamoto
 *  Copyright (c) 2004  Hirokazu Takata <takata at linux-m32r.org>
 *
 *  Taken from i386 version.
 *    Copyright (C) 1991, 1992  Linus Torvalds
 */

/*
 * entry.S contains the system-call and fault low-level handling routines.
 * This also contains the timer-interrupt handler, as well as all interrupts
 * and faults that can result in a task-switch.
 *
 * NOTE: This code handles signal-recognition, which happens every time
 * after a timer-interrupt and after each system call.
 *
 * Stack layout in 'ret_from_system_call':
 * 	ptrace needs to have all regs on the stack.
 *	if the order here is changed, it needs to be
 *	updated in fork.c:copy_thread, signal.c:do_signal,
 *	ptrace.c and ptrace.h
 *
 * M32R/M32Rx/M32R2
 *       @(sp)      - r4
 *       @(0x04,sp) - r5
 *       @(0x08,sp) - r6
 *       @(0x0c,sp) - *pt_regs
 *       @(0x10,sp) - r0
 *       @(0x14,sp) - r1
 *       @(0x18,sp) - r2
 *       @(0x1c,sp) - r3
 *       @(0x20,sp) - r7
 *       @(0x24,sp) - r8
 *       @(0x28,sp) - r9
 *       @(0x2c,sp) - r10
 *       @(0x30,sp) - r11
 *       @(0x34,sp) - r12
 *       @(0x38,sp) - syscall_nr
 *       @(0x3c,sp) - acc0h
 *       @(0x40,sp) - acc0l
 *       @(0x44,sp) - acc1h		; ISA_DSP_LEVEL2 only
 *       @(0x48,sp) - acc1l		; ISA_DSP_LEVEL2 only
 *       @(0x4c,sp) - psw
 *       @(0x50,sp) - bpc
 *       @(0x54,sp) - bbpsw
 *       @(0x58,sp) - bbpc
 *       @(0x5c,sp) - spu (cr3)
 *       @(0x60,sp) - fp (r13)
 *       @(0x64,sp) - lr (r14)
 *       @(0x68,sp) - spi (cr2)
 *       @(0x6c,sp) - orig_r0
 */

#include <linux/linkage.h>
#include <asm/irq.h>
#include <asm/unistd.h>
#include <asm/assembler.h>
#include <asm/thread_info.h>
#include <asm/errno.h>
#include <asm/segment.h>
#include <asm/smp.h>
#include <asm/page.h>
#include <asm/m32r.h>
#include <asm/mmu_context.h>
#include <asm/asm-offsets.h>

#if !defined(CONFIG_MMU)
#define sys_madvise		sys_ni_syscall
#define sys_readahead		sys_ni_syscall
#define sys_mprotect		sys_ni_syscall
#define sys_msync		sys_ni_syscall
#define sys_mlock		sys_ni_syscall
#define sys_munlock		sys_ni_syscall
#define sys_mlockall		sys_ni_syscall
#define sys_munlockall		sys_ni_syscall
#define sys_mremap		sys_ni_syscall
#define sys_mincore		sys_ni_syscall
#define sys_remap_file_pages	sys_ni_syscall
#endif /* CONFIG_MMU */

#define R4(reg)			@reg
#define R5(reg)			@(0x04,reg)
#define R6(reg)			@(0x08,reg)
#define PTREGS(reg)		@(0x0C,reg)
#define R0(reg)			@(0x10,reg)
#define R1(reg)			@(0x14,reg)
#define R2(reg)			@(0x18,reg)
#define R3(reg)			@(0x1C,reg)
#define R7(reg)			@(0x20,reg)
#define R8(reg)			@(0x24,reg)
#define R9(reg)			@(0x28,reg)
#define R10(reg)		@(0x2C,reg)
#define R11(reg)		@(0x30,reg)
#define R12(reg)		@(0x34,reg)
#define SYSCALL_NR(reg)		@(0x38,reg)
#define ACC0H(reg)		@(0x3C,reg)
#define ACC0L(reg)		@(0x40,reg)
#define ACC1H(reg)		@(0x44,reg)
#define ACC1L(reg)		@(0x48,reg)
#define PSW(reg)		@(0x4C,reg)
#define BPC(reg)		@(0x50,reg)
#define BBPSW(reg)		@(0x54,reg)
#define BBPC(reg)		@(0x58,reg)
#define SPU(reg)		@(0x5C,reg)
#define FP(reg)			@(0x60,reg)  /* FP = R13 */
#define LR(reg)			@(0x64,reg)
#define SP(reg)			@(0x68,reg)
#define ORIG_R0(reg)		@(0x6C,reg)

#define nr_syscalls ((syscall_table_size)/4)

#ifdef CONFIG_PREEMPT
#define preempt_stop(x)		DISABLE_INTERRUPTS(x)
#else
#define preempt_stop(x)
#define resume_kernel		restore_all
#endif

/* how to get the thread information struct from ASM */
#define GET_THREAD_INFO(reg)	GET_THREAD_INFO reg
	.macro GET_THREAD_INFO reg
	ldi	\reg, #-THREAD_SIZE
	and	\reg, sp
	.endm

ENTRY(ret_from_kernel_thread)
	pop	r0
	bl	schedule_tail
	GET_THREAD_INFO(r8)
	ld	r0, R0(r8)
	ld	r1, R1(r8)
	jl	r1
	bra	syscall_exit

ENTRY(ret_from_fork)
	pop	r0
	bl	schedule_tail
	GET_THREAD_INFO(r8)
	bra	syscall_exit

/*
 * Return to user mode is not as complex as all this looks,
 * but we want the default path for a system call return to
 * go as quickly as possible which is why some of this is
 * less clear than it otherwise should be.
 */

	; userspace resumption stub bypassing syscall exit tracing
	ALIGN
ret_from_exception:
	preempt_stop(r4)
ret_from_intr:
	ld	r4, PSW(sp)
#ifdef CONFIG_ISA_M32R2
	and3	r4, r4, #0x8800		; check BSM and BPM bits
#else
	and3	r4, r4, #0x8000		; check BSM bit
#endif
	beqz	r4, resume_kernel
resume_userspace:
	DISABLE_INTERRUPTS(r4)		; make sure we don't miss an interrupt
					; setting need_resched or sigpending
					; between sampling and the iret
	GET_THREAD_INFO(r8)
	ld	r9, @(TI_FLAGS, r8)
	and3	r4, r9, #_TIF_WORK_MASK	; is there any work to be done on
					; int/exception return?
	bnez	r4, work_pending
	bra	restore_all

#ifdef CONFIG_PREEMPT
ENTRY(resume_kernel)
	GET_THREAD_INFO(r8)
	ld	r9, @(TI_PRE_COUNT, r8)	; non-zero preempt_count ?
	bnez	r9, restore_all
need_resched:
	ld	r9, @(TI_FLAGS, r8)	; need_resched set ?
	and3	r4, r9, #_TIF_NEED_RESCHED
	beqz	r4, restore_all
	ld	r4, PSW(sp)		; interrupts off (exception path) ?
	and3	r4, r4, #0x4000
	beqz	r4, restore_all
	bl	preempt_schedule_irq
	bra	need_resched
#endif

	; system call handler stub
ENTRY(system_call)
	SWITCH_TO_KERNEL_STACK
	SAVE_ALL
	ENABLE_INTERRUPTS(r4)		; Enable interrupt
	st	sp, PTREGS(sp)		; implicit pt_regs parameter
	cmpui	r7, #NR_syscalls
	bnc	syscall_badsys
	st	r7, SYSCALL_NR(sp)	; syscall_nr
					; system call tracing in operation
	GET_THREAD_INFO(r8)
	ld	r9, @(TI_FLAGS, r8)
	and3	r4, r9, #_TIF_SYSCALL_TRACE
	bnez	r4, syscall_trace_entry
syscall_call:
	slli	r7, #2			; table jump for the system call
	LDIMM	(r4, sys_call_table)
	add	r7, r4
	ld	r7, @r7
	jl	r7			; execute system call
	st	r0, R0(sp)		; save the return value
syscall_exit:
	DISABLE_INTERRUPTS(r4)		; make sure we don't miss an interrupt
					; setting need_resched or sigpending
					; between sampling and the iret
	ld	r9, @(TI_FLAGS, r8)
	and3	r4, r9, #_TIF_ALLWORK_MASK	; current->work
	bnez	r4, syscall_exit_work
restore_all:
	RESTORE_ALL

	# perform work that needs to be done immediately before resumption
	# r9 : flags
	ALIGN
work_pending:
	and3	r4, r9, #_TIF_NEED_RESCHED
	beqz	r4, work_notifysig
work_resched:
	bl	schedule
	DISABLE_INTERRUPTS(r4)		; make sure we don't miss an interrupt
					; setting need_resched or sigpending
					; between sampling and the iret
	ld	r9, @(TI_FLAGS, r8)
	and3	r4, r9, #_TIF_WORK_MASK	; is there any work to be done other
					; than syscall tracing?
	beqz	r4, restore_all
	and3	r4, r4, #_TIF_NEED_RESCHED
	bnez	r4, work_resched

work_notifysig:				; deal with pending signals and
					; notify-resume requests
	mv	r0, sp			; arg1 : struct pt_regs *regs
	mv	r1, r9			; arg2 : __u32 thread_info_flags
	bl	do_notify_resume
	bra	resume_userspace

	; perform syscall exit tracing
	ALIGN
syscall_trace_entry:
	ldi	r4, #-ENOSYS
	st	r4, R0(sp)
	bl	do_syscall_trace
	ld	r0, ORIG_R0(sp)
	ld	r1, R1(sp)
	ld	r2, R2(sp)
	ld	r3, R3(sp)
	ld	r4, R4(sp)
	ld	r5, R5(sp)
	ld	r6, R6(sp)
	ld	r7, SYSCALL_NR(sp)
	cmpui	r7, #NR_syscalls
	bc	syscall_call
	bra	syscall_exit

	; perform syscall exit tracing
	ALIGN
syscall_exit_work:
	ld	r9, @(TI_FLAGS, r8)
	and3	r4, r9, #_TIF_SYSCALL_TRACE
	beqz	r4, work_pending
	ENABLE_INTERRUPTS(r4)		; could let do_syscall_trace() call
					; schedule() instead
	bl	do_syscall_trace
	bra	resume_userspace

	ALIGN
syscall_fault:
	SAVE_ALL
	GET_THREAD_INFO(r8)
	ldi	r4, #-EFAULT
	st	r4, R0(sp)
	bra	resume_userspace

	ALIGN
syscall_badsys:
	ldi	r4, #-ENOSYS
	st	r4, R0(sp)
	bra	resume_userspace

	.global	eit_vector

	.equ ei_vec_table, eit_vector + 0x0200

/*
 * EI handler routine
 */
ENTRY(ei_handler)
#if defined(CONFIG_CHIP_M32700)
	; WORKAROUND: force to clear SM bit and use the kernel stack (SPI).
	SWITCH_TO_KERNEL_STACK
#endif
	SAVE_ALL
	mv	r1, sp			; arg1(regs)
	; get ICU status
	seth	r0, #shigh(M32R_ICU_ISTS_ADDR)
	ld	r0, @(low(M32R_ICU_ISTS_ADDR),r0)
	push	r0
#if defined(CONFIG_SMP)
	/*
	 * If IRQ == 0      --> Nothing to do,  Not write IMASK
	 * If IRQ == IPI    --> Do IPI handler, Not write IMASK
	 * If IRQ != 0, IPI --> Do do_IRQ(),    Write IMASK
	 */
	slli	r0, #4
	srli	r0, #24			; r0(irq_num<<2)
	;; IRQ exist check
#if defined(CONFIG_CHIP_M32700)
	/* WORKAROUND: IMASK bug M32700-TS1, TS2 chip. */
	bnez	r0, 0f
	ld24	r14, #0x00070000
	seth	r0, #shigh(M32R_ICU_IMASK_ADDR)
	st	r14, @(low(M32R_ICU_IMASK_ADDR),r0)
	bra	1f
	.fillinsn
0:
#endif /* CONFIG_CHIP_M32700 */
	beqz	r0, 1f			; if (!irq_num) goto exit
	;; IPI check
	cmpi	r0, #(M32R_IRQ_IPI0<<2)	; ISN < IPI0 check
	bc	2f
	cmpi	r0, #((M32R_IRQ_IPI7+1)<<2)	; ISN > IPI7 check
	bnc	2f
	LDIMM	(r2, ei_vec_table)
	add	r2, r0
	ld	r2, @r2
	beqz	r2, 1f			; if (no IPI handler) goto exit
	mv	r0, r1			; arg0(regs)
	jl	r2
	.fillinsn
1:
	addi	sp, #4
	bra	restore_all
	.fillinsn
2:
	srli	r0, #2
#else /* not CONFIG_SMP */
	srli	r0, #22			; r0(irq)
#endif /* not CONFIG_SMP */

#if defined(CONFIG_PLAT_HAS_INT1ICU)
	add3	r2, r0, #-(M32R_IRQ_INT1)	; INT1# interrupt
	bnez	r2, 3f
	seth	r0, #shigh(M32R_INT1ICU_ISTS)
	lduh	r0, @(low(M32R_INT1ICU_ISTS),r0)	; bit10-6 : ISN
	slli	r0, #21
	srli	r0, #27				; ISN
	addi	r0, #(M32R_INT1ICU_IRQ_BASE)
	bra	check_end
	.fillinsn
3:
#endif /* CONFIG_PLAT_HAS_INT1ICU */
#if defined(CONFIG_PLAT_HAS_INT0ICU)
	add3	r2, r0, #-(M32R_IRQ_INT0)	; INT0# interrupt
	bnez	r2, 4f
	seth	r0, #shigh(M32R_INT0ICU_ISTS)
	lduh	r0, @(low(M32R_INT0ICU_ISTS),r0)	; bit10-6 : ISN
	slli	r0, #21
	srli	r0, #27				; ISN
	add3	r0, r0, #(M32R_INT0ICU_IRQ_BASE)
	bra	check_end
	.fillinsn
4:
#endif /* CONFIG_PLAT_HAS_INT0ICU */
#if defined(CONFIG_PLAT_HAS_INT2ICU)
	add3	r2, r0, #-(M32R_IRQ_INT2)	; INT2# interrupt
	bnez	r2, 5f
	seth	r0, #shigh(M32R_INT2ICU_ISTS)
	lduh	r0, @(low(M32R_INT2ICU_ISTS),r0)	; bit10-6 : ISN
	slli	r0, #21
	srli	r0, #27				; ISN
	add3	r0, r0, #(M32R_INT2ICU_IRQ_BASE)
	; bra	check_end
	.fillinsn
5:
#endif /* CONFIG_PLAT_HAS_INT2ICU */

check_end:
	bl	do_IRQ
	pop	r14
	seth	r0, #shigh(M32R_ICU_IMASK_ADDR)
	st	r14, @(low(M32R_ICU_IMASK_ADDR),r0)
	bra  ret_from_intr

/*
 * Default EIT handler
 */
	ALIGN
int_msg:
	.asciz  "Unknown interrupt\n"
	.byte	0

ENTRY(default_eit_handler)
	push	r0
	mvfc	r0, psw
	push	r1
	push	r2
	push	r3
	push	r0
	LDIMM	(r0, __KERNEL_DS)
	mv	r0, r1
	mv	r0, r2
	LDIMM	(r0, int_msg)
	bl	printk
	pop	r0
	pop	r3
	pop	r2
	pop	r1
	mvtc	r0, psw
	pop	r0
infinit:
	bra	infinit

#ifdef CONFIG_MMU
/*
 * Access Exception handler
 */
ENTRY(ace_handler)
	SWITCH_TO_KERNEL_STACK
	SAVE_ALL

	seth	r2, #shigh(MMU_REG_BASE)	/* Check status register */
	ld	r4, @(low(MESTS_offset),r2)
	st	r4, @(low(MESTS_offset),r2)
	srl3	r1, r4, #4
#ifdef CONFIG_CHIP_M32700
	and3	r1, r1, #0x0000ffff
	; WORKAROUND: ignore TME bit for the M32700(TS1).
#endif /* CONFIG_CHIP_M32700 */
	beqz	r1, inst
oprand:
	ld	r2, @(low(MDEVA_offset),r2)	; set address
	srli	r1, #1
	bra	1f
inst:
	and3	r1, r4, #2
	srli	r1, #1
	or3	r1, r1, #8
	mvfc	r2, bpc				; set address
	.fillinsn
1:
	mvfc	r3, psw
	mv	r0, sp
	and3	r3, r3, 0x800
	srli	r3, #9
	or	r1, r3
	/*
	 * do_page_fault():
	 *    r0 : struct pt_regs *regs
	 *    r1 : unsigned long error-code
	 *    r2 : unsigned long address
	 * error-code:
	 *    +------+------+------+------+
	 *    | bit3 | bit2 | bit1 | bit0 |
	 *    +------+------+------+------+
	 *    bit 3 == 0:means data,          1:means instruction
	 *    bit 2 == 0:means kernel,        1:means user-mode
	 *    bit 1 == 0:means read,          1:means write
	 *    bit 0 == 0:means no page found  1:means protection fault
	 *
	 */
	bl	do_page_fault
	bra	ret_from_intr
#endif  /* CONFIG_MMU */


ENTRY(alignment_check)
	/* void alignment_check(int error_code) */
	SWITCH_TO_KERNEL_STACK
	SAVE_ALL
	ldi	r1, #0x30			; error_code
	mv	r0, sp				; pt_regs
	bl	do_alignment_check
error_code:
	bra	ret_from_exception

ENTRY(rie_handler)
	/* void rie_handler(int error_code) */
	SWITCH_TO_KERNEL_STACK
	SAVE_ALL
	ldi	r1, #0x20			; error_code
	mv	r0, sp				; pt_regs
	bl	do_rie_handler
	bra	error_code

ENTRY(pie_handler)
	/* void pie_handler(int error_code) */
	SWITCH_TO_KERNEL_STACK
	SAVE_ALL
	ldi	r1, #0				; error_code ; FIXME
	mv	r0, sp				; pt_regs
	bl	do_pie_handler
	bra	error_code

ENTRY(debug_trap)
	/* void debug_trap(void) */
	.global	withdraw_debug_trap
	SWITCH_TO_KERNEL_STACK
	SAVE_ALL
	mv	r0, sp				; pt_regs
	bl	withdraw_debug_trap
	ldi	r1, #0				; error_code
	mv	r0, sp				; pt_regs
	bl	do_debug_trap
	bra	error_code

ENTRY(ill_trap)
	/* void ill_trap(void) */
	SWITCH_TO_KERNEL_STACK
	SAVE_ALL
	ldi	r1, #0				; error_code ; FIXME
	mv	r0, sp				; pt_regs
	bl	do_ill_trap
	bra	error_code

ENTRY(cache_flushing_handler)
	/* void _flush_cache_all(void); */
	.global	_flush_cache_all
	SWITCH_TO_KERNEL_STACK
	push	r0
	push	r1
	push	r2
	push	r3
	push	r4
	push	r5
	push	r6
	push	r7
	push	lr
	bl	_flush_cache_all
	pop	lr
	pop	r7
	pop	r6
	pop	r5
	pop	r4
	pop	r3
	pop	r2
	pop	r1
	pop	r0
	rte

	.section .rodata,"a"
#include "syscall_table.S"

syscall_table_size=(.-sys_call_table)
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/m32r/kernel/entry.S
	3	*
	4	* Copyright (c) 2001, 2002 Hirokazu Takata, Hitoshi Yamamoto, H. Kondo
	5	* Copyright (c) 2003 Hitoshi Yamamoto
	6	* Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
	7	*
	8	* Taken from i386 version.
	9	* Copyright (C) 1991, 1992 Linus Torvalds
	10	*/
	11
	12	/*
	13	* entry.S contains the system-call and fault low-level handling routines.
	14	* This also contains the timer-interrupt handler, as well as all interrupts
	15	* and faults that can result in a task-switch.
	16	*
	17	* NOTE: This code handles signal-recognition, which happens every time
	18	* after a timer-interrupt and after each system call.
	19	*
	20	* Stack layout in 'ret_from_system_call':
	21	* ptrace needs to have all regs on the stack.
	22	* if the order here is changed, it needs to be
8e8ff02c	23	* updated in fork.c:copy_thread, signal.c:do_signal,
1da177e4 LT	24	* ptrace.c and ptrace.h
1da177e4 LT	25	*
8b03a632 HT	26	* M32R/M32Rx/M32R2
	27	* @(sp) - r4
	28	* @(0x04,sp) - r5
	29	* @(0x08,sp) - r6
	30	* @(0x0c,sp) - *pt_regs
	31	* @(0x10,sp) - r0
	32	* @(0x14,sp) - r1
	33	* @(0x18,sp) - r2
	34	* @(0x1c,sp) - r3
	35	* @(0x20,sp) - r7
	36	* @(0x24,sp) - r8
	37	* @(0x28,sp) - r9
	38	* @(0x2c,sp) - r10
	39	* @(0x30,sp) - r11
	40	* @(0x34,sp) - r12
	41	* @(0x38,sp) - syscall_nr
	42	* @(0x3c,sp) - acc0h
	43	* @(0x40,sp) - acc0l
	44	* @(0x44,sp) - acc1h ; ISA_DSP_LEVEL2 only
	45	* @(0x48,sp) - acc1l ; ISA_DSP_LEVEL2 only
	46	* @(0x4c,sp) - psw
	47	* @(0x50,sp) - bpc
	48	* @(0x54,sp) - bbpsw
	49	* @(0x58,sp) - bbpc
	50	* @(0x5c,sp) - spu (cr3)
	51	* @(0x60,sp) - fp (r13)
	52	* @(0x64,sp) - lr (r14)
	53	* @(0x68,sp) - spi (cr2)
	54	* @(0x6c,sp) - orig_r0
1da177e4 LT	55	*/
1da177e4 LT	56
1da177e4 LT	57	#include <linux/linkage.h>
	58	#include <asm/irq.h>
	59	#include <asm/unistd.h>
	60	#include <asm/assembler.h>
	61	#include <asm/thread_info.h>
	62	#include <asm/errno.h>
	63	#include <asm/segment.h>
	64	#include <asm/smp.h>
	65	#include <asm/page.h>
	66	#include <asm/m32r.h>
	67	#include <asm/mmu_context.h>
37f078ff	68	#include <asm/asm-offsets.h>
1da177e4 LT	69
	70	#if !defined(CONFIG_MMU)
	71	#define sys_madvise sys_ni_syscall
	72	#define sys_readahead sys_ni_syscall
	73	#define sys_mprotect sys_ni_syscall
	74	#define sys_msync sys_ni_syscall
	75	#define sys_mlock sys_ni_syscall
	76	#define sys_munlock sys_ni_syscall
	77	#define sys_mlockall sys_ni_syscall
	78	#define sys_munlockall sys_ni_syscall
	79	#define sys_mremap sys_ni_syscall
	80	#define sys_mincore sys_ni_syscall
	81	#define sys_remap_file_pages sys_ni_syscall
	82	#endif /* CONFIG_MMU */
	83
	84	#define R4(reg) @reg
	85	#define R5(reg) @(0x04,reg)
	86	#define R6(reg) @(0x08,reg)
	87	#define PTREGS(reg) @(0x0C,reg)
	88	#define R0(reg) @(0x10,reg)
	89	#define R1(reg) @(0x14,reg)
	90	#define R2(reg) @(0x18,reg)
	91	#define R3(reg) @(0x1C,reg)
	92	#define R7(reg) @(0x20,reg)
	93	#define R8(reg) @(0x24,reg)
	94	#define R9(reg) @(0x28,reg)
	95	#define R10(reg) @(0x2C,reg)
	96	#define R11(reg) @(0x30,reg)
	97	#define R12(reg) @(0x34,reg)
	98	#define SYSCALL_NR(reg) @(0x38,reg)
1da177e4 LT	99	#define ACC0H(reg) @(0x3C,reg)
	100	#define ACC0L(reg) @(0x40,reg)
	101	#define ACC1H(reg) @(0x44,reg)
	102	#define ACC1L(reg) @(0x48,reg)
	103	#define PSW(reg) @(0x4C,reg)
	104	#define BPC(reg) @(0x50,reg)
	105	#define BBPSW(reg) @(0x54,reg)
	106	#define BBPC(reg) @(0x58,reg)
	107	#define SPU(reg) @(0x5C,reg)
	108	#define FP(reg) @(0x60,reg) /* FP = R13 */
	109	#define LR(reg) @(0x64,reg)
	110	#define SP(reg) @(0x68,reg)
	111	#define ORIG_R0(reg) @(0x6C,reg)
1da177e4	112
9990b48a HT	113	#define nr_syscalls ((syscall_table_size)/4)
9990b48a HT	114
1da177e4	115	#ifdef CONFIG_PREEMPT
7071b291	116	#define preempt_stop(x) DISABLE_INTERRUPTS(x)
1da177e4 LT	117	#else
	118	#define preempt_stop(x)
	119	#define resume_kernel restore_all
	120	#endif
	121
00b01b24 TA	122	/* how to get the thread information struct from ASM */
	123	#define GET_THREAD_INFO(reg) GET_THREAD_INFO reg
	124	.macro GET_THREAD_INFO reg
	125	ldi \reg, #-THREAD_SIZE
	126	and \reg, sp
	127	.endm
	128
ea4a1da9 AV	129	ENTRY(ret_from_kernel_thread)
	130	pop r0
	131	bl schedule_tail
	132	GET_THREAD_INFO(r8)
	133	ld r0, R0(r8)
	134	ld r1, R1(r8)
	135	jl r1
	136	bra syscall_exit
	137
1da177e4	138	ENTRY(ret_from_fork)
4127272c	139	pop r0
1da177e4 LT	140	bl schedule_tail
	141	GET_THREAD_INFO(r8)
	142	bra syscall_exit
	143
	144	/*
	145	* Return to user mode is not as complex as all this looks,
	146	* but we want the default path for a system call return to
	147	* go as quickly as possible which is why some of this is
	148	* less clear than it otherwise should be.
	149	*/
	150
	151	; userspace resumption stub bypassing syscall exit tracing
	152	ALIGN
	153	ret_from_exception:
	154	preempt_stop(r4)
	155	ret_from_intr:
	156	ld r4, PSW(sp)
	157	#ifdef CONFIG_ISA_M32R2
	158	and3 r4, r4, #0x8800 ; check BSM and BPM bits
	159	#else
	160	and3 r4, r4, #0x8000 ; check BSM bit
	161	#endif
	162	beqz r4, resume_kernel
81e48073	163	resume_userspace:
7071b291	164	DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
1da177e4 LT	165	; setting need_resched or sigpending
	166	; between sampling and the iret
	167	GET_THREAD_INFO(r8)
	168	ld r9, @(TI_FLAGS, r8)
	169	and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done on
	170	; int/exception return?
	171	bnez r4, work_pending
	172	bra restore_all
	173
	174	#ifdef CONFIG_PREEMPT
	175	ENTRY(resume_kernel)
	176	GET_THREAD_INFO(r8)
	177	ld r9, @(TI_PRE_COUNT, r8) ; non-zero preempt_count ?
	178	bnez r9, restore_all
	179	need_resched:
	180	ld r9, @(TI_FLAGS, r8) ; need_resched set ?
	181	and3 r4, r9, #_TIF_NEED_RESCHED
	182	beqz r4, restore_all
	183	ld r4, PSW(sp) ; interrupts off (exception path) ?
	184	and3 r4, r4, #0x4000
	185	beqz r4, restore_all
650e4dc2	186	bl preempt_schedule_irq
1da177e4 LT	187	bra need_resched
	188	#endif
	189
	190	; system call handler stub
	191	ENTRY(system_call)
	192	SWITCH_TO_KERNEL_STACK
	193	SAVE_ALL
7071b291	194	ENABLE_INTERRUPTS(r4) ; Enable interrupt
1da177e4 LT	195	st sp, PTREGS(sp) ; implicit pt_regs parameter
	196	cmpui r7, #NR_syscalls
	197	bnc syscall_badsys
	198	st r7, SYSCALL_NR(sp) ; syscall_nr
	199	; system call tracing in operation
	200	GET_THREAD_INFO(r8)
	201	ld r9, @(TI_FLAGS, r8)
	202	and3 r4, r9, #_TIF_SYSCALL_TRACE
	203	bnez r4, syscall_trace_entry
	204	syscall_call:
	205	slli r7, #2 ; table jump for the system call
	206	LDIMM (r4, sys_call_table)
	207	add r7, r4
	208	ld r7, @r7
	209	jl r7 ; execute system call
	210	st r0, R0(sp) ; save the return value
	211	syscall_exit:
7071b291	212	DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
1da177e4 LT	213	; setting need_resched or sigpending
	214	; between sampling and the iret
	215	ld r9, @(TI_FLAGS, r8)
	216	and3 r4, r9, #_TIF_ALLWORK_MASK ; current->work
	217	bnez r4, syscall_exit_work
	218	restore_all:
	219	RESTORE_ALL
	220
	221	# perform work that needs to be done immediately before resumption
8e8ff02c	222	# r9 : flags
1da177e4 LT	223	ALIGN
	224	work_pending:
	225	and3 r4, r9, #_TIF_NEED_RESCHED
	226	beqz r4, work_notifysig
	227	work_resched:
	228	bl schedule
7071b291	229	DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
1da177e4 LT	230	; setting need_resched or sigpending
	231	; between sampling and the iret
	232	ld r9, @(TI_FLAGS, r8)
	233	and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done other
	234	; than syscall tracing?
	235	beqz r4, restore_all
	236	and3 r4, r4, #_TIF_NEED_RESCHED
	237	bnez r4, work_resched
	238
	239	work_notifysig: ; deal with pending signals and
	240	; notify-resume requests
	241	mv r0, sp ; arg1 : struct pt_regs *regs
a7481024	242	mv r1, r9 ; arg2 : __u32 thread_info_flags
1da177e4	243	bl do_notify_resume
a7481024	244	bra resume_userspace
1da177e4 LT	245
	246	; perform syscall exit tracing
	247	ALIGN
	248	syscall_trace_entry:
	249	ldi r4, #-ENOSYS
	250	st r4, R0(sp)
	251	bl do_syscall_trace
	252	ld r0, ORIG_R0(sp)
	253	ld r1, R1(sp)
	254	ld r2, R2(sp)
	255	ld r3, R3(sp)
	256	ld r4, R4(sp)
	257	ld r5, R5(sp)
	258	ld r6, R6(sp)
	259	ld r7, SYSCALL_NR(sp)
	260	cmpui r7, #NR_syscalls
	261	bc syscall_call
	262	bra syscall_exit
	263
	264	; perform syscall exit tracing
	265	ALIGN
	266	syscall_exit_work:
	267	ld r9, @(TI_FLAGS, r8)
	268	and3 r4, r9, #_TIF_SYSCALL_TRACE
	269	beqz r4, work_pending
7071b291	270	ENABLE_INTERRUPTS(r4) ; could let do_syscall_trace() call
1da177e4 LT	271	; schedule() instead
	272	bl do_syscall_trace
	273	bra resume_userspace
	274
	275	ALIGN
	276	syscall_fault:
	277	SAVE_ALL
	278	GET_THREAD_INFO(r8)
	279	ldi r4, #-EFAULT
	280	st r4, R0(sp)
	281	bra resume_userspace
	282
	283	ALIGN
	284	syscall_badsys:
	285	ldi r4, #-ENOSYS
	286	st r4, R0(sp)
	287	bra resume_userspace
	288
	289	.global eit_vector
	290
	291	.equ ei_vec_table, eit_vector + 0x0200
	292
	293	/*
	294	* EI handler routine
	295	*/
	296	ENTRY(ei_handler)
	297	#if defined(CONFIG_CHIP_M32700)
1da177e4	298	; WORKAROUND: force to clear SM bit and use the kernel stack (SPI).
5171b100	299	SWITCH_TO_KERNEL_STACK
1da177e4 LT	300	#endif
	301	SAVE_ALL
	302	mv r1, sp ; arg1(regs)
de2232ed	303	; get ICU status
1da177e4 LT	304	seth r0, #shigh(M32R_ICU_ISTS_ADDR)
1da177e4 LT	305	ld r0, @(low(M32R_ICU_ISTS_ADDR),r0)
4127272c	306	push r0
1da177e4 LT	307	#if defined(CONFIG_SMP)
	308	/*
	309	* If IRQ == 0 --> Nothing to do, Not write IMASK
	310	* If IRQ == IPI --> Do IPI handler, Not write IMASK
	311	* If IRQ != 0, IPI --> Do do_IRQ(), Write IMASK
	312	*/
	313	slli r0, #4
	314	srli r0, #24 ; r0(irq_num<<2)
	315	;; IRQ exist check
	316	#if defined(CONFIG_CHIP_M32700)
	317	/* WORKAROUND: IMASK bug M32700-TS1, TS2 chip. */
5171b100 HT	318	bnez r0, 0f
	319	ld24 r14, #0x00070000
	320	seth r0, #shigh(M32R_ICU_IMASK_ADDR)
	321	st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
	322	bra 1f
	323	.fillinsn
	324	0:
	325	#endif /* CONFIG_CHIP_M32700 */
1da177e4	326	beqz r0, 1f ; if (!irq_num) goto exit
1da177e4 LT	327	;; IPI check
	328	cmpi r0, #(M32R_IRQ_IPI0<<2) ; ISN < IPI0 check
	329	bc 2f
	330	cmpi r0, #((M32R_IRQ_IPI7+1)<<2) ; ISN > IPI7 check
	331	bnc 2f
	332	LDIMM (r2, ei_vec_table)
	333	add r2, r0
	334	ld r2, @r2
	335	beqz r2, 1f ; if (no IPI handler) goto exit
	336	mv r0, r1 ; arg0(regs)
	337	jl r2
	338	.fillinsn
	339	1:
	340	addi sp, #4
abd0a782	341	bra restore_all
1da177e4 LT	342	.fillinsn
	343	2:
	344	srli r0, #2
5171b100	345	#else /* not CONFIG_SMP */
1da177e4	346	srli r0, #22 ; r0(irq)
5171b100 HT	347	#endif /* not CONFIG_SMP */
	348
	349	#if defined(CONFIG_PLAT_HAS_INT1ICU)
1da177e4	350	add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt
5171b100 HT	351	bnez r2, 3f
	352	seth r0, #shigh(M32R_INT1ICU_ISTS)
	353	lduh r0, @(low(M32R_INT1ICU_ISTS),r0) ; bit10-6 : ISN
1da177e4 LT	354	slli r0, #21
1da177e4 LT	355	srli r0, #27 ; ISN
5171b100	356	addi r0, #(M32R_INT1ICU_IRQ_BASE)
1da177e4 LT	357	bra check_end
1da177e4 LT	358	.fillinsn
5171b100 HT	359	3:
	360	#endif /* CONFIG_PLAT_HAS_INT1ICU */
	361	#if defined(CONFIG_PLAT_HAS_INT0ICU)
	362	add3 r2, r0, #-(M32R_IRQ_INT0) ; INT0# interrupt
	363	bnez r2, 4f
	364	seth r0, #shigh(M32R_INT0ICU_ISTS)
	365	lduh r0, @(low(M32R_INT0ICU_ISTS),r0) ; bit10-6 : ISN
1da177e4	366	slli r0, #21
5171b100	367	srli r0, #27 ; ISN
33205613	368	add3 r0, r0, #(M32R_INT0ICU_IRQ_BASE)
1da177e4 LT	369	bra check_end
1da177e4 LT	370	.fillinsn
5171b100 HT	371	4:
	372	#endif /* CONFIG_PLAT_HAS_INT0ICU */
	373	#if defined(CONFIG_PLAT_HAS_INT2ICU)
	374	add3 r2, r0, #-(M32R_IRQ_INT2) ; INT2# interrupt
	375	bnez r2, 5f
	376	seth r0, #shigh(M32R_INT2ICU_ISTS)
	377	lduh r0, @(low(M32R_INT2ICU_ISTS),r0) ; bit10-6 : ISN
9287d95e	378	slli r0, #21
5171b100	379	srli r0, #27 ; ISN
33205613	380	add3 r0, r0, #(M32R_INT2ICU_IRQ_BASE)
5171b100	381	; bra check_end
9287d95e	382	.fillinsn
5171b100 HT	383	5:
5171b100 HT	384	#endif /* CONFIG_PLAT_HAS_INT2ICU */
de2232ed	385
9287d95e	386	check_end:
1da177e4	387	bl do_IRQ
4127272c	388	pop r14
1da177e4 LT	389	seth r0, #shigh(M32R_ICU_IMASK_ADDR)
1da177e4 LT	390	st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
1da177e4 LT	391	bra ret_from_intr
	392
	393	/*
	394	* Default EIT handler
	395	*/
	396	ALIGN
	397	int_msg:
	398	.asciz "Unknown interrupt\n"
	399	.byte 0
	400
	401	ENTRY(default_eit_handler)
	402	push r0
	403	mvfc r0, psw
	404	push r1
	405	push r2
	406	push r3
	407	push r0
	408	LDIMM (r0, __KERNEL_DS)
	409	mv r0, r1
	410	mv r0, r2
	411	LDIMM (r0, int_msg)
	412	bl printk
	413	pop r0
	414	pop r3
	415	pop r2
	416	pop r1
	417	mvtc r0, psw
	418	pop r0
	419	infinit:
	420	bra infinit
	421
	422	#ifdef CONFIG_MMU
	423	/*
	424	* Access Exception handler
	425	*/
	426	ENTRY(ace_handler)
	427	SWITCH_TO_KERNEL_STACK
	428	SAVE_ALL
	429
	430	seth r2, #shigh(MMU_REG_BASE) /* Check status register */
	431	ld r4, @(low(MESTS_offset),r2)
	432	st r4, @(low(MESTS_offset),r2)
	433	srl3 r1, r4, #4
	434	#ifdef CONFIG_CHIP_M32700
	435	and3 r1, r1, #0x0000ffff
	436	; WORKAROUND: ignore TME bit for the M32700(TS1).
	437	#endif /* CONFIG_CHIP_M32700 */
	438	beqz r1, inst
	439	oprand:
	440	ld r2, @(low(MDEVA_offset),r2) ; set address
1da177e4 LT	441	srli r1, #1
	442	bra 1f
	443	inst:
	444	and3 r1, r4, #2
	445	srli r1, #1
	446	or3 r1, r1, #8
	447	mvfc r2, bpc ; set address
	448	.fillinsn
	449	1:
	450	mvfc r3, psw
	451	mv r0, sp
	452	and3 r3, r3, 0x800
	453	srli r3, #9
	454	or r1, r3
	455	/*
	456	* do_page_fault():
	457	* r0 : struct pt_regs *regs
	458	* r1 : unsigned long error-code
	459	* r2 : unsigned long address
	460	* error-code:
	461	* +------+------+------+------+
	462	* \| bit3 \| bit2 \| bit1 \| bit0 \|
	463	* +------+------+------+------+
	464	* bit 3 == 0:means data, 1:means instruction
	465	* bit 2 == 0:means kernel, 1:means user-mode
	466	* bit 1 == 0:means read, 1:means write
	467	* bit 0 == 0:means no page found 1:means protection fault
	468	*
	469	*/
	470	bl do_page_fault
	471	bra ret_from_intr
	472	#endif /* CONFIG_MMU */
	473
	474
	475	ENTRY(alignment_check)
de2232ed	476	/* void alignment_check(int error_code) */
1da177e4 LT	477	SWITCH_TO_KERNEL_STACK
	478	SAVE_ALL
	479	ldi r1, #0x30 ; error_code
	480	mv r0, sp ; pt_regs
	481	bl do_alignment_check
	482	error_code:
	483	bra ret_from_exception
	484
	485	ENTRY(rie_handler)
de2232ed	486	/* void rie_handler(int error_code) */
1da177e4 LT	487	SWITCH_TO_KERNEL_STACK
1da177e4 LT	488	SAVE_ALL
1da177e4 LT	489	ldi r1, #0x20 ; error_code
	490	mv r0, sp ; pt_regs
	491	bl do_rie_handler
	492	bra error_code
	493
	494	ENTRY(pie_handler)
de2232ed	495	/* void pie_handler(int error_code) */
1da177e4 LT	496	SWITCH_TO_KERNEL_STACK
	497	SAVE_ALL
	498	ldi r1, #0 ; error_code ; FIXME
	499	mv r0, sp ; pt_regs
	500	bl do_pie_handler
	501	bra error_code
	502
	503	ENTRY(debug_trap)
1da177e4	504	/* void debug_trap(void) */
de2232ed	505	.global withdraw_debug_trap
1da177e4 LT	506	SWITCH_TO_KERNEL_STACK
	507	SAVE_ALL
	508	mv r0, sp ; pt_regs
	509	bl withdraw_debug_trap
	510	ldi r1, #0 ; error_code
	511	mv r0, sp ; pt_regs
	512	bl do_debug_trap
	513	bra error_code
	514
9de11aab HT	515	ENTRY(ill_trap)
	516	/* void ill_trap(void) */
	517	SWITCH_TO_KERNEL_STACK
	518	SAVE_ALL
	519	ldi r1, #0 ; error_code ; FIXME
	520	mv r0, sp ; pt_regs
	521	bl do_ill_trap
	522	bra error_code
	523
1da177e4	524	ENTRY(cache_flushing_handler)
1da177e4	525	/* void _flush_cache_all(void); */
de2232ed	526	.global _flush_cache_all
1da177e4 LT	527	SWITCH_TO_KERNEL_STACK
	528	push r0
	529	push r1
	530	push r2
	531	push r3
	532	push r4
	533	push r5
	534	push r6
	535	push r7
	536	push lr
	537	bl _flush_cache_all
	538	pop lr
	539	pop r7
	540	pop r6
	541	pop r5
	542	pop r4
	543	pop r3
	544	pop r2
	545	pop r1
	546	pop r0
	547	rte
	548
9990b48a HT	549	.section .rodata,"a"
9990b48a HT	550	#include "syscall_table.S"
1da177e4 LT	551
1da177e4 LT	552	syscall_table_size=(.-sys_call_table)