Commit | Line | Data |
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ad71860a | 1 | /* |
1da177e4 LT |
2 | * This file is subject to the terms and conditions of the GNU General Public |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
8ea6091f | 6 | * Copyright (C) 2000-2003, 2006 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/module.h> | |
8ea6091f | 10 | #include <linux/acpi.h> |
1da177e4 LT |
11 | #include <asm/io.h> |
12 | #include <asm/delay.h> | |
a9f9de73 | 13 | #include <asm/vga.h> |
1da177e4 LT |
14 | #include <asm/sn/nodepda.h> |
15 | #include <asm/sn/simulator.h> | |
16 | #include <asm/sn/pda.h> | |
17 | #include <asm/sn/sn_cpuid.h> | |
18 | #include <asm/sn/shub_mmr.h> | |
647fb47d | 19 | #include <asm/sn/acpi.h> |
1da177e4 | 20 | |
a9f9de73 MM |
21 | #define IS_LEGACY_VGA_IOPORT(p) \ |
22 | (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df)) | |
23 | ||
1da177e4 LT |
24 | /** |
25 | * sn_io_addr - convert an in/out port to an i/o address | |
26 | * @port: port to convert | |
27 | * | |
28 | * Legacy in/out instructions are converted to ld/st instructions | |
ad71860a | 29 | * on IA64. This routine will convert a port number into a valid |
1da177e4 LT |
30 | * SN i/o address. Used by sn_in*() and sn_out*(). |
31 | */ | |
ad71860a | 32 | |
1da177e4 LT |
33 | void *sn_io_addr(unsigned long port) |
34 | { | |
35 | if (!IS_RUNNING_ON_SIMULATOR()) { | |
a9f9de73 | 36 | if (IS_LEGACY_VGA_IOPORT(port)) |
8ea6091f | 37 | return (__ia64_mk_io_addr(port)); |
1da177e4 LT |
38 | /* On sn2, legacy I/O ports don't point at anything */ |
39 | if (port < (64 * 1024)) | |
40 | return NULL; | |
647fb47d | 41 | if (SN_ACPI_BASE_SUPPORT()) |
8ea6091f JK |
42 | return (__ia64_mk_io_addr(port)); |
43 | else | |
44 | return ((void *)(port | __IA64_UNCACHED_OFFSET)); | |
1da177e4 LT |
45 | } else { |
46 | /* but the simulator uses them... */ | |
47 | unsigned long addr; | |
48 | ||
49 | /* | |
50 | * word align port, but need more than 10 bits | |
51 | * for accessing registers in bedrock local block | |
52 | * (so we don't do port&0xfff) | |
53 | */ | |
54 | addr = (is_shub2() ? 0xc00000028c000000UL : 0xc0000087cc000000UL) | ((port >> 2) << 12); | |
55 | if ((port >= 0x1f0 && port <= 0x1f7) || port == 0x3f6 || port == 0x3f7) | |
56 | addr |= port; | |
57 | return (void *)addr; | |
58 | } | |
59 | } | |
60 | ||
61 | EXPORT_SYMBOL(sn_io_addr); | |
62 | ||
63 | /** | |
64 | * __sn_mmiowb - I/O space memory barrier | |
65 | * | |
2a762130 | 66 | * See arch/ia64/include/asm/io.h and Documentation/driver-api/device-io.rst |
1da177e4 LT |
67 | * for details. |
68 | * | |
69 | * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear. | |
70 | * See PV 871084 for details about the WAR about zero value. | |
71 | * | |
72 | */ | |
73 | void __sn_mmiowb(void) | |
74 | { | |
75 | volatile unsigned long *adr = pda->pio_write_status_addr; | |
76 | unsigned long val = pda->pio_write_status_val; | |
77 | ||
78 | while ((*adr & SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK) != val) | |
79 | cpu_relax(); | |
80 | } | |
81 | ||
82 | EXPORT_SYMBOL(__sn_mmiowb); |