[linux-2.6-block.git] / arch / ia64 / kernel / vmlinux.lds.S


#include <asm/cache.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/pgtable.h>

#include <asm-generic/vmlinux.lds.h>

#define IVT_TEXT							\
		VMLINUX_SYMBOL(__start_ivt_text) = .;			\
		*(.text.ivt)						\
		VMLINUX_SYMBOL(__end_ivt_text) = .;

OUTPUT_FORMAT("elf64-ia64-little")
OUTPUT_ARCH(ia64)
ENTRY(phys_start)
jiffies = jiffies_64;
PHDRS {
  code   PT_LOAD;
  percpu PT_LOAD;
  data   PT_LOAD;
  note   PT_NOTE;
  unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */
}
SECTIONS
{
  /* Sections to be discarded */
  /DISCARD/ : {
	EXIT_TEXT
	EXIT_DATA
	*(.exitcall.exit)
	*(.IA_64.unwind.exit.text)
	*(.IA_64.unwind_info.exit.text)
	}

  v = PAGE_OFFSET;	/* this symbol is here to make debugging easier... */
  phys_start = _start - LOAD_OFFSET;

  code : { } :code
  . = KERNEL_START;

  _text = .;
  _stext = .;

  .text : AT(ADDR(.text) - LOAD_OFFSET)
    {
	IVT_TEXT
	TEXT_TEXT
	SCHED_TEXT
	LOCK_TEXT
	KPROBES_TEXT
	*(.gnu.linkonce.t*)
    }
  .text.head : AT(ADDR(.text.head) - LOAD_OFFSET)
	{ *(.text.head) }
  .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	{ *(.text2) }
#ifdef CONFIG_SMP
  .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	{ *(.text.lock) }
#endif
  _etext = .;

  /* Read-only data */

  NOTES :code :note		/* put .notes in text and mark in PT_NOTE  */
  code_continues : {} :code	/* switch back to regular program...  */

  /* Exception table */
  . = ALIGN(16);
  __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	{
	  __start___ex_table = .;
	  *(__ex_table)
	  __stop___ex_table = .;
	}

  /* MCA table */
  . = ALIGN(16);
  __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	{
	  __start___mca_table = .;
	  *(__mca_table)
	  __stop___mca_table = .;
	}

  .data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
	{
	  __start___phys_stack_reg_patchlist = .;
	  *(.data.patch.phys_stack_reg)
	  __end___phys_stack_reg_patchlist = .;
	}

  /* Global data */
  _data = .;

  /* Unwind info & table: */
  . = ALIGN(8);
  .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	{ *(.IA_64.unwind_info*) }
  .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	{
	  __start_unwind = .;
	  *(.IA_64.unwind*)
	  __end_unwind = .;
	} :code :unwind
  code_continues2 : {} : code

  RODATA

  .opd : AT(ADDR(.opd) - LOAD_OFFSET)
	{ *(.opd) }

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	{
	  _sinittext = .;
	  INIT_TEXT
	  _einittext = .;
	}

  .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
	{ INIT_DATA }

#ifdef CONFIG_BLK_DEV_INITRD
  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	{
	  __initramfs_start = .;
	  *(.init.ramfs)
	  __initramfs_end = .;
	}
#endif

   . = ALIGN(16);
  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
        {
	  __setup_start = .;
	  *(.init.setup)
	  __setup_end = .;
	}
  .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	{
	  __initcall_start = .;
	INITCALLS
	  __initcall_end = .;
	}

  .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	{
	  __start___vtop_patchlist = .;
	  *(.data.patch.vtop)
	  __end___vtop_patchlist = .;
	}

  .data.patch.rse : AT(ADDR(.data.patch.rse) - LOAD_OFFSET)
	{
	  __start___rse_patchlist = .;
	  *(.data.patch.rse)
	  __end___rse_patchlist = .;
	}

  .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	{
	  __start___mckinley_e9_bundles = .;
	  *(.data.patch.mckinley_e9)
	  __end___mckinley_e9_bundles = .;
	}

#if defined(CONFIG_IA64_GENERIC)
  /* Machine Vector */
  . = ALIGN(16);
  .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	{
	  machvec_start = .;
	  *(.machvec)
	  machvec_end = .;
	}
#endif

  . = ALIGN(8);
   __con_initcall_start = .;
  .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	{ *(.con_initcall.init) }
  __con_initcall_end = .;
  __security_initcall_start = .;
  .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	{ *(.security_initcall.init) }
  __security_initcall_end = .;
  . = ALIGN(PAGE_SIZE);
  __init_end = .;

  /* The initial task and kernel stack */
  .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	{ *(.data.init_task) }

  .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
        { *(__special_page_section)
	  __start_gate_section = .;
	  *(.data.gate)
	  __stop_gate_section = .;
	}
  . = ALIGN(PAGE_SIZE);		/* make sure the gate page doesn't expose
  				 * kernel data
				 */

  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
        { *(.data.read_mostly) }

  .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
        { *(.data.cacheline_aligned) }

  /* Per-cpu data: */
  percpu : { } :percpu
  . = ALIGN(PERCPU_PAGE_SIZE);
  __phys_per_cpu_start = .;
  .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	{
		__per_cpu_start = .;
		*(.data.percpu.page_aligned)
		*(.data.percpu)
		*(.data.percpu.shared_aligned)
		__per_cpu_end = .;
	}
  . = __phys_per_cpu_start + PERCPU_PAGE_SIZE;	/* ensure percpu data fits
  						 * into percpu page size
						 */

  data : { } :data
  .data : AT(ADDR(.data) - LOAD_OFFSET)
	{
#ifdef	CONFIG_SMP
  . = ALIGN(PERCPU_PAGE_SIZE);
		__cpu0_per_cpu = .;
  . = . + PERCPU_PAGE_SIZE;	/* cpu0 per-cpu space */
#endif
		DATA_DATA
		*(.data1)
		*(.gnu.linkonce.d*)
		CONSTRUCTORS
	}

  . = ALIGN(16);	/* gp must be 16-byte aligned for exc. table */
  .got : AT(ADDR(.got) - LOAD_OFFSET)
	{ *(.got.plt) *(.got) }
  __gp = ADDR(.got) + 0x200000;
  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */
  .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	{ *(.sdata) *(.sdata1) *(.srdata) }
  _edata  =  .;
  __bss_start = .;
  .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	{ *(.sbss) *(.scommon) }
  .bss : AT(ADDR(.bss) - LOAD_OFFSET)
	{ *(.bss) *(COMMON) }
  __bss_stop = .;

  _end = .;

  code : { } :code
  /* Stabs debugging sections.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  .stab.excl 0 : { *(.stab.excl) }
  .stab.exclstr 0 : { *(.stab.exclstr) }
  .stab.index 0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  /* These must appear regardless of  .  */
  /DISCARD/ : { *(.comment) }
  /DISCARD/ : { *(.note) }
}
Commit	Line	Data
1da177e4 LT	1
	2	#include <asm/cache.h>
	3	#include <asm/ptrace.h>
	4	#include <asm/system.h>
	5	#include <asm/pgtable.h>
	6
1da177e4 LT	7	#include <asm-generic/vmlinux.lds.h>
1da177e4 LT	8
c7b645f9 KA	9	#define IVT_TEXT \
	10	VMLINUX_SYMBOL(__start_ivt_text) = .; \
	11	*(.text.ivt) \
	12	VMLINUX_SYMBOL(__end_ivt_text) = .;
	13
1da177e4 LT	14	OUTPUT_FORMAT("elf64-ia64-little")
	15	OUTPUT_ARCH(ia64)
	16	ENTRY(phys_start)
	17	jiffies = jiffies_64;
	18	PHDRS {
	19	code PT_LOAD;
	20	percpu PT_LOAD;
	21	data PT_LOAD;
336cdba8	22	note PT_NOTE;
9bf77d0e	23	unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */
1da177e4 LT	24	}
	25	SECTIONS
	26	{
	27	/* Sections to be discarded */
	28	/DISCARD/ : {
01ba2bdc SR	29	EXIT_TEXT
01ba2bdc SR	30	EXIT_DATA
1da177e4 LT	31	*(.exitcall.exit)
	32	*(.IA_64.unwind.exit.text)
	33	*(.IA_64.unwind_info.exit.text)
	34	}
	35
	36	v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
	37	phys_start = _start - LOAD_OFFSET;
	38
	39	code : { } :code
	40	. = KERNEL_START;
	41
	42	_text = .;
	43	_stext = .;
	44
	45	.text : AT(ADDR(.text) - LOAD_OFFSET)
	46	{
c7b645f9	47	IVT_TEXT
7664709b	48	TEXT_TEXT
1da177e4 LT	49	SCHED_TEXT
1da177e4 LT	50	LOCK_TEXT
1f7ad57b	51	KPROBES_TEXT
1da177e4 LT	52	(.gnu.linkonce.t)
1da177e4 LT	53	}
9d6f40b8 TL	54	.text.head : AT(ADDR(.text.head) - LOAD_OFFSET)
9d6f40b8 TL	55	{ *(.text.head) }
1da177e4 LT	56	.text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	57	{ *(.text2) }
	58	#ifdef CONFIG_SMP
	59	.text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	60	{ *(.text.lock) }
	61	#endif
	62	_etext = .;
	63
	64	/* Read-only data */
	65
336cdba8 DMT	66	NOTES :code :note /* put .notes in text and mark in PT_NOTE */
	67	code_continues : {} :code /* switch back to regular program... */
	68
1da177e4 LT	69	/* Exception table */
	70	. = ALIGN(16);
	71	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	72	{
	73	__start___ex_table = .;
	74	*(__ex_table)
	75	__stop___ex_table = .;
	76	}
	77
d89cfe7f RA	78	/* MCA table */
	79	. = ALIGN(16);
	80	__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	81	{
	82	__start___mca_table = .;
	83	*(__mca_table)
	84	__stop___mca_table = .;
	85	}
	86
a0776ec8 CK	87	.data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
	88	{
	89	__start___phys_stack_reg_patchlist = .;
	90	*(.data.patch.phys_stack_reg)
	91	__end___phys_stack_reg_patchlist = .;
	92	}
	93
1da177e4 LT	94	/* Global data */
	95	_data = .;
	96
1da177e4 LT	97	/* Unwind info & table: */
	98	. = ALIGN(8);
	99	.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	100	{ (.IA_64.unwind_info) }
	101	.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	102	{
	103	__start_unwind = .;
	104	(.IA_64.unwind)
	105	__end_unwind = .;
9bf77d0e DMT	106	} :code :unwind
9bf77d0e DMT	107	code_continues2 : {} : code
1da177e4 LT	108
	109	RODATA
	110
	111	.opd : AT(ADDR(.opd) - LOAD_OFFSET)
	112	{ *(.opd) }
	113
	114	/* Initialization code and data: */
	115
	116	. = ALIGN(PAGE_SIZE);
	117	__init_begin = .;
	118	.init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	119	{
	120	_sinittext = .;
01ba2bdc	121	INIT_TEXT
1da177e4 LT	122	_einittext = .;
	123	}
	124
	125	.init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
01ba2bdc	126	{ INIT_DATA }
1da177e4	127
67d38229	128	#ifdef CONFIG_BLK_DEV_INITRD
1da177e4 LT	129	.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	130	{
	131	__initramfs_start = .;
	132	*(.init.ramfs)
	133	__initramfs_end = .;
	134	}
67d38229	135	#endif
1da177e4 LT	136
	137	. = ALIGN(16);
	138	.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
	139	{
	140	__setup_start = .;
	141	*(.init.setup)
	142	__setup_end = .;
	143	}
	144	.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	145	{
	146	__initcall_start = .;
61ce1efe	147	INITCALLS
1da177e4 LT	148	__initcall_end = .;
1da177e4 LT	149	}
39e18de8 CK	150
	151	.data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	152	{
	153	__start___vtop_patchlist = .;
	154	*(.data.patch.vtop)
	155	__end___vtop_patchlist = .;
	156	}
	157
4dcc29e1 TL	158	.data.patch.rse : AT(ADDR(.data.patch.rse) - LOAD_OFFSET)
	159	{
	160	__start___rse_patchlist = .;
	161	*(.data.patch.rse)
	162	__end___rse_patchlist = .;
	163	}
	164
39e18de8 CK	165	.data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	166	{
	167	__start___mckinley_e9_bundles = .;
	168	*(.data.patch.mckinley_e9)
	169	__end___mckinley_e9_bundles = .;
	170	}
	171
	172	#if defined(CONFIG_IA64_GENERIC)
	173	/* Machine Vector */
	174	. = ALIGN(16);
	175	.machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	176	{
	177	machvec_start = .;
	178	*(.machvec)
	179	machvec_end = .;
	180	}
	181	#endif
	182
d00195eb	183	. = ALIGN(8);
1da177e4 LT	184	__con_initcall_start = .;
	185	.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	186	{ *(.con_initcall.init) }
	187	__con_initcall_end = .;
	188	__security_initcall_start = .;
	189	.security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	190	{ *(.security_initcall.init) }
	191	__security_initcall_end = .;
	192	. = ALIGN(PAGE_SIZE);
	193	__init_end = .;
	194
	195	/* The initial task and kernel stack */
	196	.data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	197	{ *(.data.init_task) }
	198
	199	.data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
	200	{ *(__special_page_section)
	201	__start_gate_section = .;
	202	*(.data.gate)
	203	__stop_gate_section = .;
	204	}
df8f0ec1 AS	205	. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose
	206	* kernel data
	207	*/
1da177e4	208
dc86e88c CL	209	.data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
	210	{ *(.data.read_mostly) }
	211
1da177e4 LT	212	.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
	213	{ *(.data.cacheline_aligned) }
	214
	215	/* Per-cpu data: */
	216	percpu : { } :percpu
	217	. = ALIGN(PERCPU_PAGE_SIZE);
	218	__phys_per_cpu_start = .;
	219	.data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	220	{
	221	__per_cpu_start = .;
74e79045	222	*(.data.percpu.page_aligned)
1da177e4	223	*(.data.percpu)
5fb7dc37	224	*(.data.percpu.shared_aligned)
1da177e4 LT	225	__per_cpu_end = .;
1da177e4 LT	226	}
df8f0ec1 AS	227	. = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
	228	* into percpu page size
	229	*/
1da177e4 LT	230
	231	data : { } :data
	232	.data : AT(ADDR(.data) - LOAD_OFFSET)
ca967258	233	{
c459ce8b TL	234	#ifdef CONFIG_SMP
	235	. = ALIGN(PERCPU_PAGE_SIZE);
	236	__cpu0_per_cpu = .;
	237	. = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */
	238	#endif
ca967258 SR	239	DATA_DATA
	240	*(.data1)
	241	(.gnu.linkonce.d)
	242	CONSTRUCTORS
	243	}
1da177e4 LT	244
	245	. = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
	246	.got : AT(ADDR(.got) - LOAD_OFFSET)
	247	{ (.got.plt) (.got) }
	248	__gp = ADDR(.got) + 0x200000;
	249	/* We want the small data sections together, so single-instruction offsets
	250	can access them all, and initialized data all before uninitialized, so
	251	we can shorten the on-disk segment size. */
	252	.sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	253	{ (.sdata) (.sdata1) *(.srdata) }
	254	_edata = .;
b898a424	255	__bss_start = .;
1da177e4 LT	256	.sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	257	{ (.sbss) (.scommon) }
	258	.bss : AT(ADDR(.bss) - LOAD_OFFSET)
	259	{ (.bss) (COMMON) }
b898a424	260	__bss_stop = .;
1da177e4 LT	261
	262	_end = .;
	263
	264	code : { } :code
	265	/* Stabs debugging sections. */
	266	.stab 0 : { *(.stab) }
	267	.stabstr 0 : { *(.stabstr) }
	268	.stab.excl 0 : { *(.stab.excl) }
	269	.stab.exclstr 0 : { *(.stab.exclstr) }
	270	.stab.index 0 : { *(.stab.index) }
	271	.stab.indexstr 0 : { *(.stab.indexstr) }
	272	/* DWARF debug sections.
	273	Symbols in the DWARF debugging sections are relative to the beginning
	274	of the section so we begin them at 0. */
	275	/* DWARF 1 */
	276	.debug 0 : { *(.debug) }
	277	.line 0 : { *(.line) }
	278	/* GNU DWARF 1 extensions */
	279	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	280	.debug_sfnames 0 : { *(.debug_sfnames) }
	281	/* DWARF 1.1 and DWARF 2 */
	282	.debug_aranges 0 : { *(.debug_aranges) }
	283	.debug_pubnames 0 : { *(.debug_pubnames) }
	284	/* DWARF 2 */
	285	.debug_info 0 : { *(.debug_info) }
	286	.debug_abbrev 0 : { *(.debug_abbrev) }
	287	.debug_line 0 : { *(.debug_line) }
	288	.debug_frame 0 : { *(.debug_frame) }
	289	.debug_str 0 : { *(.debug_str) }
	290	.debug_loc 0 : { *(.debug_loc) }
	291	.debug_macinfo 0 : { *(.debug_macinfo) }
	292	/* SGI/MIPS DWARF 2 extensions */
	293	.debug_weaknames 0 : { *(.debug_weaknames) }
	294	.debug_funcnames 0 : { *(.debug_funcnames) }
	295	.debug_typenames 0 : { *(.debug_typenames) }
	296	.debug_varnames 0 : { *(.debug_varnames) }
	297	/* These must appear regardless of . */
1da177e4 LT	298	/DISCARD/ : { *(.comment) }
	299	/DISCARD/ : { *(.note) }
	300	}