irqchip: Remove asmlinkage from static functions
[linux-2.6-block.git] / arch / ia64 / kernel / msi_ia64.c
CommitLineData
fd58e55f
MM
1/*
2 * MSI hooks for standard x86 apic
3 */
4
5#include <linux/pci.h>
6#include <linux/irq.h>
3b7d1921 7#include <linux/msi.h>
62fdd767 8#include <linux/dmar.h>
a4cffb64 9#include <asm/smp.h>
2fa8937f 10#include <asm/msidef.h>
fd58e55f 11
3b7d1921 12static struct irq_chip ia64_msi_chip;
fd58e55f 13
3b7d1921 14#ifdef CONFIG_SMP
f1f701e9
TG
15static int ia64_set_msi_irq_affinity(struct irq_data *idata,
16 const cpumask_t *cpu_mask, bool force)
fd58e55f 17{
3b7d1921 18 struct msi_msg msg;
cd378f18 19 u32 addr, data;
0de26520 20 int cpu = first_cpu(*cpu_mask);
f1f701e9 21 unsigned int irq = idata->irq;
3b7d1921 22
cd378f18 23 if (!cpu_online(cpu))
d5dedd45 24 return -1;
cd378f18 25
a6cd6322 26 if (irq_prepare_move(irq, cpu))
d5dedd45 27 return -1;
4994be1b 28
30da5524 29 get_cached_msi_msg(irq, &msg);
fd58e55f 30
3b7d1921 31 addr = msg.address_lo;
2fa8937f
XZ
32 addr &= MSI_ADDR_DEST_ID_MASK;
33 addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
3b7d1921 34 msg.address_lo = addr;
fd58e55f 35
cd378f18
YI
36 data = msg.data;
37 data &= MSI_DATA_VECTOR_MASK;
38 data |= MSI_DATA_VECTOR(irq_to_vector(irq));
39 msg.data = data;
40
3b7d1921 41 write_msi_msg(irq, &msg);
f1f701e9 42 cpumask_copy(idata->affinity, cpumask_of(cpu));
d5dedd45
YL
43
44 return 0;
fd58e55f 45}
3b7d1921 46#endif /* CONFIG_SMP */
fd58e55f 47
f7feaca7 48int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
fd58e55f 49{
3b7d1921 50 struct msi_msg msg;
fd58e55f 51 unsigned long dest_phys_id;
8a3a0ee7 52 int irq, vector;
4994be1b 53 cpumask_t mask;
fd58e55f 54
f7feaca7
EB
55 irq = create_irq();
56 if (irq < 0)
57 return irq;
58
53c909c9 59 irq_set_msi_desc(irq, desc);
7d7f9848 60 cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask);
4994be1b 61 dest_phys_id = cpu_physical_id(first_cpu(mask));
9438a121 62 vector = irq_to_vector(irq);
fd58e55f 63
3b7d1921
EB
64 msg.address_hi = 0;
65 msg.address_lo =
38bc0361 66 MSI_ADDR_HEADER |
2fa8937f 67 MSI_ADDR_DEST_MODE_PHYS |
38bc0361 68 MSI_ADDR_REDIRECTION_CPU |
2fa8937f 69 MSI_ADDR_DEST_ID_CPU(dest_phys_id);
fd58e55f 70
3b7d1921 71 msg.data =
38bc0361 72 MSI_DATA_TRIGGER_EDGE |
fd58e55f
MM
73 MSI_DATA_LEVEL_ASSERT |
74 MSI_DATA_DELIVERY_FIXED |
75 MSI_DATA_VECTOR(vector);
76
3b7d1921 77 write_msi_msg(irq, &msg);
53c909c9 78 irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
3b7d1921 79
3aff0373 80 return 0;
fd58e55f
MM
81}
82
3b7d1921 83void ia64_teardown_msi_irq(unsigned int irq)
fd58e55f 84{
f7feaca7 85 destroy_irq(irq);
fd58e55f
MM
86}
87
f1f701e9 88static void ia64_ack_msi_irq(struct irq_data *data)
3b7d1921 89{
f1f701e9 90 irq_complete_move(data->irq);
97499b2e 91 irq_move_irq(data);
3b7d1921
EB
92 ia64_eoi();
93}
94
f1f701e9 95static int ia64_msi_retrigger_irq(struct irq_data *data)
3b7d1921 96{
f1f701e9 97 unsigned int vector = irq_to_vector(data->irq);
3b7d1921
EB
98 ia64_resend_irq(vector);
99
100 return 1;
101}
102
fd58e55f 103/*
3b7d1921 104 * Generic ops used on most IA64 platforms.
fd58e55f 105 */
3b7d1921 106static struct irq_chip ia64_msi_chip = {
f1f701e9
TG
107 .name = "PCI-MSI",
108 .irq_mask = mask_msi_irq,
109 .irq_unmask = unmask_msi_irq,
110 .irq_ack = ia64_ack_msi_irq,
3b7d1921 111#ifdef CONFIG_SMP
f1f701e9 112 .irq_set_affinity = ia64_set_msi_irq_affinity,
3b7d1921 113#endif
f1f701e9 114 .irq_retrigger = ia64_msi_retrigger_irq,
fd58e55f 115};
3b7d1921
EB
116
117
f7feaca7 118int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
3b7d1921
EB
119{
120 if (platform_setup_msi_irq)
f7feaca7 121 return platform_setup_msi_irq(pdev, desc);
3b7d1921 122
f7feaca7 123 return ia64_setup_msi_irq(pdev, desc);
3b7d1921
EB
124}
125
126void arch_teardown_msi_irq(unsigned int irq)
127{
128 if (platform_teardown_msi_irq)
129 return platform_teardown_msi_irq(irq);
130
131 return ia64_teardown_msi_irq(irq);
132}
62fdd767 133
d3f13810 134#ifdef CONFIG_INTEL_IOMMU
62fdd767 135#ifdef CONFIG_SMP
f1f701e9
TG
136static int dmar_msi_set_affinity(struct irq_data *data,
137 const struct cpumask *mask, bool force)
62fdd767 138{
f1f701e9 139 unsigned int irq = data->irq;
62fdd767
FY
140 struct irq_cfg *cfg = irq_cfg + irq;
141 struct msi_msg msg;
0de26520 142 int cpu = cpumask_first(mask);
62fdd767
FY
143
144 if (!cpu_online(cpu))
d5dedd45 145 return -1;
62fdd767
FY
146
147 if (irq_prepare_move(irq, cpu))
d5dedd45 148 return -1;
62fdd767
FY
149
150 dmar_msi_read(irq, &msg);
151
152 msg.data &= ~MSI_DATA_VECTOR_MASK;
153 msg.data |= MSI_DATA_VECTOR(cfg->vector);
2fa8937f
XZ
154 msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
155 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
62fdd767
FY
156
157 dmar_msi_write(irq, &msg);
f1f701e9 158 cpumask_copy(data->affinity, mask);
d5dedd45
YL
159
160 return 0;
62fdd767
FY
161}
162#endif /* CONFIG_SMP */
163
9542b21e 164static struct irq_chip dmar_msi_type = {
62fdd767 165 .name = "DMAR_MSI",
5c2837fb
TG
166 .irq_unmask = dmar_msi_unmask,
167 .irq_mask = dmar_msi_mask,
f1f701e9 168 .irq_ack = ia64_ack_msi_irq,
62fdd767 169#ifdef CONFIG_SMP
f1f701e9 170 .irq_set_affinity = dmar_msi_set_affinity,
62fdd767 171#endif
f1f701e9 172 .irq_retrigger = ia64_msi_retrigger_irq,
62fdd767
FY
173};
174
175static int
176msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
177{
178 struct irq_cfg *cfg = irq_cfg + irq;
179 unsigned dest;
180 cpumask_t mask;
181
7d7f9848 182 cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask);
62fdd767
FY
183 dest = cpu_physical_id(first_cpu(mask));
184
185 msg->address_hi = 0;
186 msg->address_lo =
187 MSI_ADDR_HEADER |
2fa8937f 188 MSI_ADDR_DEST_MODE_PHYS |
62fdd767 189 MSI_ADDR_REDIRECTION_CPU |
2fa8937f 190 MSI_ADDR_DEST_ID_CPU(dest);
62fdd767
FY
191
192 msg->data =
193 MSI_DATA_TRIGGER_EDGE |
194 MSI_DATA_LEVEL_ASSERT |
195 MSI_DATA_DELIVERY_FIXED |
196 MSI_DATA_VECTOR(cfg->vector);
197 return 0;
198}
199
200int arch_setup_dmar_msi(unsigned int irq)
201{
202 int ret;
203 struct msi_msg msg;
204
205 ret = msi_compose_msg(NULL, irq, &msg);
206 if (ret < 0)
207 return ret;
208 dmar_msi_write(irq, &msg);
53c909c9
TG
209 irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
210 "edge");
62fdd767
FY
211 return 0;
212}
d3f13810 213#endif /* CONFIG_INTEL_IOMMU */
62fdd767 214