Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / arch / ia64 / kernel / msi_ia64.c
CommitLineData
fd58e55f
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1/*
2 * MSI hooks for standard x86 apic
3 */
4
5#include <linux/pci.h>
6#include <linux/irq.h>
3b7d1921 7#include <linux/msi.h>
62fdd767 8#include <linux/dmar.h>
a4cffb64 9#include <asm/smp.h>
2fa8937f 10#include <asm/msidef.h>
fd58e55f 11
3b7d1921 12static struct irq_chip ia64_msi_chip;
fd58e55f 13
3b7d1921 14#ifdef CONFIG_SMP
f1f701e9
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15static int ia64_set_msi_irq_affinity(struct irq_data *idata,
16 const cpumask_t *cpu_mask, bool force)
fd58e55f 17{
3b7d1921 18 struct msi_msg msg;
cd378f18 19 u32 addr, data;
785aebd0 20 int cpu = cpumask_first_and(cpu_mask, cpu_online_mask);
f1f701e9 21 unsigned int irq = idata->irq;
3b7d1921 22
a6cd6322 23 if (irq_prepare_move(irq, cpu))
d5dedd45 24 return -1;
4994be1b 25
2b260085 26 __get_cached_msi_msg(idata->msi_desc, &msg);
fd58e55f 27
3b7d1921 28 addr = msg.address_lo;
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29 addr &= MSI_ADDR_DEST_ID_MASK;
30 addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
3b7d1921 31 msg.address_lo = addr;
fd58e55f 32
cd378f18
YI
33 data = msg.data;
34 data &= MSI_DATA_VECTOR_MASK;
35 data |= MSI_DATA_VECTOR(irq_to_vector(irq));
36 msg.data = data;
37
3b7d1921 38 write_msi_msg(irq, &msg);
f1f701e9 39 cpumask_copy(idata->affinity, cpumask_of(cpu));
d5dedd45
YL
40
41 return 0;
fd58e55f 42}
3b7d1921 43#endif /* CONFIG_SMP */
fd58e55f 44
f7feaca7 45int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
fd58e55f 46{
3b7d1921 47 struct msi_msg msg;
fd58e55f 48 unsigned long dest_phys_id;
8a3a0ee7 49 int irq, vector;
4994be1b 50 cpumask_t mask;
fd58e55f 51
f7feaca7
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52 irq = create_irq();
53 if (irq < 0)
54 return irq;
55
53c909c9 56 irq_set_msi_desc(irq, desc);
7d7f9848 57 cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask);
4994be1b 58 dest_phys_id = cpu_physical_id(first_cpu(mask));
9438a121 59 vector = irq_to_vector(irq);
fd58e55f 60
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61 msg.address_hi = 0;
62 msg.address_lo =
38bc0361 63 MSI_ADDR_HEADER |
2fa8937f 64 MSI_ADDR_DEST_MODE_PHYS |
38bc0361 65 MSI_ADDR_REDIRECTION_CPU |
2fa8937f 66 MSI_ADDR_DEST_ID_CPU(dest_phys_id);
fd58e55f 67
3b7d1921 68 msg.data =
38bc0361 69 MSI_DATA_TRIGGER_EDGE |
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70 MSI_DATA_LEVEL_ASSERT |
71 MSI_DATA_DELIVERY_FIXED |
72 MSI_DATA_VECTOR(vector);
73
3b7d1921 74 write_msi_msg(irq, &msg);
53c909c9 75 irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
3b7d1921 76
3aff0373 77 return 0;
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78}
79
3b7d1921 80void ia64_teardown_msi_irq(unsigned int irq)
fd58e55f 81{
f7feaca7 82 destroy_irq(irq);
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83}
84
f1f701e9 85static void ia64_ack_msi_irq(struct irq_data *data)
3b7d1921 86{
f1f701e9 87 irq_complete_move(data->irq);
97499b2e 88 irq_move_irq(data);
3b7d1921
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89 ia64_eoi();
90}
91
f1f701e9 92static int ia64_msi_retrigger_irq(struct irq_data *data)
3b7d1921 93{
f1f701e9 94 unsigned int vector = irq_to_vector(data->irq);
3b7d1921
EB
95 ia64_resend_irq(vector);
96
97 return 1;
98}
99
fd58e55f 100/*
3b7d1921 101 * Generic ops used on most IA64 platforms.
fd58e55f 102 */
3b7d1921 103static struct irq_chip ia64_msi_chip = {
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104 .name = "PCI-MSI",
105 .irq_mask = mask_msi_irq,
106 .irq_unmask = unmask_msi_irq,
107 .irq_ack = ia64_ack_msi_irq,
3b7d1921 108#ifdef CONFIG_SMP
f1f701e9 109 .irq_set_affinity = ia64_set_msi_irq_affinity,
3b7d1921 110#endif
f1f701e9 111 .irq_retrigger = ia64_msi_retrigger_irq,
fd58e55f 112};
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113
114
f7feaca7 115int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
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116{
117 if (platform_setup_msi_irq)
f7feaca7 118 return platform_setup_msi_irq(pdev, desc);
3b7d1921 119
f7feaca7 120 return ia64_setup_msi_irq(pdev, desc);
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121}
122
123void arch_teardown_msi_irq(unsigned int irq)
124{
125 if (platform_teardown_msi_irq)
126 return platform_teardown_msi_irq(irq);
127
128 return ia64_teardown_msi_irq(irq);
129}
62fdd767 130
d3f13810 131#ifdef CONFIG_INTEL_IOMMU
62fdd767 132#ifdef CONFIG_SMP
f1f701e9
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133static int dmar_msi_set_affinity(struct irq_data *data,
134 const struct cpumask *mask, bool force)
62fdd767 135{
f1f701e9 136 unsigned int irq = data->irq;
62fdd767
FY
137 struct irq_cfg *cfg = irq_cfg + irq;
138 struct msi_msg msg;
785aebd0 139 int cpu = cpumask_first_and(mask, cpu_online_mask);
62fdd767
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140
141 if (irq_prepare_move(irq, cpu))
d5dedd45 142 return -1;
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143
144 dmar_msi_read(irq, &msg);
145
146 msg.data &= ~MSI_DATA_VECTOR_MASK;
147 msg.data |= MSI_DATA_VECTOR(cfg->vector);
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148 msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
149 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
62fdd767
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150
151 dmar_msi_write(irq, &msg);
f1f701e9 152 cpumask_copy(data->affinity, mask);
d5dedd45
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153
154 return 0;
62fdd767
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155}
156#endif /* CONFIG_SMP */
157
9542b21e 158static struct irq_chip dmar_msi_type = {
62fdd767 159 .name = "DMAR_MSI",
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160 .irq_unmask = dmar_msi_unmask,
161 .irq_mask = dmar_msi_mask,
f1f701e9 162 .irq_ack = ia64_ack_msi_irq,
62fdd767 163#ifdef CONFIG_SMP
f1f701e9 164 .irq_set_affinity = dmar_msi_set_affinity,
62fdd767 165#endif
f1f701e9 166 .irq_retrigger = ia64_msi_retrigger_irq,
62fdd767
FY
167};
168
169static int
170msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
171{
172 struct irq_cfg *cfg = irq_cfg + irq;
173 unsigned dest;
174 cpumask_t mask;
175
7d7f9848 176 cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask);
62fdd767
FY
177 dest = cpu_physical_id(first_cpu(mask));
178
179 msg->address_hi = 0;
180 msg->address_lo =
181 MSI_ADDR_HEADER |
2fa8937f 182 MSI_ADDR_DEST_MODE_PHYS |
62fdd767 183 MSI_ADDR_REDIRECTION_CPU |
2fa8937f 184 MSI_ADDR_DEST_ID_CPU(dest);
62fdd767
FY
185
186 msg->data =
187 MSI_DATA_TRIGGER_EDGE |
188 MSI_DATA_LEVEL_ASSERT |
189 MSI_DATA_DELIVERY_FIXED |
190 MSI_DATA_VECTOR(cfg->vector);
191 return 0;
192}
193
194int arch_setup_dmar_msi(unsigned int irq)
195{
196 int ret;
197 struct msi_msg msg;
198
199 ret = msi_compose_msg(NULL, irq, &msg);
200 if (ret < 0)
201 return ret;
202 dmar_msi_write(irq, &msg);
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203 irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
204 "edge");
62fdd767
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205 return 0;
206}
d3f13810 207#endif /* CONFIG_INTEL_IOMMU */
62fdd767 208