Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * ia64/kernel/entry.S | |
3 | * | |
4 | * Kernel entry points. | |
5 | * | |
6 | * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co | |
7 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
8 | * Copyright (C) 1999, 2002-2003 | |
9 | * Asit Mallick <Asit.K.Mallick@intel.com> | |
10 | * Don Dugger <Don.Dugger@intel.com> | |
11 | * Suresh Siddha <suresh.b.siddha@intel.com> | |
12 | * Fenghua Yu <fenghua.yu@intel.com> | |
13 | * Copyright (C) 1999 VA Linux Systems | |
14 | * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> | |
15 | */ | |
16 | /* | |
17 | * ia64_switch_to now places correct virtual mapping in in TR2 for | |
18 | * kernel stack. This allows us to handle interrupts without changing | |
19 | * to physical mode. | |
20 | * | |
21 | * Jonathan Nicklin <nicklin@missioncriticallinux.com> | |
22 | * Patrick O'Rourke <orourke@missioncriticallinux.com> | |
23 | * 11/07/2000 | |
24 | */ | |
25 | /* | |
26 | * Global (preserved) predicate usage on syscall entry/exit path: | |
27 | * | |
28 | * pKStk: See entry.h. | |
29 | * pUStk: See entry.h. | |
30 | * pSys: See entry.h. | |
31 | * pNonSys: !pSys | |
32 | */ | |
33 | ||
34 | #include <linux/config.h> | |
35 | ||
36 | #include <asm/asmmacro.h> | |
37 | #include <asm/cache.h> | |
38 | #include <asm/errno.h> | |
39 | #include <asm/kregs.h> | |
40 | #include <asm/offsets.h> | |
41 | #include <asm/pgtable.h> | |
42 | #include <asm/percpu.h> | |
43 | #include <asm/processor.h> | |
44 | #include <asm/thread_info.h> | |
45 | #include <asm/unistd.h> | |
46 | ||
47 | #include "minstate.h" | |
48 | ||
49 | /* | |
50 | * execve() is special because in case of success, we need to | |
51 | * setup a null register window frame. | |
52 | */ | |
53 | ENTRY(ia64_execve) | |
54 | /* | |
55 | * Allocate 8 input registers since ptrace() may clobber them | |
56 | */ | |
57 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) | |
58 | alloc loc1=ar.pfs,8,2,4,0 | |
59 | mov loc0=rp | |
60 | .body | |
61 | mov out0=in0 // filename | |
62 | ;; // stop bit between alloc and call | |
63 | mov out1=in1 // argv | |
64 | mov out2=in2 // envp | |
65 | add out3=16,sp // regs | |
66 | br.call.sptk.many rp=sys_execve | |
67 | .ret0: | |
68 | #ifdef CONFIG_IA32_SUPPORT | |
69 | /* | |
70 | * Check if we're returning to ia32 mode. If so, we need to restore ia32 registers | |
71 | * from pt_regs. | |
72 | */ | |
73 | adds r16=PT(CR_IPSR)+16,sp | |
74 | ;; | |
75 | ld8 r16=[r16] | |
76 | #endif | |
77 | cmp4.ge p6,p7=r8,r0 | |
78 | mov ar.pfs=loc1 // restore ar.pfs | |
79 | sxt4 r8=r8 // return 64-bit result | |
80 | ;; | |
81 | stf.spill [sp]=f0 | |
82 | (p6) cmp.ne pKStk,pUStk=r0,r0 // a successful execve() lands us in user-mode... | |
83 | mov rp=loc0 | |
84 | (p6) mov ar.pfs=r0 // clear ar.pfs on success | |
85 | (p7) br.ret.sptk.many rp | |
86 | ||
87 | /* | |
88 | * In theory, we'd have to zap this state only to prevent leaking of | |
89 | * security sensitive state (e.g., if current->mm->dumpable is zero). However, | |
90 | * this executes in less than 20 cycles even on Itanium, so it's not worth | |
91 | * optimizing for...). | |
92 | */ | |
93 | mov ar.unat=0; mov ar.lc=0 | |
94 | mov r4=0; mov f2=f0; mov b1=r0 | |
95 | mov r5=0; mov f3=f0; mov b2=r0 | |
96 | mov r6=0; mov f4=f0; mov b3=r0 | |
97 | mov r7=0; mov f5=f0; mov b4=r0 | |
98 | ldf.fill f12=[sp]; mov f13=f0; mov b5=r0 | |
99 | ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0 | |
100 | ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0 | |
101 | ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0 | |
102 | ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0 | |
103 | ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0 | |
104 | ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0 | |
105 | #ifdef CONFIG_IA32_SUPPORT | |
106 | tbit.nz p6,p0=r16, IA64_PSR_IS_BIT | |
107 | movl loc0=ia64_ret_from_ia32_execve | |
108 | ;; | |
109 | (p6) mov rp=loc0 | |
110 | #endif | |
111 | br.ret.sptk.many rp | |
112 | END(ia64_execve) | |
113 | ||
114 | /* | |
115 | * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr, | |
116 | * u64 tls) | |
117 | */ | |
118 | GLOBAL_ENTRY(sys_clone2) | |
119 | /* | |
120 | * Allocate 8 input registers since ptrace() may clobber them | |
121 | */ | |
122 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) | |
123 | alloc r16=ar.pfs,8,2,6,0 | |
124 | DO_SAVE_SWITCH_STACK | |
125 | adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp | |
126 | mov loc0=rp | |
127 | mov loc1=r16 // save ar.pfs across do_fork | |
128 | .body | |
129 | mov out1=in1 | |
130 | mov out3=in2 | |
131 | tbit.nz p6,p0=in0,CLONE_SETTLS_BIT | |
132 | mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID | |
133 | ;; | |
134 | (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread() | |
135 | mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID | |
136 | adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s | |
137 | mov out0=in0 // out0 = clone_flags | |
138 | br.call.sptk.many rp=do_fork | |
139 | .ret1: .restore sp | |
140 | adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack | |
141 | mov ar.pfs=loc1 | |
142 | mov rp=loc0 | |
143 | br.ret.sptk.many rp | |
144 | END(sys_clone2) | |
145 | ||
146 | /* | |
147 | * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls) | |
148 | * Deprecated. Use sys_clone2() instead. | |
149 | */ | |
150 | GLOBAL_ENTRY(sys_clone) | |
151 | /* | |
152 | * Allocate 8 input registers since ptrace() may clobber them | |
153 | */ | |
154 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) | |
155 | alloc r16=ar.pfs,8,2,6,0 | |
156 | DO_SAVE_SWITCH_STACK | |
157 | adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp | |
158 | mov loc0=rp | |
159 | mov loc1=r16 // save ar.pfs across do_fork | |
160 | .body | |
161 | mov out1=in1 | |
162 | mov out3=16 // stacksize (compensates for 16-byte scratch area) | |
163 | tbit.nz p6,p0=in0,CLONE_SETTLS_BIT | |
164 | mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID | |
165 | ;; | |
166 | (p6) st8 [r2]=in4 // store TLS in r13 (tp) | |
167 | mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID | |
168 | adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s | |
169 | mov out0=in0 // out0 = clone_flags | |
170 | br.call.sptk.many rp=do_fork | |
171 | .ret2: .restore sp | |
172 | adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack | |
173 | mov ar.pfs=loc1 | |
174 | mov rp=loc0 | |
175 | br.ret.sptk.many rp | |
176 | END(sys_clone) | |
177 | ||
178 | /* | |
179 | * prev_task <- ia64_switch_to(struct task_struct *next) | |
180 | * With Ingo's new scheduler, interrupts are disabled when this routine gets | |
181 | * called. The code starting at .map relies on this. The rest of the code | |
182 | * doesn't care about the interrupt masking status. | |
183 | */ | |
184 | GLOBAL_ENTRY(ia64_switch_to) | |
185 | .prologue | |
186 | alloc r16=ar.pfs,1,0,0,0 | |
187 | DO_SAVE_SWITCH_STACK | |
188 | .body | |
189 | ||
190 | adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13 | |
191 | movl r25=init_task | |
192 | mov r27=IA64_KR(CURRENT_STACK) | |
193 | adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0 | |
194 | dep r20=0,in0,61,3 // physical address of "next" | |
195 | ;; | |
196 | st8 [r22]=sp // save kernel stack pointer of old task | |
197 | shr.u r26=r20,IA64_GRANULE_SHIFT | |
198 | cmp.eq p7,p6=r25,in0 | |
199 | ;; | |
200 | /* | |
201 | * If we've already mapped this task's page, we can skip doing it again. | |
202 | */ | |
203 | (p6) cmp.eq p7,p6=r26,r27 | |
204 | (p6) br.cond.dpnt .map | |
205 | ;; | |
206 | .done: | |
207 | (p6) ssm psr.ic // if we had to map, reenable the psr.ic bit FIRST!!! | |
208 | ;; | |
209 | (p6) srlz.d | |
210 | ld8 sp=[r21] // load kernel stack pointer of new task | |
211 | mov IA64_KR(CURRENT)=in0 // update "current" application register | |
212 | mov r8=r13 // return pointer to previously running task | |
213 | mov r13=in0 // set "current" pointer | |
214 | ;; | |
215 | DO_LOAD_SWITCH_STACK | |
216 | ||
217 | #ifdef CONFIG_SMP | |
218 | sync.i // ensure "fc"s done by this CPU are visible on other CPUs | |
219 | #endif | |
220 | br.ret.sptk.many rp // boogie on out in new context | |
221 | ||
222 | .map: | |
223 | rsm psr.ic // interrupts (psr.i) are already disabled here | |
224 | movl r25=PAGE_KERNEL | |
225 | ;; | |
226 | srlz.d | |
227 | or r23=r25,r20 // construct PA | page properties | |
228 | mov r25=IA64_GRANULE_SHIFT<<2 | |
229 | ;; | |
230 | mov cr.itir=r25 | |
231 | mov cr.ifa=in0 // VA of next task... | |
232 | ;; | |
233 | mov r25=IA64_TR_CURRENT_STACK | |
234 | mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped... | |
235 | ;; | |
236 | itr.d dtr[r25]=r23 // wire in new mapping... | |
237 | br.cond.sptk .done | |
238 | END(ia64_switch_to) | |
239 | ||
240 | /* | |
241 | * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This | |
242 | * means that we may get an interrupt with "sp" pointing to the new kernel stack while | |
243 | * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc, | |
244 | * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a | |
245 | * problem. Also, we don't need to specify unwind information for preserved registers | |
246 | * that are not modified in save_switch_stack as the right unwind information is already | |
247 | * specified at the call-site of save_switch_stack. | |
248 | */ | |
249 | ||
250 | /* | |
251 | * save_switch_stack: | |
252 | * - r16 holds ar.pfs | |
253 | * - b7 holds address to return to | |
254 | * - rp (b0) holds return address to save | |
255 | */ | |
256 | GLOBAL_ENTRY(save_switch_stack) | |
257 | .prologue | |
258 | .altrp b7 | |
259 | flushrs // flush dirty regs to backing store (must be first in insn group) | |
260 | .save @priunat,r17 | |
261 | mov r17=ar.unat // preserve caller's | |
262 | .body | |
263 | #ifdef CONFIG_ITANIUM | |
264 | adds r2=16+128,sp | |
265 | adds r3=16+64,sp | |
266 | adds r14=SW(R4)+16,sp | |
267 | ;; | |
268 | st8.spill [r14]=r4,16 // spill r4 | |
269 | lfetch.fault.excl.nt1 [r3],128 | |
270 | ;; | |
271 | lfetch.fault.excl.nt1 [r2],128 | |
272 | lfetch.fault.excl.nt1 [r3],128 | |
273 | ;; | |
274 | lfetch.fault.excl [r2] | |
275 | lfetch.fault.excl [r3] | |
276 | adds r15=SW(R5)+16,sp | |
277 | #else | |
278 | add r2=16+3*128,sp | |
279 | add r3=16,sp | |
280 | add r14=SW(R4)+16,sp | |
281 | ;; | |
282 | st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0 | |
283 | lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010 | |
284 | ;; | |
285 | lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090 | |
286 | lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190 | |
287 | ;; | |
288 | lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110 | |
289 | lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210 | |
290 | adds r15=SW(R5)+16,sp | |
291 | #endif | |
292 | ;; | |
293 | st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5 | |
294 | mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0 | |
295 | add r2=SW(F2)+16,sp // r2 = &sw->f2 | |
296 | ;; | |
297 | st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6 | |
298 | mov.m r18=ar.fpsr // preserve fpsr | |
299 | add r3=SW(F3)+16,sp // r3 = &sw->f3 | |
300 | ;; | |
301 | stf.spill [r2]=f2,32 | |
302 | mov.m r19=ar.rnat | |
303 | mov r21=b0 | |
304 | ||
305 | stf.spill [r3]=f3,32 | |
306 | st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7 | |
307 | mov r22=b1 | |
308 | ;; | |
309 | // since we're done with the spills, read and save ar.unat: | |
310 | mov.m r29=ar.unat | |
311 | mov.m r20=ar.bspstore | |
312 | mov r23=b2 | |
313 | stf.spill [r2]=f4,32 | |
314 | stf.spill [r3]=f5,32 | |
315 | mov r24=b3 | |
316 | ;; | |
317 | st8 [r14]=r21,SW(B1)-SW(B0) // save b0 | |
318 | st8 [r15]=r23,SW(B3)-SW(B2) // save b2 | |
319 | mov r25=b4 | |
320 | mov r26=b5 | |
321 | ;; | |
322 | st8 [r14]=r22,SW(B4)-SW(B1) // save b1 | |
323 | st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3 | |
324 | mov r21=ar.lc // I-unit | |
325 | stf.spill [r2]=f12,32 | |
326 | stf.spill [r3]=f13,32 | |
327 | ;; | |
328 | st8 [r14]=r25,SW(B5)-SW(B4) // save b4 | |
329 | st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs | |
330 | stf.spill [r2]=f14,32 | |
331 | stf.spill [r3]=f15,32 | |
332 | ;; | |
333 | st8 [r14]=r26 // save b5 | |
334 | st8 [r15]=r21 // save ar.lc | |
335 | stf.spill [r2]=f16,32 | |
336 | stf.spill [r3]=f17,32 | |
337 | ;; | |
338 | stf.spill [r2]=f18,32 | |
339 | stf.spill [r3]=f19,32 | |
340 | ;; | |
341 | stf.spill [r2]=f20,32 | |
342 | stf.spill [r3]=f21,32 | |
343 | ;; | |
344 | stf.spill [r2]=f22,32 | |
345 | stf.spill [r3]=f23,32 | |
346 | ;; | |
347 | stf.spill [r2]=f24,32 | |
348 | stf.spill [r3]=f25,32 | |
349 | ;; | |
350 | stf.spill [r2]=f26,32 | |
351 | stf.spill [r3]=f27,32 | |
352 | ;; | |
353 | stf.spill [r2]=f28,32 | |
354 | stf.spill [r3]=f29,32 | |
355 | ;; | |
356 | stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30) | |
357 | stf.spill [r3]=f31,SW(PR)-SW(F31) | |
358 | add r14=SW(CALLER_UNAT)+16,sp | |
359 | ;; | |
360 | st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat | |
361 | st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat | |
362 | mov r21=pr | |
363 | ;; | |
364 | st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat | |
365 | st8 [r3]=r21 // save predicate registers | |
366 | ;; | |
367 | st8 [r2]=r20 // save ar.bspstore | |
368 | st8 [r14]=r18 // save fpsr | |
369 | mov ar.rsc=3 // put RSE back into eager mode, pl 0 | |
370 | br.cond.sptk.many b7 | |
371 | END(save_switch_stack) | |
372 | ||
373 | /* | |
374 | * load_switch_stack: | |
375 | * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK) | |
376 | * - b7 holds address to return to | |
377 | * - must not touch r8-r11 | |
378 | */ | |
379 | ENTRY(load_switch_stack) | |
380 | .prologue | |
381 | .altrp b7 | |
382 | ||
383 | .body | |
384 | lfetch.fault.nt1 [sp] | |
385 | adds r2=SW(AR_BSPSTORE)+16,sp | |
386 | adds r3=SW(AR_UNAT)+16,sp | |
387 | mov ar.rsc=0 // put RSE into enforced lazy mode | |
388 | adds r14=SW(CALLER_UNAT)+16,sp | |
389 | adds r15=SW(AR_FPSR)+16,sp | |
390 | ;; | |
391 | ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore | |
392 | ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat | |
393 | ;; | |
394 | ld8 r21=[r2],16 // restore b0 | |
395 | ld8 r22=[r3],16 // restore b1 | |
396 | ;; | |
397 | ld8 r23=[r2],16 // restore b2 | |
398 | ld8 r24=[r3],16 // restore b3 | |
399 | ;; | |
400 | ld8 r25=[r2],16 // restore b4 | |
401 | ld8 r26=[r3],16 // restore b5 | |
402 | ;; | |
403 | ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs | |
404 | ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc | |
405 | ;; | |
406 | ld8 r28=[r2] // restore pr | |
407 | ld8 r30=[r3] // restore rnat | |
408 | ;; | |
409 | ld8 r18=[r14],16 // restore caller's unat | |
410 | ld8 r19=[r15],24 // restore fpsr | |
411 | ;; | |
412 | ldf.fill f2=[r14],32 | |
413 | ldf.fill f3=[r15],32 | |
414 | ;; | |
415 | ldf.fill f4=[r14],32 | |
416 | ldf.fill f5=[r15],32 | |
417 | ;; | |
418 | ldf.fill f12=[r14],32 | |
419 | ldf.fill f13=[r15],32 | |
420 | ;; | |
421 | ldf.fill f14=[r14],32 | |
422 | ldf.fill f15=[r15],32 | |
423 | ;; | |
424 | ldf.fill f16=[r14],32 | |
425 | ldf.fill f17=[r15],32 | |
426 | ;; | |
427 | ldf.fill f18=[r14],32 | |
428 | ldf.fill f19=[r15],32 | |
429 | mov b0=r21 | |
430 | ;; | |
431 | ldf.fill f20=[r14],32 | |
432 | ldf.fill f21=[r15],32 | |
433 | mov b1=r22 | |
434 | ;; | |
435 | ldf.fill f22=[r14],32 | |
436 | ldf.fill f23=[r15],32 | |
437 | mov b2=r23 | |
438 | ;; | |
439 | mov ar.bspstore=r27 | |
440 | mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7 | |
441 | mov b3=r24 | |
442 | ;; | |
443 | ldf.fill f24=[r14],32 | |
444 | ldf.fill f25=[r15],32 | |
445 | mov b4=r25 | |
446 | ;; | |
447 | ldf.fill f26=[r14],32 | |
448 | ldf.fill f27=[r15],32 | |
449 | mov b5=r26 | |
450 | ;; | |
451 | ldf.fill f28=[r14],32 | |
452 | ldf.fill f29=[r15],32 | |
453 | mov ar.pfs=r16 | |
454 | ;; | |
455 | ldf.fill f30=[r14],32 | |
456 | ldf.fill f31=[r15],24 | |
457 | mov ar.lc=r17 | |
458 | ;; | |
459 | ld8.fill r4=[r14],16 | |
460 | ld8.fill r5=[r15],16 | |
461 | mov pr=r28,-1 | |
462 | ;; | |
463 | ld8.fill r6=[r14],16 | |
464 | ld8.fill r7=[r15],16 | |
465 | ||
466 | mov ar.unat=r18 // restore caller's unat | |
467 | mov ar.rnat=r30 // must restore after bspstore but before rsc! | |
468 | mov ar.fpsr=r19 // restore fpsr | |
469 | mov ar.rsc=3 // put RSE back into eager mode, pl 0 | |
470 | br.cond.sptk.many b7 | |
471 | END(load_switch_stack) | |
472 | ||
1da177e4 LT |
473 | GLOBAL_ENTRY(execve) |
474 | mov r15=__NR_execve // put syscall number in place | |
475 | break __BREAK_SYSCALL | |
476 | br.ret.sptk.many rp | |
477 | END(execve) | |
478 | ||
479 | GLOBAL_ENTRY(clone) | |
480 | mov r15=__NR_clone // put syscall number in place | |
481 | break __BREAK_SYSCALL | |
482 | br.ret.sptk.many rp | |
483 | END(clone) | |
484 | ||
485 | /* | |
486 | * Invoke a system call, but do some tracing before and after the call. | |
487 | * We MUST preserve the current register frame throughout this routine | |
488 | * because some system calls (such as ia64_execve) directly | |
489 | * manipulate ar.pfs. | |
490 | */ | |
491 | GLOBAL_ENTRY(ia64_trace_syscall) | |
492 | PT_REGS_UNWIND_INFO(0) | |
493 | /* | |
494 | * We need to preserve the scratch registers f6-f11 in case the system | |
495 | * call is sigreturn. | |
496 | */ | |
497 | adds r16=PT(F6)+16,sp | |
498 | adds r17=PT(F7)+16,sp | |
499 | ;; | |
500 | stf.spill [r16]=f6,32 | |
501 | stf.spill [r17]=f7,32 | |
502 | ;; | |
503 | stf.spill [r16]=f8,32 | |
504 | stf.spill [r17]=f9,32 | |
505 | ;; | |
506 | stf.spill [r16]=f10 | |
507 | stf.spill [r17]=f11 | |
508 | br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args | |
509 | adds r16=PT(F6)+16,sp | |
510 | adds r17=PT(F7)+16,sp | |
511 | ;; | |
512 | ldf.fill f6=[r16],32 | |
513 | ldf.fill f7=[r17],32 | |
514 | ;; | |
515 | ldf.fill f8=[r16],32 | |
516 | ldf.fill f9=[r17],32 | |
517 | ;; | |
518 | ldf.fill f10=[r16] | |
519 | ldf.fill f11=[r17] | |
520 | // the syscall number may have changed, so re-load it and re-calculate the | |
521 | // syscall entry-point: | |
522 | adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #) | |
523 | ;; | |
524 | ld8 r15=[r15] | |
525 | mov r3=NR_syscalls - 1 | |
526 | ;; | |
527 | adds r15=-1024,r15 | |
528 | movl r16=sys_call_table | |
529 | ;; | |
530 | shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024) | |
531 | cmp.leu p6,p7=r15,r3 | |
532 | ;; | |
533 | (p6) ld8 r20=[r20] // load address of syscall entry point | |
534 | (p7) movl r20=sys_ni_syscall | |
535 | ;; | |
536 | mov b6=r20 | |
537 | br.call.sptk.many rp=b6 // do the syscall | |
538 | .strace_check_retval: | |
539 | cmp.lt p6,p0=r8,r0 // syscall failed? | |
540 | adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 | |
541 | adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10 | |
542 | mov r10=0 | |
543 | (p6) br.cond.sptk strace_error // syscall failed -> | |
544 | ;; // avoid RAW on r10 | |
545 | .strace_save_retval: | |
546 | .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8 | |
547 | .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10 | |
548 | br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value | |
549 | .ret3: br.cond.sptk .work_pending_syscall_end | |
550 | ||
551 | strace_error: | |
552 | ld8 r3=[r2] // load pt_regs.r8 | |
553 | sub r9=0,r8 // negate return value to get errno value | |
554 | ;; | |
555 | cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0? | |
556 | adds r3=16,r2 // r3=&pt_regs.r10 | |
557 | ;; | |
558 | (p6) mov r10=-1 | |
559 | (p6) mov r8=r9 | |
560 | br.cond.sptk .strace_save_retval | |
561 | END(ia64_trace_syscall) | |
562 | ||
563 | /* | |
564 | * When traced and returning from sigreturn, we invoke syscall_trace but then | |
565 | * go straight to ia64_leave_kernel rather than ia64_leave_syscall. | |
566 | */ | |
567 | GLOBAL_ENTRY(ia64_strace_leave_kernel) | |
568 | PT_REGS_UNWIND_INFO(0) | |
569 | { /* | |
570 | * Some versions of gas generate bad unwind info if the first instruction of a | |
571 | * procedure doesn't go into the first slot of a bundle. This is a workaround. | |
572 | */ | |
573 | nop.m 0 | |
574 | nop.i 0 | |
575 | br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value | |
576 | } | |
577 | .ret4: br.cond.sptk ia64_leave_kernel | |
578 | END(ia64_strace_leave_kernel) | |
579 | ||
580 | GLOBAL_ENTRY(ia64_ret_from_clone) | |
581 | PT_REGS_UNWIND_INFO(0) | |
582 | { /* | |
583 | * Some versions of gas generate bad unwind info if the first instruction of a | |
584 | * procedure doesn't go into the first slot of a bundle. This is a workaround. | |
585 | */ | |
586 | nop.m 0 | |
587 | nop.i 0 | |
588 | /* | |
589 | * We need to call schedule_tail() to complete the scheduling process. | |
590 | * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the | |
591 | * address of the previously executing task. | |
592 | */ | |
593 | br.call.sptk.many rp=ia64_invoke_schedule_tail | |
594 | } | |
595 | .ret8: | |
596 | adds r2=TI_FLAGS+IA64_TASK_SIZE,r13 | |
597 | ;; | |
598 | ld4 r2=[r2] | |
599 | ;; | |
600 | mov r8=0 | |
601 | and r2=_TIF_SYSCALL_TRACEAUDIT,r2 | |
602 | ;; | |
603 | cmp.ne p6,p0=r2,r0 | |
604 | (p6) br.cond.spnt .strace_check_retval | |
605 | ;; // added stop bits to prevent r8 dependency | |
606 | END(ia64_ret_from_clone) | |
607 | // fall through | |
608 | GLOBAL_ENTRY(ia64_ret_from_syscall) | |
609 | PT_REGS_UNWIND_INFO(0) | |
610 | cmp.ge p6,p7=r8,r0 // syscall executed successfully? | |
611 | adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 | |
612 | mov r10=r0 // clear error indication in r10 | |
613 | (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure | |
614 | END(ia64_ret_from_syscall) | |
615 | // fall through | |
616 | /* | |
617 | * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't | |
618 | * need to switch to bank 0 and doesn't restore the scratch registers. | |
619 | * To avoid leaking kernel bits, the scratch registers are set to | |
620 | * the following known-to-be-safe values: | |
621 | * | |
622 | * r1: restored (global pointer) | |
623 | * r2: cleared | |
624 | * r3: 1 (when returning to user-level) | |
625 | * r8-r11: restored (syscall return value(s)) | |
626 | * r12: restored (user-level stack pointer) | |
627 | * r13: restored (user-level thread pointer) | |
628 | * r14: cleared | |
629 | * r15: restored (syscall #) | |
630 | * r16-r17: cleared | |
631 | * r18: user-level b6 | |
632 | * r19: cleared | |
633 | * r20: user-level ar.fpsr | |
634 | * r21: user-level b0 | |
635 | * r22: cleared | |
636 | * r23: user-level ar.bspstore | |
637 | * r24: user-level ar.rnat | |
638 | * r25: user-level ar.unat | |
639 | * r26: user-level ar.pfs | |
640 | * r27: user-level ar.rsc | |
641 | * r28: user-level ip | |
642 | * r29: user-level psr | |
643 | * r30: user-level cfm | |
644 | * r31: user-level pr | |
645 | * f6-f11: cleared | |
646 | * pr: restored (user-level pr) | |
647 | * b0: restored (user-level rp) | |
648 | * b6: restored | |
649 | * b7: cleared | |
650 | * ar.unat: restored (user-level ar.unat) | |
651 | * ar.pfs: restored (user-level ar.pfs) | |
652 | * ar.rsc: restored (user-level ar.rsc) | |
653 | * ar.rnat: restored (user-level ar.rnat) | |
654 | * ar.bspstore: restored (user-level ar.bspstore) | |
655 | * ar.fpsr: restored (user-level ar.fpsr) | |
656 | * ar.ccv: cleared | |
657 | * ar.csd: cleared | |
658 | * ar.ssd: cleared | |
659 | */ | |
660 | ENTRY(ia64_leave_syscall) | |
661 | PT_REGS_UNWIND_INFO(0) | |
662 | /* | |
663 | * work.need_resched etc. mustn't get changed by this CPU before it returns to | |
664 | * user- or fsys-mode, hence we disable interrupts early on. | |
665 | * | |
666 | * p6 controls whether current_thread_info()->flags needs to be check for | |
667 | * extra work. We always check for extra work when returning to user-level. | |
668 | * With CONFIG_PREEMPT, we also check for extra work when the preempt_count | |
669 | * is 0. After extra work processing has been completed, execution | |
670 | * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check | |
671 | * needs to be redone. | |
672 | */ | |
673 | #ifdef CONFIG_PREEMPT | |
674 | rsm psr.i // disable interrupts | |
675 | cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall | |
676 | (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13 | |
677 | ;; | |
678 | .pred.rel.mutex pUStk,pKStk | |
679 | (pKStk) ld4 r21=[r20] // r21 <- preempt_count | |
680 | (pUStk) mov r21=0 // r21 <- 0 | |
681 | ;; | |
682 | cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0) | |
683 | #else /* !CONFIG_PREEMPT */ | |
684 | (pUStk) rsm psr.i | |
685 | cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall | |
686 | (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk | |
687 | #endif | |
688 | .work_processed_syscall: | |
689 | adds r2=PT(LOADRS)+16,r12 | |
690 | adds r3=PT(AR_BSPSTORE)+16,r12 | |
691 | adds r18=TI_FLAGS+IA64_TASK_SIZE,r13 | |
692 | ;; | |
693 | (p6) ld4 r31=[r18] // load current_thread_info()->flags | |
694 | ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs" | |
695 | mov b7=r0 // clear b7 | |
696 | ;; | |
697 | ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage) | |
698 | ld8 r18=[r2],PT(R9)-PT(B6) // load b6 | |
699 | (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE? | |
700 | ;; | |
701 | mov r16=ar.bsp // M2 get existing backing store pointer | |
702 | (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending? | |
703 | (p6) br.cond.spnt .work_pending_syscall | |
704 | ;; | |
705 | // start restoring the state saved on the kernel stack (struct pt_regs): | |
706 | ld8 r9=[r2],PT(CR_IPSR)-PT(R9) | |
707 | ld8 r11=[r3],PT(CR_IIP)-PT(R11) | |
708 | mov f6=f0 // clear f6 | |
709 | ;; | |
710 | invala // M0|1 invalidate ALAT | |
711 | rsm psr.i | psr.ic // M2 initiate turning off of interrupt and interruption collection | |
712 | mov f9=f0 // clear f9 | |
713 | ||
714 | ld8 r29=[r2],16 // load cr.ipsr | |
715 | ld8 r28=[r3],16 // load cr.iip | |
716 | mov f8=f0 // clear f8 | |
717 | ;; | |
718 | ld8 r30=[r2],16 // M0|1 load cr.ifs | |
1da177e4 | 719 | ld8 r25=[r3],16 // M0|1 load ar.unat |
30325d17 | 720 | cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs |
1da177e4 LT |
721 | ;; |
722 | ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs | |
723 | (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled | |
724 | mov f10=f0 // clear f10 | |
725 | ;; | |
726 | ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // load b0 | |
727 | ld8 r27=[r3],PT(PR)-PT(AR_RSC) // load ar.rsc | |
728 | mov f11=f0 // clear f11 | |
729 | ;; | |
730 | ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // load ar.rnat (may be garbage) | |
731 | ld8 r31=[r3],PT(R1)-PT(PR) // load predicates | |
732 | (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13 | |
733 | ;; | |
734 | ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // load ar.fpsr | |
735 | ld8.fill r1=[r3],16 // load r1 | |
736 | (pUStk) mov r17=1 | |
737 | ;; | |
738 | srlz.d // M0 ensure interruption collection is off | |
739 | ld8.fill r13=[r3],16 | |
740 | mov f7=f0 // clear f7 | |
741 | ;; | |
742 | ld8.fill r12=[r2] // restore r12 (sp) | |
30325d17 DMT |
743 | mov.m ar.ssd=r0 // M2 clear ar.ssd |
744 | mov r22=r0 // clear r22 | |
745 | ||
1da177e4 | 746 | ld8.fill r15=[r3] // restore r15 |
30325d17 | 747 | (pUStk) st1 [r14]=r17 |
1da177e4 LT |
748 | addl r3=THIS_CPU(ia64_phys_stacked_size_p8),r0 |
749 | ;; | |
a37d98f6 | 750 | (pUStk) ld4 r17=[r3] // r17 = cpu_data->phys_stacked_size_p8 |
30325d17 | 751 | mov.m ar.csd=r0 // M2 clear ar.csd |
1da177e4 LT |
752 | mov b6=r18 // I0 restore b6 |
753 | ;; | |
754 | mov r14=r0 // clear r14 | |
755 | shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition | |
756 | (pKStk) br.cond.dpnt.many skip_rbs_switch | |
757 | ||
758 | mov.m ar.ccv=r0 // clear ar.ccv | |
759 | (pNonSys) br.cond.dpnt.many dont_preserve_current_frame | |
760 | br.cond.sptk.many rbs_switch | |
761 | END(ia64_leave_syscall) | |
762 | ||
763 | #ifdef CONFIG_IA32_SUPPORT | |
764 | GLOBAL_ENTRY(ia64_ret_from_ia32_execve) | |
765 | PT_REGS_UNWIND_INFO(0) | |
766 | adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 | |
767 | adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10 | |
768 | ;; | |
769 | .mem.offset 0,0 | |
770 | st8.spill [r2]=r8 // store return value in slot for r8 and set unat bit | |
771 | .mem.offset 8,0 | |
772 | st8.spill [r3]=r0 // clear error indication in slot for r10 and set unat bit | |
773 | END(ia64_ret_from_ia32_execve_syscall) | |
774 | // fall through | |
775 | #endif /* CONFIG_IA32_SUPPORT */ | |
776 | GLOBAL_ENTRY(ia64_leave_kernel) | |
777 | PT_REGS_UNWIND_INFO(0) | |
778 | /* | |
779 | * work.need_resched etc. mustn't get changed by this CPU before it returns to | |
780 | * user- or fsys-mode, hence we disable interrupts early on. | |
781 | * | |
782 | * p6 controls whether current_thread_info()->flags needs to be check for | |
783 | * extra work. We always check for extra work when returning to user-level. | |
784 | * With CONFIG_PREEMPT, we also check for extra work when the preempt_count | |
785 | * is 0. After extra work processing has been completed, execution | |
786 | * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check | |
787 | * needs to be redone. | |
788 | */ | |
789 | #ifdef CONFIG_PREEMPT | |
790 | rsm psr.i // disable interrupts | |
791 | cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel | |
792 | (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13 | |
793 | ;; | |
794 | .pred.rel.mutex pUStk,pKStk | |
795 | (pKStk) ld4 r21=[r20] // r21 <- preempt_count | |
796 | (pUStk) mov r21=0 // r21 <- 0 | |
797 | ;; | |
798 | cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0) | |
799 | #else | |
800 | (pUStk) rsm psr.i | |
801 | cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel | |
802 | (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk | |
803 | #endif | |
804 | .work_processed_kernel: | |
805 | adds r17=TI_FLAGS+IA64_TASK_SIZE,r13 | |
806 | ;; | |
807 | (p6) ld4 r31=[r17] // load current_thread_info()->flags | |
808 | adds r21=PT(PR)+16,r12 | |
809 | ;; | |
810 | ||
811 | lfetch [r21],PT(CR_IPSR)-PT(PR) | |
812 | adds r2=PT(B6)+16,r12 | |
813 | adds r3=PT(R16)+16,r12 | |
814 | ;; | |
815 | lfetch [r21] | |
816 | ld8 r28=[r2],8 // load b6 | |
817 | adds r29=PT(R24)+16,r12 | |
818 | ||
819 | ld8.fill r16=[r3],PT(AR_CSD)-PT(R16) | |
820 | adds r30=PT(AR_CCV)+16,r12 | |
821 | (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE? | |
822 | ;; | |
823 | ld8.fill r24=[r29] | |
824 | ld8 r15=[r30] // load ar.ccv | |
825 | (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending? | |
826 | ;; | |
827 | ld8 r29=[r2],16 // load b7 | |
828 | ld8 r30=[r3],16 // load ar.csd | |
829 | (p6) br.cond.spnt .work_pending | |
830 | ;; | |
831 | ld8 r31=[r2],16 // load ar.ssd | |
832 | ld8.fill r8=[r3],16 | |
833 | ;; | |
834 | ld8.fill r9=[r2],16 | |
835 | ld8.fill r10=[r3],PT(R17)-PT(R10) | |
836 | ;; | |
837 | ld8.fill r11=[r2],PT(R18)-PT(R11) | |
838 | ld8.fill r17=[r3],16 | |
839 | ;; | |
840 | ld8.fill r18=[r2],16 | |
841 | ld8.fill r19=[r3],16 | |
842 | ;; | |
843 | ld8.fill r20=[r2],16 | |
844 | ld8.fill r21=[r3],16 | |
845 | mov ar.csd=r30 | |
846 | mov ar.ssd=r31 | |
847 | ;; | |
848 | rsm psr.i | psr.ic // initiate turning off of interrupt and interruption collection | |
849 | invala // invalidate ALAT | |
850 | ;; | |
851 | ld8.fill r22=[r2],24 | |
852 | ld8.fill r23=[r3],24 | |
853 | mov b6=r28 | |
854 | ;; | |
855 | ld8.fill r25=[r2],16 | |
856 | ld8.fill r26=[r3],16 | |
857 | mov b7=r29 | |
858 | ;; | |
859 | ld8.fill r27=[r2],16 | |
860 | ld8.fill r28=[r3],16 | |
861 | ;; | |
862 | ld8.fill r29=[r2],16 | |
863 | ld8.fill r30=[r3],24 | |
864 | ;; | |
865 | ld8.fill r31=[r2],PT(F9)-PT(R31) | |
866 | adds r3=PT(F10)-PT(F6),r3 | |
867 | ;; | |
868 | ldf.fill f9=[r2],PT(F6)-PT(F9) | |
869 | ldf.fill f10=[r3],PT(F8)-PT(F10) | |
870 | ;; | |
871 | ldf.fill f6=[r2],PT(F7)-PT(F6) | |
872 | ;; | |
873 | ldf.fill f7=[r2],PT(F11)-PT(F7) | |
874 | ldf.fill f8=[r3],32 | |
875 | ;; | |
876 | srlz.i // ensure interruption collection is off | |
877 | mov ar.ccv=r15 | |
878 | ;; | |
879 | ldf.fill f11=[r2] | |
880 | bsw.0 // switch back to bank 0 (no stop bit required beforehand...) | |
881 | ;; | |
882 | (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency) | |
883 | adds r16=PT(CR_IPSR)+16,r12 | |
884 | adds r17=PT(CR_IIP)+16,r12 | |
885 | ||
886 | (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled | |
887 | nop.i 0 | |
888 | nop.i 0 | |
889 | ;; | |
890 | ld8 r29=[r16],16 // load cr.ipsr | |
891 | ld8 r28=[r17],16 // load cr.iip | |
892 | ;; | |
893 | ld8 r30=[r16],16 // load cr.ifs | |
894 | ld8 r25=[r17],16 // load ar.unat | |
895 | ;; | |
896 | ld8 r26=[r16],16 // load ar.pfs | |
897 | ld8 r27=[r17],16 // load ar.rsc | |
898 | cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs | |
899 | ;; | |
900 | ld8 r24=[r16],16 // load ar.rnat (may be garbage) | |
901 | ld8 r23=[r17],16 // load ar.bspstore (may be garbage) | |
902 | ;; | |
903 | ld8 r31=[r16],16 // load predicates | |
904 | ld8 r21=[r17],16 // load b0 | |
905 | ;; | |
906 | ld8 r19=[r16],16 // load ar.rsc value for "loadrs" | |
907 | ld8.fill r1=[r17],16 // load r1 | |
908 | ;; | |
909 | ld8.fill r12=[r16],16 | |
910 | ld8.fill r13=[r17],16 | |
911 | (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 | |
912 | ;; | |
913 | ld8 r20=[r16],16 // ar.fpsr | |
914 | ld8.fill r15=[r17],16 | |
915 | ;; | |
916 | ld8.fill r14=[r16],16 | |
917 | ld8.fill r2=[r17] | |
918 | (pUStk) mov r17=1 | |
919 | ;; | |
920 | ld8.fill r3=[r16] | |
921 | (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack | |
922 | shr.u r18=r19,16 // get byte size of existing "dirty" partition | |
923 | ;; | |
924 | mov r16=ar.bsp // get existing backing store pointer | |
925 | addl r17=THIS_CPU(ia64_phys_stacked_size_p8),r0 | |
926 | ;; | |
927 | ld4 r17=[r17] // r17 = cpu_data->phys_stacked_size_p8 | |
928 | (pKStk) br.cond.dpnt skip_rbs_switch | |
929 | ||
930 | /* | |
931 | * Restore user backing store. | |
932 | * | |
933 | * NOTE: alloc, loadrs, and cover can't be predicated. | |
934 | */ | |
935 | (pNonSys) br.cond.dpnt dont_preserve_current_frame | |
936 | ||
937 | rbs_switch: | |
938 | cover // add current frame into dirty partition and set cr.ifs | |
939 | ;; | |
940 | mov r19=ar.bsp // get new backing store pointer | |
941 | sub r16=r16,r18 // krbs = old bsp - size of dirty partition | |
942 | cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs | |
943 | ;; | |
944 | sub r19=r19,r16 // calculate total byte size of dirty partition | |
945 | add r18=64,r18 // don't force in0-in7 into memory... | |
946 | ;; | |
947 | shl r19=r19,16 // shift size of dirty partition into loadrs position | |
948 | ;; | |
949 | dont_preserve_current_frame: | |
950 | /* | |
951 | * To prevent leaking bits between the kernel and user-space, | |
952 | * we must clear the stacked registers in the "invalid" partition here. | |
953 | * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium, | |
954 | * 5 registers/cycle on McKinley). | |
955 | */ | |
956 | # define pRecurse p6 | |
957 | # define pReturn p7 | |
958 | #ifdef CONFIG_ITANIUM | |
959 | # define Nregs 10 | |
960 | #else | |
961 | # define Nregs 14 | |
962 | #endif | |
963 | alloc loc0=ar.pfs,2,Nregs-2,2,0 | |
964 | shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8)) | |
965 | sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize | |
966 | ;; | |
967 | mov ar.rsc=r19 // load ar.rsc to be used for "loadrs" | |
968 | shladd in0=loc1,3,r17 | |
969 | mov in1=0 | |
970 | ;; | |
971 | TEXT_ALIGN(32) | |
972 | rse_clear_invalid: | |
973 | #ifdef CONFIG_ITANIUM | |
974 | // cycle 0 | |
975 | { .mii | |
976 | alloc loc0=ar.pfs,2,Nregs-2,2,0 | |
977 | cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse | |
978 | add out0=-Nregs*8,in0 | |
979 | }{ .mfb | |
980 | add out1=1,in1 // increment recursion count | |
981 | nop.f 0 | |
982 | nop.b 0 // can't do br.call here because of alloc (WAW on CFM) | |
983 | ;; | |
984 | }{ .mfi // cycle 1 | |
985 | mov loc1=0 | |
986 | nop.f 0 | |
987 | mov loc2=0 | |
988 | }{ .mib | |
989 | mov loc3=0 | |
990 | mov loc4=0 | |
991 | (pRecurse) br.call.sptk.many b0=rse_clear_invalid | |
992 | ||
993 | }{ .mfi // cycle 2 | |
994 | mov loc5=0 | |
995 | nop.f 0 | |
996 | cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret | |
997 | }{ .mib | |
998 | mov loc6=0 | |
999 | mov loc7=0 | |
1000 | (pReturn) br.ret.sptk.many b0 | |
1001 | } | |
1002 | #else /* !CONFIG_ITANIUM */ | |
1003 | alloc loc0=ar.pfs,2,Nregs-2,2,0 | |
1004 | cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse | |
1005 | add out0=-Nregs*8,in0 | |
1006 | add out1=1,in1 // increment recursion count | |
1007 | mov loc1=0 | |
1008 | mov loc2=0 | |
1009 | ;; | |
1010 | mov loc3=0 | |
1011 | mov loc4=0 | |
1012 | mov loc5=0 | |
1013 | mov loc6=0 | |
1014 | mov loc7=0 | |
9ec1a7ad | 1015 | (pRecurse) br.call.dptk.few b0=rse_clear_invalid |
1da177e4 LT |
1016 | ;; |
1017 | mov loc8=0 | |
1018 | mov loc9=0 | |
1019 | cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret | |
1020 | mov loc10=0 | |
1021 | mov loc11=0 | |
9ec1a7ad | 1022 | (pReturn) br.ret.dptk.many b0 |
1da177e4 LT |
1023 | #endif /* !CONFIG_ITANIUM */ |
1024 | # undef pRecurse | |
1025 | # undef pReturn | |
1026 | ;; | |
1027 | alloc r17=ar.pfs,0,0,0,0 // drop current register frame | |
1028 | ;; | |
1029 | loadrs | |
1030 | ;; | |
1031 | skip_rbs_switch: | |
1032 | mov ar.unat=r25 // M2 | |
1033 | (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22 | |
1034 | (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise | |
1035 | ;; | |
1036 | (pUStk) mov ar.bspstore=r23 // M2 | |
1037 | (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp | |
1038 | (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise | |
1039 | ;; | |
1040 | mov cr.ipsr=r29 // M2 | |
1041 | mov ar.pfs=r26 // I0 | |
1042 | (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise | |
1043 | ||
1044 | (p9) mov cr.ifs=r30 // M2 | |
1045 | mov b0=r21 // I0 | |
1046 | (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise | |
1047 | ||
1048 | mov ar.fpsr=r20 // M2 | |
1049 | mov cr.iip=r28 // M2 | |
1050 | nop 0 | |
1051 | ;; | |
1052 | (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode | |
1053 | nop 0 | |
1054 | (pLvSys)mov r2=r0 | |
1055 | ||
1056 | mov ar.rsc=r27 // M2 | |
1057 | mov pr=r31,-1 // I0 | |
1058 | rfi // B | |
1059 | ||
1060 | /* | |
1061 | * On entry: | |
1062 | * r20 = ¤t->thread_info->pre_count (if CONFIG_PREEMPT) | |
1063 | * r31 = current->thread_info->flags | |
1064 | * On exit: | |
1065 | * p6 = TRUE if work-pending-check needs to be redone | |
1066 | */ | |
1067 | .work_pending_syscall: | |
1068 | add r2=-8,r2 | |
1069 | add r3=-8,r3 | |
1070 | ;; | |
1071 | st8 [r2]=r8 | |
1072 | st8 [r3]=r10 | |
1073 | .work_pending: | |
1074 | tbit.nz p6,p0=r31,TIF_SIGDELAYED // signal delayed from MCA/INIT/NMI/PMI context? | |
1075 | (p6) br.cond.sptk.few .sigdelayed | |
1076 | ;; | |
1077 | tbit.z p6,p0=r31,TIF_NEED_RESCHED // current_thread_info()->need_resched==0? | |
1078 | (p6) br.cond.sptk.few .notify | |
1079 | #ifdef CONFIG_PREEMPT | |
1080 | (pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1 | |
1081 | ;; | |
1082 | (pKStk) st4 [r20]=r21 | |
1083 | ssm psr.i // enable interrupts | |
1084 | #endif | |
1085 | br.call.spnt.many rp=schedule | |
1086 | .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 | |
1087 | rsm psr.i // disable interrupts | |
1088 | ;; | |
1089 | #ifdef CONFIG_PREEMPT | |
1090 | (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13 | |
1091 | ;; | |
1092 | (pKStk) st4 [r20]=r0 // preempt_count() <- 0 | |
1093 | #endif | |
1094 | (pLvSys)br.cond.sptk.few .work_pending_syscall_end | |
1095 | br.cond.sptk.many .work_processed_kernel // re-check | |
1096 | ||
1097 | .notify: | |
1098 | (pUStk) br.call.spnt.many rp=notify_resume_user | |
1099 | .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 | |
1100 | (pLvSys)br.cond.sptk.few .work_pending_syscall_end | |
1101 | br.cond.sptk.many .work_processed_kernel // don't re-check | |
1102 | ||
1103 | // There is a delayed signal that was detected in MCA/INIT/NMI/PMI context where | |
1104 | // it could not be delivered. Deliver it now. The signal might be for us and | |
1105 | // may set TIF_SIGPENDING, so redrive ia64_leave_* after processing the delayed | |
1106 | // signal. | |
1107 | ||
1108 | .sigdelayed: | |
1109 | br.call.sptk.many rp=do_sigdelayed | |
1110 | cmp.eq p6,p0=r0,r0 // p6 <- 1, always re-check | |
1111 | (pLvSys)br.cond.sptk.few .work_pending_syscall_end | |
1112 | br.cond.sptk.many .work_processed_kernel // re-check | |
1113 | ||
1114 | .work_pending_syscall_end: | |
1115 | adds r2=PT(R8)+16,r12 | |
1116 | adds r3=PT(R10)+16,r12 | |
1117 | ;; | |
1118 | ld8 r8=[r2] | |
1119 | ld8 r10=[r3] | |
1120 | br.cond.sptk.many .work_processed_syscall // re-check | |
1121 | ||
1122 | END(ia64_leave_kernel) | |
1123 | ||
1124 | ENTRY(handle_syscall_error) | |
1125 | /* | |
1126 | * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could | |
1127 | * lead us to mistake a negative return value as a failed syscall. Those syscall | |
1128 | * must deposit a non-zero value in pt_regs.r8 to indicate an error. If | |
1129 | * pt_regs.r8 is zero, we assume that the call completed successfully. | |
1130 | */ | |
1131 | PT_REGS_UNWIND_INFO(0) | |
1132 | ld8 r3=[r2] // load pt_regs.r8 | |
1133 | ;; | |
1134 | cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0? | |
1135 | ;; | |
1136 | (p7) mov r10=-1 | |
1137 | (p7) sub r8=0,r8 // negate return value to get errno | |
1138 | br.cond.sptk ia64_leave_syscall | |
1139 | END(handle_syscall_error) | |
1140 | ||
1141 | /* | |
1142 | * Invoke schedule_tail(task) while preserving in0-in7, which may be needed | |
1143 | * in case a system call gets restarted. | |
1144 | */ | |
1145 | GLOBAL_ENTRY(ia64_invoke_schedule_tail) | |
1146 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) | |
1147 | alloc loc1=ar.pfs,8,2,1,0 | |
1148 | mov loc0=rp | |
1149 | mov out0=r8 // Address of previous task | |
1150 | ;; | |
1151 | br.call.sptk.many rp=schedule_tail | |
1152 | .ret11: mov ar.pfs=loc1 | |
1153 | mov rp=loc0 | |
1154 | br.ret.sptk.many rp | |
1155 | END(ia64_invoke_schedule_tail) | |
1156 | ||
1157 | /* | |
1158 | * Setup stack and call do_notify_resume_user(). Note that pSys and pNonSys need to | |
1159 | * be set up by the caller. We declare 8 input registers so the system call | |
1160 | * args get preserved, in case we need to restart a system call. | |
1161 | */ | |
1162 | ENTRY(notify_resume_user) | |
1163 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) | |
1164 | alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart! | |
1165 | mov r9=ar.unat | |
1166 | mov loc0=rp // save return address | |
1167 | mov out0=0 // there is no "oldset" | |
1168 | adds out1=8,sp // out1=&sigscratch->ar_pfs | |
1169 | (pSys) mov out2=1 // out2==1 => we're in a syscall | |
1170 | ;; | |
1171 | (pNonSys) mov out2=0 // out2==0 => not a syscall | |
1172 | .fframe 16 | |
1173 | .spillpsp ar.unat, 16 // (note that offset is relative to psp+0x10!) | |
1174 | st8 [sp]=r9,-16 // allocate space for ar.unat and save it | |
1175 | st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch | |
1176 | .body | |
1177 | br.call.sptk.many rp=do_notify_resume_user | |
1178 | .ret15: .restore sp | |
1179 | adds sp=16,sp // pop scratch stack space | |
1180 | ;; | |
1181 | ld8 r9=[sp] // load new unat from sigscratch->scratch_unat | |
1182 | mov rp=loc0 | |
1183 | ;; | |
1184 | mov ar.unat=r9 | |
1185 | mov ar.pfs=loc1 | |
1186 | br.ret.sptk.many rp | |
1187 | END(notify_resume_user) | |
1188 | ||
1189 | GLOBAL_ENTRY(sys_rt_sigsuspend) | |
1190 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) | |
1191 | alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart! | |
1192 | mov r9=ar.unat | |
1193 | mov loc0=rp // save return address | |
1194 | mov out0=in0 // mask | |
1195 | mov out1=in1 // sigsetsize | |
1196 | adds out2=8,sp // out2=&sigscratch->ar_pfs | |
1197 | ;; | |
1198 | .fframe 16 | |
1199 | .spillpsp ar.unat, 16 // (note that offset is relative to psp+0x10!) | |
1200 | st8 [sp]=r9,-16 // allocate space for ar.unat and save it | |
1201 | st8 [out2]=loc1,-8 // save ar.pfs, out2=&sigscratch | |
1202 | .body | |
1203 | br.call.sptk.many rp=ia64_rt_sigsuspend | |
1204 | .ret17: .restore sp | |
1205 | adds sp=16,sp // pop scratch stack space | |
1206 | ;; | |
1207 | ld8 r9=[sp] // load new unat from sw->caller_unat | |
1208 | mov rp=loc0 | |
1209 | ;; | |
1210 | mov ar.unat=r9 | |
1211 | mov ar.pfs=loc1 | |
1212 | br.ret.sptk.many rp | |
1213 | END(sys_rt_sigsuspend) | |
1214 | ||
1215 | ENTRY(sys_rt_sigreturn) | |
1216 | PT_REGS_UNWIND_INFO(0) | |
1217 | /* | |
1218 | * Allocate 8 input registers since ptrace() may clobber them | |
1219 | */ | |
1220 | alloc r2=ar.pfs,8,0,1,0 | |
1221 | .prologue | |
1222 | PT_REGS_SAVES(16) | |
1223 | adds sp=-16,sp | |
1224 | .body | |
1225 | cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall... | |
1226 | ;; | |
1227 | /* | |
1228 | * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined | |
1229 | * syscall-entry path does not save them we save them here instead. Note: we | |
1230 | * don't need to save any other registers that are not saved by the stream-lined | |
1231 | * syscall path, because restore_sigcontext() restores them. | |
1232 | */ | |
1233 | adds r16=PT(F6)+32,sp | |
1234 | adds r17=PT(F7)+32,sp | |
1235 | ;; | |
1236 | stf.spill [r16]=f6,32 | |
1237 | stf.spill [r17]=f7,32 | |
1238 | ;; | |
1239 | stf.spill [r16]=f8,32 | |
1240 | stf.spill [r17]=f9,32 | |
1241 | ;; | |
1242 | stf.spill [r16]=f10 | |
1243 | stf.spill [r17]=f11 | |
1244 | adds out0=16,sp // out0 = &sigscratch | |
1245 | br.call.sptk.many rp=ia64_rt_sigreturn | |
1246 | .ret19: .restore sp 0 | |
1247 | adds sp=16,sp | |
1248 | ;; | |
1249 | ld8 r9=[sp] // load new ar.unat | |
1250 | mov.sptk b7=r8,ia64_leave_kernel | |
1251 | ;; | |
1252 | mov ar.unat=r9 | |
1253 | br.many b7 | |
1254 | END(sys_rt_sigreturn) | |
1255 | ||
1256 | GLOBAL_ENTRY(ia64_prepare_handle_unaligned) | |
1257 | .prologue | |
1258 | /* | |
1259 | * r16 = fake ar.pfs, we simply need to make sure privilege is still 0 | |
1260 | */ | |
1261 | mov r16=r0 | |
1262 | DO_SAVE_SWITCH_STACK | |
1263 | br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt | |
1264 | .ret21: .body | |
1265 | DO_LOAD_SWITCH_STACK | |
1266 | br.cond.sptk.many rp // goes to ia64_leave_kernel | |
1267 | END(ia64_prepare_handle_unaligned) | |
1268 | ||
1269 | // | |
1270 | // unw_init_running(void (*callback)(info, arg), void *arg) | |
1271 | // | |
1272 | # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15) | |
1273 | ||
1274 | GLOBAL_ENTRY(unw_init_running) | |
1275 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) | |
1276 | alloc loc1=ar.pfs,2,3,3,0 | |
1277 | ;; | |
1278 | ld8 loc2=[in0],8 | |
1279 | mov loc0=rp | |
1280 | mov r16=loc1 | |
1281 | DO_SAVE_SWITCH_STACK | |
1282 | .body | |
1283 | ||
1284 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) | |
1285 | .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE | |
1286 | SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE) | |
1287 | adds sp=-EXTRA_FRAME_SIZE,sp | |
1288 | .body | |
1289 | ;; | |
1290 | adds out0=16,sp // &info | |
1291 | mov out1=r13 // current | |
1292 | adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack | |
1293 | br.call.sptk.many rp=unw_init_frame_info | |
1294 | 1: adds out0=16,sp // &info | |
1295 | mov b6=loc2 | |
1296 | mov loc2=gp // save gp across indirect function call | |
1297 | ;; | |
1298 | ld8 gp=[in0] | |
1299 | mov out1=in1 // arg | |
1300 | br.call.sptk.many rp=b6 // invoke the callback function | |
1301 | 1: mov gp=loc2 // restore gp | |
1302 | ||
1303 | // For now, we don't allow changing registers from within | |
1304 | // unw_init_running; if we ever want to allow that, we'd | |
1305 | // have to do a load_switch_stack here: | |
1306 | .restore sp | |
1307 | adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp | |
1308 | ||
1309 | mov ar.pfs=loc1 | |
1310 | mov rp=loc0 | |
1311 | br.ret.sptk.many rp | |
1312 | END(unw_init_running) | |
1313 | ||
1314 | .rodata | |
1315 | .align 8 | |
1316 | .globl sys_call_table | |
1317 | sys_call_table: | |
1318 | data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S. | |
1319 | data8 sys_exit // 1025 | |
1320 | data8 sys_read | |
1321 | data8 sys_write | |
1322 | data8 sys_open | |
1323 | data8 sys_close | |
1324 | data8 sys_creat // 1030 | |
1325 | data8 sys_link | |
1326 | data8 sys_unlink | |
1327 | data8 ia64_execve | |
1328 | data8 sys_chdir | |
1329 | data8 sys_fchdir // 1035 | |
1330 | data8 sys_utimes | |
1331 | data8 sys_mknod | |
1332 | data8 sys_chmod | |
1333 | data8 sys_chown | |
1334 | data8 sys_lseek // 1040 | |
1335 | data8 sys_getpid | |
1336 | data8 sys_getppid | |
1337 | data8 sys_mount | |
1338 | data8 sys_umount | |
1339 | data8 sys_setuid // 1045 | |
1340 | data8 sys_getuid | |
1341 | data8 sys_geteuid | |
1342 | data8 sys_ptrace | |
1343 | data8 sys_access | |
1344 | data8 sys_sync // 1050 | |
1345 | data8 sys_fsync | |
1346 | data8 sys_fdatasync | |
1347 | data8 sys_kill | |
1348 | data8 sys_rename | |
1349 | data8 sys_mkdir // 1055 | |
1350 | data8 sys_rmdir | |
1351 | data8 sys_dup | |
1352 | data8 sys_pipe | |
1353 | data8 sys_times | |
1354 | data8 ia64_brk // 1060 | |
1355 | data8 sys_setgid | |
1356 | data8 sys_getgid | |
1357 | data8 sys_getegid | |
1358 | data8 sys_acct | |
1359 | data8 sys_ioctl // 1065 | |
1360 | data8 sys_fcntl | |
1361 | data8 sys_umask | |
1362 | data8 sys_chroot | |
1363 | data8 sys_ustat | |
1364 | data8 sys_dup2 // 1070 | |
1365 | data8 sys_setreuid | |
1366 | data8 sys_setregid | |
1367 | data8 sys_getresuid | |
1368 | data8 sys_setresuid | |
1369 | data8 sys_getresgid // 1075 | |
1370 | data8 sys_setresgid | |
1371 | data8 sys_getgroups | |
1372 | data8 sys_setgroups | |
1373 | data8 sys_getpgid | |
1374 | data8 sys_setpgid // 1080 | |
1375 | data8 sys_setsid | |
1376 | data8 sys_getsid | |
1377 | data8 sys_sethostname | |
1378 | data8 sys_setrlimit | |
1379 | data8 sys_getrlimit // 1085 | |
1380 | data8 sys_getrusage | |
1381 | data8 sys_gettimeofday | |
1382 | data8 sys_settimeofday | |
1383 | data8 sys_select | |
1384 | data8 sys_poll // 1090 | |
1385 | data8 sys_symlink | |
1386 | data8 sys_readlink | |
1387 | data8 sys_uselib | |
1388 | data8 sys_swapon | |
1389 | data8 sys_swapoff // 1095 | |
1390 | data8 sys_reboot | |
1391 | data8 sys_truncate | |
1392 | data8 sys_ftruncate | |
1393 | data8 sys_fchmod | |
1394 | data8 sys_fchown // 1100 | |
1395 | data8 ia64_getpriority | |
1396 | data8 sys_setpriority | |
1397 | data8 sys_statfs | |
1398 | data8 sys_fstatfs | |
1399 | data8 sys_gettid // 1105 | |
1400 | data8 sys_semget | |
1401 | data8 sys_semop | |
1402 | data8 sys_semctl | |
1403 | data8 sys_msgget | |
1404 | data8 sys_msgsnd // 1110 | |
1405 | data8 sys_msgrcv | |
1406 | data8 sys_msgctl | |
1407 | data8 sys_shmget | |
1408 | data8 ia64_shmat | |
1409 | data8 sys_shmdt // 1115 | |
1410 | data8 sys_shmctl | |
1411 | data8 sys_syslog | |
1412 | data8 sys_setitimer | |
1413 | data8 sys_getitimer | |
1414 | data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */ | |
1415 | data8 sys_ni_syscall /* was: ia64_oldlstat */ | |
1416 | data8 sys_ni_syscall /* was: ia64_oldfstat */ | |
1417 | data8 sys_vhangup | |
1418 | data8 sys_lchown | |
1419 | data8 sys_remap_file_pages // 1125 | |
1420 | data8 sys_wait4 | |
1421 | data8 sys_sysinfo | |
1422 | data8 sys_clone | |
1423 | data8 sys_setdomainname | |
1424 | data8 sys_newuname // 1130 | |
1425 | data8 sys_adjtimex | |
1426 | data8 sys_ni_syscall /* was: ia64_create_module */ | |
1427 | data8 sys_init_module | |
1428 | data8 sys_delete_module | |
1429 | data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */ | |
1430 | data8 sys_ni_syscall /* was: sys_query_module */ | |
1431 | data8 sys_quotactl | |
1432 | data8 sys_bdflush | |
1433 | data8 sys_sysfs | |
1434 | data8 sys_personality // 1140 | |
1435 | data8 sys_ni_syscall // sys_afs_syscall | |
1436 | data8 sys_setfsuid | |
1437 | data8 sys_setfsgid | |
1438 | data8 sys_getdents | |
1439 | data8 sys_flock // 1145 | |
1440 | data8 sys_readv | |
1441 | data8 sys_writev | |
1442 | data8 sys_pread64 | |
1443 | data8 sys_pwrite64 | |
1444 | data8 sys_sysctl // 1150 | |
1445 | data8 sys_mmap | |
1446 | data8 sys_munmap | |
1447 | data8 sys_mlock | |
1448 | data8 sys_mlockall | |
1449 | data8 sys_mprotect // 1155 | |
1450 | data8 ia64_mremap | |
1451 | data8 sys_msync | |
1452 | data8 sys_munlock | |
1453 | data8 sys_munlockall | |
1454 | data8 sys_sched_getparam // 1160 | |
1455 | data8 sys_sched_setparam | |
1456 | data8 sys_sched_getscheduler | |
1457 | data8 sys_sched_setscheduler | |
1458 | data8 sys_sched_yield | |
1459 | data8 sys_sched_get_priority_max // 1165 | |
1460 | data8 sys_sched_get_priority_min | |
1461 | data8 sys_sched_rr_get_interval | |
1462 | data8 sys_nanosleep | |
1463 | data8 sys_nfsservctl | |
1464 | data8 sys_prctl // 1170 | |
1465 | data8 sys_getpagesize | |
1466 | data8 sys_mmap2 | |
1467 | data8 sys_pciconfig_read | |
1468 | data8 sys_pciconfig_write | |
1469 | data8 sys_perfmonctl // 1175 | |
1470 | data8 sys_sigaltstack | |
1471 | data8 sys_rt_sigaction | |
1472 | data8 sys_rt_sigpending | |
1473 | data8 sys_rt_sigprocmask | |
1474 | data8 sys_rt_sigqueueinfo // 1180 | |
1475 | data8 sys_rt_sigreturn | |
1476 | data8 sys_rt_sigsuspend | |
1477 | data8 sys_rt_sigtimedwait | |
1478 | data8 sys_getcwd | |
1479 | data8 sys_capget // 1185 | |
1480 | data8 sys_capset | |
1481 | data8 sys_sendfile64 | |
1482 | data8 sys_ni_syscall // sys_getpmsg (STREAMS) | |
1483 | data8 sys_ni_syscall // sys_putpmsg (STREAMS) | |
1484 | data8 sys_socket // 1190 | |
1485 | data8 sys_bind | |
1486 | data8 sys_connect | |
1487 | data8 sys_listen | |
1488 | data8 sys_accept | |
1489 | data8 sys_getsockname // 1195 | |
1490 | data8 sys_getpeername | |
1491 | data8 sys_socketpair | |
1492 | data8 sys_send | |
1493 | data8 sys_sendto | |
1494 | data8 sys_recv // 1200 | |
1495 | data8 sys_recvfrom | |
1496 | data8 sys_shutdown | |
1497 | data8 sys_setsockopt | |
1498 | data8 sys_getsockopt | |
1499 | data8 sys_sendmsg // 1205 | |
1500 | data8 sys_recvmsg | |
1501 | data8 sys_pivot_root | |
1502 | data8 sys_mincore | |
1503 | data8 sys_madvise | |
1504 | data8 sys_newstat // 1210 | |
1505 | data8 sys_newlstat | |
1506 | data8 sys_newfstat | |
1507 | data8 sys_clone2 | |
1508 | data8 sys_getdents64 | |
1509 | data8 sys_getunwind // 1215 | |
1510 | data8 sys_readahead | |
1511 | data8 sys_setxattr | |
1512 | data8 sys_lsetxattr | |
1513 | data8 sys_fsetxattr | |
1514 | data8 sys_getxattr // 1220 | |
1515 | data8 sys_lgetxattr | |
1516 | data8 sys_fgetxattr | |
1517 | data8 sys_listxattr | |
1518 | data8 sys_llistxattr | |
1519 | data8 sys_flistxattr // 1225 | |
1520 | data8 sys_removexattr | |
1521 | data8 sys_lremovexattr | |
1522 | data8 sys_fremovexattr | |
1523 | data8 sys_tkill | |
1524 | data8 sys_futex // 1230 | |
1525 | data8 sys_sched_setaffinity | |
1526 | data8 sys_sched_getaffinity | |
1527 | data8 sys_set_tid_address | |
1528 | data8 sys_fadvise64_64 | |
1529 | data8 sys_tgkill // 1235 | |
1530 | data8 sys_exit_group | |
1531 | data8 sys_lookup_dcookie | |
1532 | data8 sys_io_setup | |
1533 | data8 sys_io_destroy | |
1534 | data8 sys_io_getevents // 1240 | |
1535 | data8 sys_io_submit | |
1536 | data8 sys_io_cancel | |
1537 | data8 sys_epoll_create | |
1538 | data8 sys_epoll_ctl | |
1539 | data8 sys_epoll_wait // 1245 | |
1540 | data8 sys_restart_syscall | |
1541 | data8 sys_semtimedop | |
1542 | data8 sys_timer_create | |
1543 | data8 sys_timer_settime | |
1544 | data8 sys_timer_gettime // 1250 | |
1545 | data8 sys_timer_getoverrun | |
1546 | data8 sys_timer_delete | |
1547 | data8 sys_clock_settime | |
1548 | data8 sys_clock_gettime | |
1549 | data8 sys_clock_getres // 1255 | |
1550 | data8 sys_clock_nanosleep | |
1551 | data8 sys_fstatfs64 | |
1552 | data8 sys_statfs64 | |
1553 | data8 sys_mbind | |
1554 | data8 sys_get_mempolicy // 1260 | |
1555 | data8 sys_set_mempolicy | |
1556 | data8 sys_mq_open | |
1557 | data8 sys_mq_unlink | |
1558 | data8 sys_mq_timedsend | |
1559 | data8 sys_mq_timedreceive // 1265 | |
1560 | data8 sys_mq_notify | |
1561 | data8 sys_mq_getsetattr | |
1562 | data8 sys_ni_syscall // reserved for kexec_load | |
1563 | data8 sys_ni_syscall // reserved for vserver | |
1564 | data8 sys_waitid // 1270 | |
1565 | data8 sys_add_key | |
1566 | data8 sys_request_key | |
1567 | data8 sys_keyctl | |
1568 | data8 sys_ni_syscall | |
1569 | data8 sys_ni_syscall // 1275 | |
1570 | data8 sys_ni_syscall | |
1571 | data8 sys_ni_syscall | |
1572 | data8 sys_ni_syscall | |
1573 | data8 sys_ni_syscall | |
1574 | ||
1575 | .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls |