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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef _ASM_IA64_TIMEX_H |
3 | #define _ASM_IA64_TIMEX_H | |
4 | ||
5 | /* | |
6 | * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co | |
7 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
8 | */ | |
9 | /* | |
10 | * 2001/01/18 davidm Removed CLOCK_TICK_RATE. It makes no sense on IA-64. | |
11 | * Also removed cacheflush_time as it's entirely unused. | |
12 | */ | |
13 | ||
14 | #include <asm/intrinsics.h> | |
15 | #include <asm/processor.h> | |
16 | ||
17 | typedef unsigned long cycles_t; | |
18 | ||
defbb2c9 | 19 | extern void (*ia64_udelay)(unsigned long usecs); |
20 | ||
1da177e4 LT |
21 | /* |
22 | * For performance reasons, we don't want to define CLOCK_TICK_TRATE as | |
23 | * local_cpu_data->itc_rate. Fortunately, we don't have to, either: according to George | |
24 | * Anzinger, 1/CLOCK_TICK_RATE is taken as the resolution of the timer clock. The time | |
25 | * calculation assumes that you will use enough of these so that your tick size <= 1/HZ. | |
26 | * If the calculation shows that your CLOCK_TICK_RATE can not supply exactly 1/HZ ticks, | |
27 | * the actual value is calculated and used to update the wall clock each jiffie. Setting | |
28 | * the CLOCK_TICK_RATE to x*HZ insures that the calculation will find no errors. Hence we | |
29 | * pick a multiple of HZ which gives us a (totally virtual) CLOCK_TICK_RATE of about | |
30 | * 100MHz. | |
31 | */ | |
32 | #define CLOCK_TICK_RATE (HZ * 100000UL) | |
33 | ||
34 | static inline cycles_t | |
35 | get_cycles (void) | |
36 | { | |
37 | cycles_t ret; | |
38 | ||
39 | ret = ia64_getreg(_IA64_REG_AR_ITC); | |
40 | return ret; | |
41 | } | |
42 | ||
1b4a18fc | 43 | extern void ia64_cpu_local_tick (void); |
f927da17 | 44 | extern unsigned long long ia64_native_sched_clock (void); |
1b4a18fc | 45 | |
1da177e4 | 46 | #endif /* _ASM_IA64_TIMEX_H */ |