[linux-2.6-block.git] / arch / ia64 / include / asm / ptrace.h

#ifndef _ASM_IA64_PTRACE_H
#define _ASM_IA64_PTRACE_H

/*
 * Copyright (C) 1998-2004 Hewlett-Packard Co
 *	David Mosberger-Tang <davidm@hpl.hp.com>
 *	Stephane Eranian <eranian@hpl.hp.com>
 * Copyright (C) 2003 Intel Co
 *	Suresh Siddha <suresh.b.siddha@intel.com>
 *	Fenghua Yu <fenghua.yu@intel.com>
 *	Arun Sharma <arun.sharma@intel.com>
 *
 * 12/07/98	S. Eranian	added pt_regs & switch_stack
 * 12/21/98	D. Mosberger	updated to match latest code
 *  6/17/99	D. Mosberger	added second unat member to "struct switch_stack"
 *
 */
/*
 * When a user process is blocked, its state looks as follows:
 *
 *            +----------------------+	-------	IA64_STK_OFFSET
 *     	      |			     |	 ^
 *            | struct pt_regs       |	 |
 *	      |			     |	 |
 *            +----------------------+	 |
 *	      |			     |	 |
 *     	      |	   memory stack	     |	 |
 *	      |	(growing downwards)  |	 |
 *	      //.....................//	 |
 *					 |
 *	      //.....................//	 |
 *	      |			     |	 |
 *            +----------------------+	 |
 *            | struct switch_stack  |	 |
 *	      |			     |	 |
 *	      +----------------------+	 |
 *	      |			     |	 |
 *	      //.....................//	 |
 *					 |
 *	      //.....................//	 |
 *	      |			     |	 |
 *	      |	 register stack	     |	 |
 *	      |	(growing upwards)    |	 |
 *            |			     |	 |
 *	      +----------------------+	 |  ---	IA64_RBS_OFFSET
 *            |  struct thread_info  |	 |  ^
 *	      +----------------------+	 |  |
 *	      |			     |	 |  |
 *            |  struct task_struct  |	 |  |
 * current -> |			     |   |  |
 *	      +----------------------+ -------
 *
 * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
 * This is because ar.ec is saved as part of ar.pfs.
 */


#include <asm/fpu.h>

#ifdef __KERNEL__
#ifndef ASM_OFFSETS_C
#include <asm/asm-offsets.h>
#endif

/*
 * Base-2 logarithm of number of pages to allocate per task structure
 * (including register backing store and memory stack):
 */
#if defined(CONFIG_IA64_PAGE_SIZE_4KB)
# define KERNEL_STACK_SIZE_ORDER		3
#elif defined(CONFIG_IA64_PAGE_SIZE_8KB)
# define KERNEL_STACK_SIZE_ORDER		2
#elif defined(CONFIG_IA64_PAGE_SIZE_16KB)
# define KERNEL_STACK_SIZE_ORDER		1
#else
# define KERNEL_STACK_SIZE_ORDER		0
#endif

#define IA64_RBS_OFFSET			((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 31) & ~31)
#define IA64_STK_OFFSET			((1 << KERNEL_STACK_SIZE_ORDER)*PAGE_SIZE)

#define KERNEL_STACK_SIZE		IA64_STK_OFFSET

#endif /* __KERNEL__ */

#ifndef __ASSEMBLY__

/*
 * This struct defines the way the registers are saved on system
 * calls.
 *
 * We don't save all floating point register because the kernel
 * is compiled to use only a very small subset, so the other are
 * untouched.
 *
 * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
 * (because the memory stack pointer MUST ALWAYS be aligned this way)
 *
 */
struct pt_regs {
	/* The following registers are saved by SAVE_MIN: */
	unsigned long b6;		/* scratch */
	unsigned long b7;		/* scratch */

	unsigned long ar_csd;           /* used by cmp8xchg16 (scratch) */
	unsigned long ar_ssd;           /* reserved for future use (scratch) */

	unsigned long r8;		/* scratch (return value register 0) */
	unsigned long r9;		/* scratch (return value register 1) */
	unsigned long r10;		/* scratch (return value register 2) */
	unsigned long r11;		/* scratch (return value register 3) */

	unsigned long cr_ipsr;		/* interrupted task's psr */
	unsigned long cr_iip;		/* interrupted task's instruction pointer */
	/*
	 * interrupted task's function state; if bit 63 is cleared, it
	 * contains syscall's ar.pfs.pfm:
	 */
	unsigned long cr_ifs;

	unsigned long ar_unat;		/* interrupted task's NaT register (preserved) */
	unsigned long ar_pfs;		/* prev function state  */
	unsigned long ar_rsc;		/* RSE configuration */
	/* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
	unsigned long ar_rnat;		/* RSE NaT */
	unsigned long ar_bspstore;	/* RSE bspstore */

	unsigned long pr;		/* 64 predicate registers (1 bit each) */
	unsigned long b0;		/* return pointer (bp) */
	unsigned long loadrs;		/* size of dirty partition << 16 */

	unsigned long r1;		/* the gp pointer */
	unsigned long r12;		/* interrupted task's memory stack pointer */
	unsigned long r13;		/* thread pointer */

	unsigned long ar_fpsr;		/* floating point status (preserved) */
	unsigned long r15;		/* scratch */

	/* The remaining registers are NOT saved for system calls.  */

	unsigned long r14;		/* scratch */
	unsigned long r2;		/* scratch */
	unsigned long r3;		/* scratch */

	/* The following registers are saved by SAVE_REST: */
	unsigned long r16;		/* scratch */
	unsigned long r17;		/* scratch */
	unsigned long r18;		/* scratch */
	unsigned long r19;		/* scratch */
	unsigned long r20;		/* scratch */
	unsigned long r21;		/* scratch */
	unsigned long r22;		/* scratch */
	unsigned long r23;		/* scratch */
	unsigned long r24;		/* scratch */
	unsigned long r25;		/* scratch */
	unsigned long r26;		/* scratch */
	unsigned long r27;		/* scratch */
	unsigned long r28;		/* scratch */
	unsigned long r29;		/* scratch */
	unsigned long r30;		/* scratch */
	unsigned long r31;		/* scratch */

	unsigned long ar_ccv;		/* compare/exchange value (scratch) */

	/*
	 * Floating point registers that the kernel considers scratch:
	 */
	struct ia64_fpreg f6;		/* scratch */
	struct ia64_fpreg f7;		/* scratch */
	struct ia64_fpreg f8;		/* scratch */
	struct ia64_fpreg f9;		/* scratch */
	struct ia64_fpreg f10;		/* scratch */
	struct ia64_fpreg f11;		/* scratch */
};

/*
 * This structure contains the addition registers that need to
 * preserved across a context switch.  This generally consists of
 * "preserved" registers.
 */
struct switch_stack {
	unsigned long caller_unat;	/* user NaT collection register (preserved) */
	unsigned long ar_fpsr;		/* floating-point status register */

	struct ia64_fpreg f2;		/* preserved */
	struct ia64_fpreg f3;		/* preserved */
	struct ia64_fpreg f4;		/* preserved */
	struct ia64_fpreg f5;		/* preserved */

	struct ia64_fpreg f12;		/* scratch, but untouched by kernel */
	struct ia64_fpreg f13;		/* scratch, but untouched by kernel */
	struct ia64_fpreg f14;		/* scratch, but untouched by kernel */
	struct ia64_fpreg f15;		/* scratch, but untouched by kernel */
	struct ia64_fpreg f16;		/* preserved */
	struct ia64_fpreg f17;		/* preserved */
	struct ia64_fpreg f18;		/* preserved */
	struct ia64_fpreg f19;		/* preserved */
	struct ia64_fpreg f20;		/* preserved */
	struct ia64_fpreg f21;		/* preserved */
	struct ia64_fpreg f22;		/* preserved */
	struct ia64_fpreg f23;		/* preserved */
	struct ia64_fpreg f24;		/* preserved */
	struct ia64_fpreg f25;		/* preserved */
	struct ia64_fpreg f26;		/* preserved */
	struct ia64_fpreg f27;		/* preserved */
	struct ia64_fpreg f28;		/* preserved */
	struct ia64_fpreg f29;		/* preserved */
	struct ia64_fpreg f30;		/* preserved */
	struct ia64_fpreg f31;		/* preserved */

	unsigned long r4;		/* preserved */
	unsigned long r5;		/* preserved */
	unsigned long r6;		/* preserved */
	unsigned long r7;		/* preserved */

	unsigned long b0;		/* so we can force a direct return in copy_thread */
	unsigned long b1;
	unsigned long b2;
	unsigned long b3;
	unsigned long b4;
	unsigned long b5;

	unsigned long ar_pfs;		/* previous function state */
	unsigned long ar_lc;		/* loop counter (preserved) */
	unsigned long ar_unat;		/* NaT bits for r4-r7 */
	unsigned long ar_rnat;		/* RSE NaT collection register */
	unsigned long ar_bspstore;	/* RSE dirty base (preserved) */
	unsigned long pr;		/* 64 predicate registers (1 bit each) */
};

#ifdef __KERNEL__

#include <asm/current.h>
#include <asm/page.h>

/*
 * We use the ia64_psr(regs)->ri to determine which of the three
 * instructions in bundle (16 bytes) took the sample. Generate
 * the canonical representation by adding to instruction pointer.
 */
# define instruction_pointer(regs) ((regs)->cr_iip + ia64_psr(regs)->ri)

static inline unsigned long user_stack_pointer(struct pt_regs *regs)
{
	/* FIXME: should this be bspstore + nr_dirty regs? */
	return regs->ar_bspstore;
}

#define regs_return_value(regs) ((regs)->r8)

/* Conserve space in histogram by encoding slot bits in address
 * bits 2 and 3 rather than bits 0 and 1.
 */
#define profile_pc(regs)						\
({									\
	unsigned long __ip = instruction_pointer(regs);			\
	(__ip & ~3UL) + ((__ip & 3UL) << 2);				\
})

  /* given a pointer to a task_struct, return the user's pt_regs */
# define task_pt_regs(t)		(((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1)
# define ia64_psr(regs)			((struct ia64_psr *) &(regs)->cr_ipsr)
# define user_mode(regs)		(((struct ia64_psr *) &(regs)->cr_ipsr)->cpl != 0)
# define user_stack(task,regs)	((long) regs - (long) task == IA64_STK_OFFSET - sizeof(*regs))
# define fsys_mode(task,regs)					\
  ({								\
	  struct task_struct *_task = (task);			\
	  struct pt_regs *_regs = (regs);			\
	  !user_mode(_regs) && user_stack(_task, _regs);	\
  })

  /*
   * System call handlers that, upon successful completion, need to return a negative value
   * should call force_successful_syscall_return() right before returning.  On architectures
   * where the syscall convention provides for a separate error flag (e.g., alpha, ia64,
   * ppc{,64}, sparc{,64}, possibly others), this macro can be used to ensure that the error
   * flag will not get set.  On architectures which do not support a separate error flag,
   * the macro is a no-op and the spurious error condition needs to be filtered out by some
   * other means (e.g., in user-level, by passing an extra argument to the syscall handler,
   * or something along those lines).
   *
   * On ia64, we can clear the user's pt_regs->r8 to force a successful syscall.
   */
# define force_successful_syscall_return()	(task_pt_regs(current)->r8 = 0)

  struct task_struct;			/* forward decl */
  struct unw_frame_info;		/* forward decl */

  extern void show_regs (struct pt_regs *);
  extern void ia64_do_show_stack (struct unw_frame_info *, void *);
  extern unsigned long ia64_get_user_rbs_end (struct task_struct *, struct pt_regs *,
					      unsigned long *);
  extern long ia64_peek (struct task_struct *, struct switch_stack *, unsigned long,
			 unsigned long, long *);
  extern long ia64_poke (struct task_struct *, struct switch_stack *, unsigned long,
			 unsigned long, long);
  extern void ia64_flush_fph (struct task_struct *);
  extern void ia64_sync_fph (struct task_struct *);
  extern void ia64_sync_krbs(void);
  extern long ia64_sync_user_rbs (struct task_struct *, struct switch_stack *,
				  unsigned long, unsigned long);

  /* get nat bits for scratch registers such that bit N==1 iff scratch register rN is a NaT */
  extern unsigned long ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat);
  /* put nat bits for scratch registers such that scratch register rN is a NaT iff bit N==1 */
  extern unsigned long ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat);

  extern void ia64_increment_ip (struct pt_regs *pt);
  extern void ia64_decrement_ip (struct pt_regs *pt);

  extern void ia64_ptrace_stop(void);
  #define arch_ptrace_stop(code, info) \
	ia64_ptrace_stop()
  #define arch_ptrace_stop_needed(code, info) \
	(!test_thread_flag(TIF_RESTORE_RSE))

  extern void ptrace_attach_sync_user_rbs (struct task_struct *);
  #define arch_ptrace_attach(child) \
	ptrace_attach_sync_user_rbs(child)

  #define arch_has_single_step()  (1)
  extern void user_enable_single_step(struct task_struct *);
  extern void user_disable_single_step(struct task_struct *);

  #define arch_has_block_step()   (1)
  extern void user_enable_block_step(struct task_struct *);

#endif /* !__KERNEL__ */

/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
struct pt_all_user_regs {
	unsigned long nat;
	unsigned long cr_iip;
	unsigned long cfm;
	unsigned long cr_ipsr;
	unsigned long pr;

	unsigned long gr[32];
	unsigned long br[8];
	unsigned long ar[128];
	struct ia64_fpreg fr[128];
};

#endif /* !__ASSEMBLY__ */

/* indices to application-registers array in pt_all_user_regs */
#define PT_AUR_RSC	16
#define PT_AUR_BSP	17
#define PT_AUR_BSPSTORE	18
#define PT_AUR_RNAT	19
#define PT_AUR_CCV	32
#define PT_AUR_UNAT	36
#define PT_AUR_FPSR	40
#define PT_AUR_PFS	64
#define PT_AUR_LC	65
#define PT_AUR_EC	66

/*
 * The numbers chosen here are somewhat arbitrary but absolutely MUST
 * not overlap with any of the number assigned in <linux/ptrace.h>.
 */
#define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
#define PTRACE_OLD_GETSIGINFO	13	/* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>)  */
#define PTRACE_OLD_SETSIGINFO	14	/* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>)  */
#define PTRACE_GETREGS		18	/* get all registers (pt_all_user_regs) in one shot */
#define PTRACE_SETREGS		19	/* set all registers (pt_all_user_regs) in one shot */

#define PTRACE_OLDSETOPTIONS	21

#endif /* _ASM_IA64_PTRACE_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _ASM_IA64_PTRACE_H
	2	#define _ASM_IA64_PTRACE_H
	3
	4	/*
	5	* Copyright (C) 1998-2004 Hewlett-Packard Co
	6	* David Mosberger-Tang <davidm@hpl.hp.com>
	7	* Stephane Eranian <eranian@hpl.hp.com>
	8	* Copyright (C) 2003 Intel Co
	9	* Suresh Siddha <suresh.b.siddha@intel.com>
	10	* Fenghua Yu <fenghua.yu@intel.com>
	11	* Arun Sharma <arun.sharma@intel.com>
	12	*
	13	* 12/07/98 S. Eranian added pt_regs & switch_stack
	14	* 12/21/98 D. Mosberger updated to match latest code
	15	* 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
	16	*
	17	*/
	18	/*
	19	* When a user process is blocked, its state looks as follows:
	20	*
	21	* +----------------------+ ------- IA64_STK_OFFSET
	22	* \| \| ^
	23	* \| struct pt_regs \| \|
	24	* \| \| \|
	25	* +----------------------+ \|
	26	* \| \| \|
	27	* \| memory stack \| \|
	28	* \| (growing downwards) \| \|
	29	* //.....................// \|
	30	* \|
	31	* //.....................// \|
	32	* \| \| \|
	33	* +----------------------+ \|
	34	* \| struct switch_stack \| \|
	35	* \| \| \|
	36	* +----------------------+ \|
	37	* \| \| \|
	38	* //.....................// \|
	39	* \|
	40	* //.....................// \|
	41	* \| \| \|
	42	* \| register stack \| \|
	43	* \| (growing upwards) \| \|
	44	* \| \| \|
	45	* +----------------------+ \| --- IA64_RBS_OFFSET
	46	* \| struct thread_info \| \| ^
	47	* +----------------------+ \| \|
	48	* \| \| \| \|
	49	* \| struct task_struct \| \| \|
	50	* current -> \| \| \| \|
	51	* +----------------------+ -------
	52	*
	53	* Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
	54	* This is because ar.ec is saved as part of ar.pfs.
	55	*/
	56
1da177e4 LT	57
1da177e4 LT	58	#include <asm/fpu.h>
d5759641 DW	59
d5759641 DW	60	#ifdef __KERNEL__
82f1b07b	61	#ifndef ASM_OFFSETS_C
0013a854	62	#include <asm/asm-offsets.h>
82f1b07b	63	#endif
1da177e4 LT	64
	65	/*
	66	* Base-2 logarithm of number of pages to allocate per task structure
	67	* (including register backing store and memory stack):
	68	*/
	69	#if defined(CONFIG_IA64_PAGE_SIZE_4KB)
	70	# define KERNEL_STACK_SIZE_ORDER 3
	71	#elif defined(CONFIG_IA64_PAGE_SIZE_8KB)
	72	# define KERNEL_STACK_SIZE_ORDER 2
	73	#elif defined(CONFIG_IA64_PAGE_SIZE_16KB)
	74	# define KERNEL_STACK_SIZE_ORDER 1
	75	#else
	76	# define KERNEL_STACK_SIZE_ORDER 0
	77	#endif
	78
4dcc29e1	79	#define IA64_RBS_OFFSET ((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 31) & ~31)
1da177e4 LT	80	#define IA64_STK_OFFSET ((1 << KERNEL_STACK_SIZE_ORDER)*PAGE_SIZE)
	81
	82	#define KERNEL_STACK_SIZE IA64_STK_OFFSET
	83
d5759641	84	#endif /* __KERNEL__ */
1da177e4	85
d5759641	86	#ifndef __ASSEMBLY__
1da177e4 LT	87
	88	/*
	89	* This struct defines the way the registers are saved on system
	90	* calls.
	91	*
	92	* We don't save all floating point register because the kernel
	93	* is compiled to use only a very small subset, so the other are
	94	* untouched.
	95	*
	96	* THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
	97	* (because the memory stack pointer MUST ALWAYS be aligned this way)
	98	*
	99	*/
	100	struct pt_regs {
	101	/* The following registers are saved by SAVE_MIN: */
	102	unsigned long b6; /* scratch */
	103	unsigned long b7; /* scratch */
	104
	105	unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
	106	unsigned long ar_ssd; /* reserved for future use (scratch) */
	107
	108	unsigned long r8; /* scratch (return value register 0) */
	109	unsigned long r9; /* scratch (return value register 1) */
	110	unsigned long r10; /* scratch (return value register 2) */
	111	unsigned long r11; /* scratch (return value register 3) */
	112
	113	unsigned long cr_ipsr; /* interrupted task's psr */
	114	unsigned long cr_iip; /* interrupted task's instruction pointer */
	115	/*
	116	* interrupted task's function state; if bit 63 is cleared, it
	117	* contains syscall's ar.pfs.pfm:
	118	*/
	119	unsigned long cr_ifs;
	120
	121	unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
	122	unsigned long ar_pfs; /* prev function state */
	123	unsigned long ar_rsc; /* RSE configuration */
e619ae0b	124	/* The following two are valid only if cr_ipsr.cpl > 0 \|\| ti->flags & _TIF_MCA_INIT */
1da177e4 LT	125	unsigned long ar_rnat; /* RSE NaT */
	126	unsigned long ar_bspstore; /* RSE bspstore */
	127
	128	unsigned long pr; /* 64 predicate registers (1 bit each) */
	129	unsigned long b0; /* return pointer (bp) */
	130	unsigned long loadrs; /* size of dirty partition << 16 */
	131
	132	unsigned long r1; /* the gp pointer */
	133	unsigned long r12; /* interrupted task's memory stack pointer */
	134	unsigned long r13; /* thread pointer */
	135
	136	unsigned long ar_fpsr; /* floating point status (preserved) */
	137	unsigned long r15; /* scratch */
	138
	139	/* The remaining registers are NOT saved for system calls. */
	140
	141	unsigned long r14; /* scratch */
	142	unsigned long r2; /* scratch */
	143	unsigned long r3; /* scratch */
	144
	145	/* The following registers are saved by SAVE_REST: */
	146	unsigned long r16; /* scratch */
	147	unsigned long r17; /* scratch */
	148	unsigned long r18; /* scratch */
	149	unsigned long r19; /* scratch */
	150	unsigned long r20; /* scratch */
	151	unsigned long r21; /* scratch */
	152	unsigned long r22; /* scratch */
	153	unsigned long r23; /* scratch */
	154	unsigned long r24; /* scratch */
	155	unsigned long r25; /* scratch */
	156	unsigned long r26; /* scratch */
	157	unsigned long r27; /* scratch */
	158	unsigned long r28; /* scratch */
	159	unsigned long r29; /* scratch */
	160	unsigned long r30; /* scratch */
	161	unsigned long r31; /* scratch */
	162
	163	unsigned long ar_ccv; /* compare/exchange value (scratch) */
	164
	165	/*
	166	* Floating point registers that the kernel considers scratch:
	167	*/
	168	struct ia64_fpreg f6; /* scratch */
	169	struct ia64_fpreg f7; /* scratch */
	170	struct ia64_fpreg f8; /* scratch */
	171	struct ia64_fpreg f9; /* scratch */
	172	struct ia64_fpreg f10; /* scratch */
	173	struct ia64_fpreg f11; /* scratch */
	174	};
	175
	176	/*
	177	* This structure contains the addition registers that need to
	178	* preserved across a context switch. This generally consists of
	179	* "preserved" registers.
	180	*/
	181	struct switch_stack {
	182	unsigned long caller_unat; /* user NaT collection register (preserved) */
	183	unsigned long ar_fpsr; /* floating-point status register */
	184
	185	struct ia64_fpreg f2; /* preserved */
	186	struct ia64_fpreg f3; /* preserved */
	187	struct ia64_fpreg f4; /* preserved */
	188	struct ia64_fpreg f5; /* preserved */
189
190	struct ia64_fpreg f12; /* scratch, but untouched by kernel */
191	struct ia64_fpreg f13; /* scratch, but untouched by kernel */
192	struct ia64_fpreg f14; /* scratch, but untouched by kernel */
193	struct ia64_fpreg f15; /* scratch, but untouched by kernel */
194	struct ia64_fpreg f16; /* preserved */
195	struct ia64_fpreg f17; /* preserved */
196	struct ia64_fpreg f18; /* preserved */
197	struct ia64_fpreg f19; /* preserved */
198	struct ia64_fpreg f20; /* preserved */
199	struct ia64_fpreg f21; /* preserved */
200	struct ia64_fpreg f22; /* preserved */
201	struct ia64_fpreg f23; /* preserved */
202	struct ia64_fpreg f24; /* preserved */
203	struct ia64_fpreg f25; /* preserved */
204	struct ia64_fpreg f26; /* preserved */
205	struct ia64_fpreg f27; /* preserved */
206	struct ia64_fpreg f28; /* preserved */
207	struct ia64_fpreg f29; /* preserved */
208	struct ia64_fpreg f30; /* preserved */
209	struct ia64_fpreg f31; /* preserved */
210
211	unsigned long r4; /* preserved */
212	unsigned long r5; /* preserved */
213	unsigned long r6; /* preserved */
214	unsigned long r7; /* preserved */
215
216	unsigned long b0; /* so we can force a direct return in copy_thread */
217	unsigned long b1;
218	unsigned long b2;
219	unsigned long b3;
220	unsigned long b4;
221	unsigned long b5;
222
223	unsigned long ar_pfs; /* previous function state */
224	unsigned long ar_lc; /* loop counter (preserved) */
225	unsigned long ar_unat; /* NaT bits for r4-r7 */
226	unsigned long ar_rnat; /* RSE NaT collection register */
227	unsigned long ar_bspstore; /* RSE dirty base (preserved) */
228	unsigned long pr; /* 64 predicate registers (1 bit each) */
229	};
230
231	#ifdef __KERNEL__
481bed45	232
d5759641 DW	233	#include <asm/current.h>
	234	#include <asm/page.h>
	235
1da177e4 LT	236	/*
	237	* We use the ia64_psr(regs)->ri to determine which of the three
	238	* instructions in bundle (16 bytes) took the sample. Generate
	239	* the canonical representation by adding to instruction pointer.
	240	*/
	241	# define instruction_pointer(regs) ((regs)->cr_iip + ia64_psr(regs)->ri)
b3f827cb	242
cfb361f1 SL	243	static inline unsigned long user_stack_pointer(struct pt_regs *regs)
	244	{
	245	/* FIXME: should this be bspstore + nr_dirty regs? */
	246	return regs->ar_bspstore;
	247	}
	248
b3f827cb AM	249	#define regs_return_value(regs) ((regs)->r8)
b3f827cb AM	250
1da177e4 LT	251	/* Conserve space in histogram by encoding slot bits in address
	252	* bits 2 and 3 rather than bits 0 and 1.
	253	*/
	254	#define profile_pc(regs) \
	255	({ \
	256	unsigned long __ip = instruction_pointer(regs); \
	257	(__ip & ~3UL) + ((__ip & 3UL) << 2); \
	258	})
	259
	260	/* given a pointer to a task_struct, return the user's pt_regs */
6450578f	261	# define task_pt_regs(t) (((struct pt_regs ) ((char ) (t) + IA64_STK_OFFSET)) - 1)
1da177e4 LT	262	# define ia64_psr(regs) ((struct ia64_psr *) &(regs)->cr_ipsr)
	263	# define user_mode(regs) (((struct ia64_psr *) &(regs)->cr_ipsr)->cpl != 0)
	264	# define user_stack(task,regs) ((long) regs - (long) task == IA64_STK_OFFSET - sizeof(*regs))
	265	# define fsys_mode(task,regs) \
	266	({ \
	267	struct task_struct *_task = (task); \
	268	struct pt_regs *_regs = (regs); \
	269	!user_mode(_regs) && user_stack(_task, _regs); \
	270	})
	271
	272	/*
	273	* System call handlers that, upon successful completion, need to return a negative value
	274	* should call force_successful_syscall_return() right before returning. On architectures
	275	* where the syscall convention provides for a separate error flag (e.g., alpha, ia64,
	276	* ppc{,64}, sparc{,64}, possibly others), this macro can be used to ensure that the error
	277	* flag will not get set. On architectures which do not support a separate error flag,
	278	* the macro is a no-op and the spurious error condition needs to be filtered out by some
	279	* other means (e.g., in user-level, by passing an extra argument to the syscall handler,
	280	* or something along those lines).
	281	*
	282	* On ia64, we can clear the user's pt_regs->r8 to force a successful syscall.
	283	*/
6450578f	284	# define force_successful_syscall_return() (task_pt_regs(current)->r8 = 0)
1da177e4 LT	285
	286	struct task_struct; /* forward decl */
	287	struct unw_frame_info; /* forward decl */
	288
	289	extern void show_regs (struct pt_regs *);
	290	extern void ia64_do_show_stack (struct unw_frame_info , void );
	291	extern unsigned long ia64_get_user_rbs_end (struct task_struct , struct pt_regs ,
	292	unsigned long *);
	293	extern long ia64_peek (struct task_struct , struct switch_stack , unsigned long,
	294	unsigned long, long *);
	295	extern long ia64_poke (struct task_struct , struct switch_stack , unsigned long,
	296	unsigned long, long);
	297	extern void ia64_flush_fph (struct task_struct *);
	298	extern void ia64_sync_fph (struct task_struct *);
3b2ce0b1	299	extern void ia64_sync_krbs(void);
1da177e4 LT	300	extern long ia64_sync_user_rbs (struct task_struct , struct switch_stack ,
	301	unsigned long, unsigned long);
	302
	303	/* get nat bits for scratch registers such that bit N==1 iff scratch register rN is a NaT */
	304	extern unsigned long ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat);
	305	/* put nat bits for scratch registers such that scratch register rN is a NaT iff bit N==1 */
	306	extern unsigned long ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat);
	307
	308	extern void ia64_increment_ip (struct pt_regs *pt);
	309	extern void ia64_decrement_ip (struct pt_regs *pt);
	310
3b2ce0b1 PT	311	extern void ia64_ptrace_stop(void);
	312	#define arch_ptrace_stop(code, info) \
	313	ia64_ptrace_stop()
	314	#define arch_ptrace_stop_needed(code, info) \
	315	(!test_thread_flag(TIF_RESTORE_RSE))
	316
aa91a2e9 PT	317	extern void ptrace_attach_sync_user_rbs (struct task_struct *);
	318	#define arch_ptrace_attach(child) \
	319	ptrace_attach_sync_user_rbs(child)
	320
8db3f525 PT	321	#define arch_has_single_step() (1)
	322	extern void user_enable_single_step(struct task_struct *);
	323	extern void user_disable_single_step(struct task_struct *);
	324
	325	#define arch_has_block_step() (1)
	326	extern void user_enable_block_step(struct task_struct *);
	327
1da177e4 LT	328	#endif /* !__KERNEL__ */
	329
	330	/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
	331	struct pt_all_user_regs {
	332	unsigned long nat;
	333	unsigned long cr_iip;
	334	unsigned long cfm;
	335	unsigned long cr_ipsr;
	336	unsigned long pr;
	337
	338	unsigned long gr[32];
	339	unsigned long br[8];
	340	unsigned long ar[128];
	341	struct ia64_fpreg fr[128];
	342	};
	343
	344	#endif /* !__ASSEMBLY__ */
	345
	346	/* indices to application-registers array in pt_all_user_regs */
	347	#define PT_AUR_RSC 16
	348	#define PT_AUR_BSP 17
	349	#define PT_AUR_BSPSTORE 18
	350	#define PT_AUR_RNAT 19
	351	#define PT_AUR_CCV 32
	352	#define PT_AUR_UNAT 36
	353	#define PT_AUR_FPSR 40
	354	#define PT_AUR_PFS 64
	355	#define PT_AUR_LC 65
	356	#define PT_AUR_EC 66
	357
	358	/*
	359	* The numbers chosen here are somewhat arbitrary but absolutely MUST
	360	* not overlap with any of the number assigned in <linux/ptrace.h>.
	361	*/
	362	#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
	363	#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
	364	#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
	365	#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
	366	#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
	367
	368	#define PTRACE_OLDSETOPTIONS 21
	369
	370	#endif /* _ASM_IA64_PTRACE_H */