Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/i386/traps.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * | |
6 | * Pentium III FXSR, SSE support | |
7 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
8 | */ | |
9 | ||
10 | /* | |
11 | * 'Traps.c' handles hardware traps and faults after we have saved some | |
12 | * state in 'asm.s'. | |
13 | */ | |
14 | #include <linux/config.h> | |
15 | #include <linux/sched.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/string.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/timer.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/highmem.h> | |
26 | #include <linux/kallsyms.h> | |
27 | #include <linux/ptrace.h> | |
28 | #include <linux/utsname.h> | |
29 | #include <linux/kprobes.h> | |
6e274d14 | 30 | #include <linux/kexec.h> |
1da177e4 LT |
31 | |
32 | #ifdef CONFIG_EISA | |
33 | #include <linux/ioport.h> | |
34 | #include <linux/eisa.h> | |
35 | #endif | |
36 | ||
37 | #ifdef CONFIG_MCA | |
38 | #include <linux/mca.h> | |
39 | #endif | |
40 | ||
41 | #include <asm/processor.h> | |
42 | #include <asm/system.h> | |
43 | #include <asm/uaccess.h> | |
44 | #include <asm/io.h> | |
45 | #include <asm/atomic.h> | |
46 | #include <asm/debugreg.h> | |
47 | #include <asm/desc.h> | |
48 | #include <asm/i387.h> | |
49 | #include <asm/nmi.h> | |
50 | ||
51 | #include <asm/smp.h> | |
52 | #include <asm/arch_hooks.h> | |
53 | #include <asm/kdebug.h> | |
54 | ||
1da177e4 LT |
55 | #include <linux/module.h> |
56 | ||
57 | #include "mach_traps.h" | |
58 | ||
59 | asmlinkage int system_call(void); | |
60 | ||
61 | struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 }, | |
62 | { 0, 0 }, { 0, 0 } }; | |
63 | ||
64 | /* Do we ignore FPU interrupts ? */ | |
65 | char ignore_fpu_irq = 0; | |
66 | ||
67 | /* | |
68 | * The IDT has to be page-aligned to simplify the Pentium | |
69 | * F0 0F bug workaround.. We have a special link segment | |
70 | * for this. | |
71 | */ | |
72 | struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, }; | |
73 | ||
74 | asmlinkage void divide_error(void); | |
75 | asmlinkage void debug(void); | |
76 | asmlinkage void nmi(void); | |
77 | asmlinkage void int3(void); | |
78 | asmlinkage void overflow(void); | |
79 | asmlinkage void bounds(void); | |
80 | asmlinkage void invalid_op(void); | |
81 | asmlinkage void device_not_available(void); | |
82 | asmlinkage void coprocessor_segment_overrun(void); | |
83 | asmlinkage void invalid_TSS(void); | |
84 | asmlinkage void segment_not_present(void); | |
85 | asmlinkage void stack_segment(void); | |
86 | asmlinkage void general_protection(void); | |
87 | asmlinkage void page_fault(void); | |
88 | asmlinkage void coprocessor_error(void); | |
89 | asmlinkage void simd_coprocessor_error(void); | |
90 | asmlinkage void alignment_check(void); | |
91 | asmlinkage void spurious_interrupt_bug(void); | |
92 | asmlinkage void machine_check(void); | |
93 | ||
94 | static int kstack_depth_to_print = 24; | |
95 | struct notifier_block *i386die_chain; | |
96 | static DEFINE_SPINLOCK(die_notifier_lock); | |
97 | ||
98 | int register_die_notifier(struct notifier_block *nb) | |
99 | { | |
100 | int err = 0; | |
101 | unsigned long flags; | |
102 | spin_lock_irqsave(&die_notifier_lock, flags); | |
103 | err = notifier_chain_register(&i386die_chain, nb); | |
104 | spin_unlock_irqrestore(&die_notifier_lock, flags); | |
105 | return err; | |
106 | } | |
129f6946 | 107 | EXPORT_SYMBOL(register_die_notifier); |
1da177e4 LT |
108 | |
109 | static inline int valid_stack_ptr(struct thread_info *tinfo, void *p) | |
110 | { | |
111 | return p > (void *)tinfo && | |
112 | p < (void *)tinfo + THREAD_SIZE - 3; | |
113 | } | |
114 | ||
115 | static inline unsigned long print_context_stack(struct thread_info *tinfo, | |
116 | unsigned long *stack, unsigned long ebp) | |
117 | { | |
118 | unsigned long addr; | |
119 | ||
120 | #ifdef CONFIG_FRAME_POINTER | |
121 | while (valid_stack_ptr(tinfo, (void *)ebp)) { | |
122 | addr = *(unsigned long *)(ebp + 4); | |
123 | printk(" [<%08lx>] ", addr); | |
124 | print_symbol("%s", addr); | |
125 | printk("\n"); | |
126 | ebp = *(unsigned long *)ebp; | |
127 | } | |
128 | #else | |
129 | while (valid_stack_ptr(tinfo, stack)) { | |
130 | addr = *stack++; | |
131 | if (__kernel_text_address(addr)) { | |
132 | printk(" [<%08lx>]", addr); | |
133 | print_symbol(" %s", addr); | |
134 | printk("\n"); | |
135 | } | |
136 | } | |
137 | #endif | |
138 | return ebp; | |
139 | } | |
140 | ||
141 | void show_trace(struct task_struct *task, unsigned long * stack) | |
142 | { | |
143 | unsigned long ebp; | |
144 | ||
145 | if (!task) | |
146 | task = current; | |
147 | ||
148 | if (task == current) { | |
149 | /* Grab ebp right from our regs */ | |
150 | asm ("movl %%ebp, %0" : "=r" (ebp) : ); | |
151 | } else { | |
152 | /* ebp is the last reg pushed by switch_to */ | |
153 | ebp = *(unsigned long *) task->thread.esp; | |
154 | } | |
155 | ||
156 | while (1) { | |
157 | struct thread_info *context; | |
158 | context = (struct thread_info *) | |
159 | ((unsigned long)stack & (~(THREAD_SIZE - 1))); | |
160 | ebp = print_context_stack(context, stack, ebp); | |
161 | stack = (unsigned long*)context->previous_esp; | |
162 | if (!stack) | |
163 | break; | |
164 | printk(" =======================\n"); | |
165 | } | |
166 | } | |
167 | ||
168 | void show_stack(struct task_struct *task, unsigned long *esp) | |
169 | { | |
170 | unsigned long *stack; | |
171 | int i; | |
172 | ||
173 | if (esp == NULL) { | |
174 | if (task) | |
175 | esp = (unsigned long*)task->thread.esp; | |
176 | else | |
177 | esp = (unsigned long *)&esp; | |
178 | } | |
179 | ||
180 | stack = esp; | |
181 | for(i = 0; i < kstack_depth_to_print; i++) { | |
182 | if (kstack_end(stack)) | |
183 | break; | |
184 | if (i && ((i % 8) == 0)) | |
185 | printk("\n "); | |
186 | printk("%08lx ", *stack++); | |
187 | } | |
188 | printk("\nCall Trace:\n"); | |
189 | show_trace(task, esp); | |
190 | } | |
191 | ||
192 | /* | |
193 | * The architecture-independent dump_stack generator | |
194 | */ | |
195 | void dump_stack(void) | |
196 | { | |
197 | unsigned long stack; | |
198 | ||
199 | show_trace(current, &stack); | |
200 | } | |
201 | ||
202 | EXPORT_SYMBOL(dump_stack); | |
203 | ||
204 | void show_registers(struct pt_regs *regs) | |
205 | { | |
206 | int i; | |
207 | int in_kernel = 1; | |
208 | unsigned long esp; | |
209 | unsigned short ss; | |
210 | ||
211 | esp = (unsigned long) (®s->esp); | |
0998e422 | 212 | savesegment(ss, ss); |
717b594a | 213 | if (user_mode(regs)) { |
1da177e4 LT |
214 | in_kernel = 0; |
215 | esp = regs->esp; | |
216 | ss = regs->xss & 0xffff; | |
217 | } | |
218 | print_modules(); | |
219 | printk("CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\nEFLAGS: %08lx" | |
220 | " (%s) \n", | |
221 | smp_processor_id(), 0xffff & regs->xcs, regs->eip, | |
222 | print_tainted(), regs->eflags, system_utsname.release); | |
223 | print_symbol("EIP is at %s\n", regs->eip); | |
224 | printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n", | |
225 | regs->eax, regs->ebx, regs->ecx, regs->edx); | |
226 | printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n", | |
227 | regs->esi, regs->edi, regs->ebp, esp); | |
228 | printk("ds: %04x es: %04x ss: %04x\n", | |
229 | regs->xds & 0xffff, regs->xes & 0xffff, ss); | |
230 | printk("Process %s (pid: %d, threadinfo=%p task=%p)", | |
231 | current->comm, current->pid, current_thread_info(), current); | |
232 | /* | |
233 | * When in-kernel, we also print out the stack and code at the | |
234 | * time of the fault.. | |
235 | */ | |
236 | if (in_kernel) { | |
3f3ae347 | 237 | u8 __user *eip; |
1da177e4 LT |
238 | |
239 | printk("\nStack: "); | |
240 | show_stack(NULL, (unsigned long*)esp); | |
241 | ||
242 | printk("Code: "); | |
243 | ||
3f3ae347 | 244 | eip = (u8 __user *)regs->eip - 43; |
1da177e4 LT |
245 | for (i = 0; i < 64; i++, eip++) { |
246 | unsigned char c; | |
247 | ||
3f3ae347 | 248 | if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) { |
1da177e4 LT |
249 | printk(" Bad EIP value."); |
250 | break; | |
251 | } | |
3f3ae347 | 252 | if (eip == (u8 __user *)regs->eip) |
1da177e4 LT |
253 | printk("<%02x> ", c); |
254 | else | |
255 | printk("%02x ", c); | |
256 | } | |
257 | } | |
258 | printk("\n"); | |
259 | } | |
260 | ||
261 | static void handle_BUG(struct pt_regs *regs) | |
262 | { | |
263 | unsigned short ud2; | |
264 | unsigned short line; | |
265 | char *file; | |
266 | char c; | |
267 | unsigned long eip; | |
268 | ||
1da177e4 LT |
269 | eip = regs->eip; |
270 | ||
271 | if (eip < PAGE_OFFSET) | |
272 | goto no_bug; | |
3f3ae347 | 273 | if (__get_user(ud2, (unsigned short __user *)eip)) |
1da177e4 LT |
274 | goto no_bug; |
275 | if (ud2 != 0x0b0f) | |
276 | goto no_bug; | |
3f3ae347 | 277 | if (__get_user(line, (unsigned short __user *)(eip + 2))) |
1da177e4 | 278 | goto bug; |
3f3ae347 | 279 | if (__get_user(file, (char * __user *)(eip + 4)) || |
1da177e4 LT |
280 | (unsigned long)file < PAGE_OFFSET || __get_user(c, file)) |
281 | file = "<bad filename>"; | |
282 | ||
283 | printk("------------[ cut here ]------------\n"); | |
284 | printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line); | |
285 | ||
286 | no_bug: | |
287 | return; | |
288 | ||
289 | /* Here we know it was a BUG but file-n-line is unavailable */ | |
290 | bug: | |
291 | printk("Kernel BUG\n"); | |
292 | } | |
293 | ||
6e274d14 AN |
294 | /* This is gone through when something in the kernel |
295 | * has done something bad and is about to be terminated. | |
296 | */ | |
1da177e4 LT |
297 | void die(const char * str, struct pt_regs * regs, long err) |
298 | { | |
299 | static struct { | |
300 | spinlock_t lock; | |
301 | u32 lock_owner; | |
302 | int lock_owner_depth; | |
303 | } die = { | |
304 | .lock = SPIN_LOCK_UNLOCKED, | |
305 | .lock_owner = -1, | |
306 | .lock_owner_depth = 0 | |
307 | }; | |
308 | static int die_counter; | |
309 | ||
39c715b7 | 310 | if (die.lock_owner != raw_smp_processor_id()) { |
1da177e4 LT |
311 | console_verbose(); |
312 | spin_lock_irq(&die.lock); | |
313 | die.lock_owner = smp_processor_id(); | |
314 | die.lock_owner_depth = 0; | |
315 | bust_spinlocks(1); | |
316 | } | |
317 | ||
318 | if (++die.lock_owner_depth < 3) { | |
319 | int nl = 0; | |
320 | handle_BUG(regs); | |
321 | printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); | |
322 | #ifdef CONFIG_PREEMPT | |
323 | printk("PREEMPT "); | |
324 | nl = 1; | |
325 | #endif | |
326 | #ifdef CONFIG_SMP | |
327 | printk("SMP "); | |
328 | nl = 1; | |
329 | #endif | |
330 | #ifdef CONFIG_DEBUG_PAGEALLOC | |
331 | printk("DEBUG_PAGEALLOC"); | |
332 | nl = 1; | |
333 | #endif | |
334 | if (nl) | |
335 | printk("\n"); | |
336 | notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV); | |
337 | show_registers(regs); | |
338 | } else | |
339 | printk(KERN_ERR "Recursive die() failure, output suppressed\n"); | |
340 | ||
341 | bust_spinlocks(0); | |
342 | die.lock_owner = -1; | |
343 | spin_unlock_irq(&die.lock); | |
6e274d14 AN |
344 | |
345 | if (kexec_should_crash(current)) | |
346 | crash_kexec(regs); | |
347 | ||
1da177e4 LT |
348 | if (in_interrupt()) |
349 | panic("Fatal exception in interrupt"); | |
350 | ||
351 | if (panic_on_oops) { | |
352 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | |
353 | ssleep(5); | |
354 | panic("Fatal exception"); | |
355 | } | |
356 | do_exit(SIGSEGV); | |
357 | } | |
358 | ||
359 | static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err) | |
360 | { | |
717b594a | 361 | if (!user_mode_vm(regs)) |
1da177e4 LT |
362 | die(str, regs, err); |
363 | } | |
364 | ||
3d97ae5b PP |
365 | static void __kprobes do_trap(int trapnr, int signr, char *str, int vm86, |
366 | struct pt_regs * regs, long error_code, | |
367 | siginfo_t *info) | |
1da177e4 | 368 | { |
4f339ecb AN |
369 | struct task_struct *tsk = current; |
370 | tsk->thread.error_code = error_code; | |
371 | tsk->thread.trap_no = trapnr; | |
372 | ||
1da177e4 LT |
373 | if (regs->eflags & VM_MASK) { |
374 | if (vm86) | |
375 | goto vm86_trap; | |
376 | goto trap_signal; | |
377 | } | |
378 | ||
717b594a | 379 | if (!user_mode(regs)) |
1da177e4 LT |
380 | goto kernel_trap; |
381 | ||
382 | trap_signal: { | |
1da177e4 LT |
383 | if (info) |
384 | force_sig_info(signr, info, tsk); | |
385 | else | |
386 | force_sig(signr, tsk); | |
387 | return; | |
388 | } | |
389 | ||
390 | kernel_trap: { | |
391 | if (!fixup_exception(regs)) | |
392 | die(str, regs, error_code); | |
393 | return; | |
394 | } | |
395 | ||
396 | vm86_trap: { | |
397 | int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr); | |
398 | if (ret) goto trap_signal; | |
399 | return; | |
400 | } | |
401 | } | |
402 | ||
403 | #define DO_ERROR(trapnr, signr, str, name) \ | |
404 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
405 | { \ | |
406 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
407 | == NOTIFY_STOP) \ | |
408 | return; \ | |
409 | do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \ | |
410 | } | |
411 | ||
412 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ | |
413 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
414 | { \ | |
415 | siginfo_t info; \ | |
416 | info.si_signo = signr; \ | |
417 | info.si_errno = 0; \ | |
418 | info.si_code = sicode; \ | |
419 | info.si_addr = (void __user *)siaddr; \ | |
420 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
421 | == NOTIFY_STOP) \ | |
422 | return; \ | |
423 | do_trap(trapnr, signr, str, 0, regs, error_code, &info); \ | |
424 | } | |
425 | ||
426 | #define DO_VM86_ERROR(trapnr, signr, str, name) \ | |
427 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
428 | { \ | |
429 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
430 | == NOTIFY_STOP) \ | |
431 | return; \ | |
432 | do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \ | |
433 | } | |
434 | ||
435 | #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ | |
436 | fastcall void do_##name(struct pt_regs * regs, long error_code) \ | |
437 | { \ | |
438 | siginfo_t info; \ | |
439 | info.si_signo = signr; \ | |
440 | info.si_errno = 0; \ | |
441 | info.si_code = sicode; \ | |
442 | info.si_addr = (void __user *)siaddr; \ | |
443 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
444 | == NOTIFY_STOP) \ | |
445 | return; \ | |
446 | do_trap(trapnr, signr, str, 1, regs, error_code, &info); \ | |
447 | } | |
448 | ||
449 | DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip) | |
450 | #ifndef CONFIG_KPROBES | |
451 | DO_VM86_ERROR( 3, SIGTRAP, "int3", int3) | |
452 | #endif | |
453 | DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow) | |
454 | DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds) | |
455 | DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip) | |
456 | DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun) | |
457 | DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS) | |
458 | DO_ERROR(11, SIGBUS, "segment not present", segment_not_present) | |
459 | DO_ERROR(12, SIGBUS, "stack segment", stack_segment) | |
460 | DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0) | |
a879cbbb | 461 | DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0) |
1da177e4 | 462 | |
3d97ae5b PP |
463 | fastcall void __kprobes do_general_protection(struct pt_regs * regs, |
464 | long error_code) | |
1da177e4 LT |
465 | { |
466 | int cpu = get_cpu(); | |
467 | struct tss_struct *tss = &per_cpu(init_tss, cpu); | |
468 | struct thread_struct *thread = ¤t->thread; | |
469 | ||
470 | /* | |
471 | * Perform the lazy TSS's I/O bitmap copy. If the TSS has an | |
472 | * invalid offset set (the LAZY one) and the faulting thread has | |
473 | * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS | |
474 | * and we set the offset field correctly. Then we let the CPU to | |
475 | * restart the faulting instruction. | |
476 | */ | |
477 | if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY && | |
478 | thread->io_bitmap_ptr) { | |
479 | memcpy(tss->io_bitmap, thread->io_bitmap_ptr, | |
480 | thread->io_bitmap_max); | |
481 | /* | |
482 | * If the previously set map was extending to higher ports | |
483 | * than the current one, pad extra space with 0xff (no access). | |
484 | */ | |
485 | if (thread->io_bitmap_max < tss->io_bitmap_max) | |
486 | memset((char *) tss->io_bitmap + | |
487 | thread->io_bitmap_max, 0xff, | |
488 | tss->io_bitmap_max - thread->io_bitmap_max); | |
489 | tss->io_bitmap_max = thread->io_bitmap_max; | |
490 | tss->io_bitmap_base = IO_BITMAP_OFFSET; | |
491 | put_cpu(); | |
492 | return; | |
493 | } | |
494 | put_cpu(); | |
495 | ||
4f339ecb AN |
496 | current->thread.error_code = error_code; |
497 | current->thread.trap_no = 13; | |
498 | ||
1da177e4 LT |
499 | if (regs->eflags & VM_MASK) |
500 | goto gp_in_vm86; | |
501 | ||
717b594a | 502 | if (!user_mode(regs)) |
1da177e4 LT |
503 | goto gp_in_kernel; |
504 | ||
505 | current->thread.error_code = error_code; | |
506 | current->thread.trap_no = 13; | |
507 | force_sig(SIGSEGV, current); | |
508 | return; | |
509 | ||
510 | gp_in_vm86: | |
511 | local_irq_enable(); | |
512 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
513 | return; | |
514 | ||
515 | gp_in_kernel: | |
516 | if (!fixup_exception(regs)) { | |
517 | if (notify_die(DIE_GPF, "general protection fault", regs, | |
518 | error_code, 13, SIGSEGV) == NOTIFY_STOP) | |
519 | return; | |
520 | die("general protection fault", regs, error_code); | |
521 | } | |
522 | } | |
523 | ||
524 | static void mem_parity_error(unsigned char reason, struct pt_regs * regs) | |
525 | { | |
526 | printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n"); | |
527 | printk("You probably have a hardware problem with your RAM chips\n"); | |
528 | ||
529 | /* Clear and disable the memory parity error line. */ | |
530 | clear_mem_error(reason); | |
531 | } | |
532 | ||
533 | static void io_check_error(unsigned char reason, struct pt_regs * regs) | |
534 | { | |
535 | unsigned long i; | |
536 | ||
537 | printk("NMI: IOCK error (debug interrupt?)\n"); | |
538 | show_registers(regs); | |
539 | ||
540 | /* Re-enable the IOCK line, wait for a few seconds */ | |
541 | reason = (reason & 0xf) | 8; | |
542 | outb(reason, 0x61); | |
543 | i = 2000; | |
544 | while (--i) udelay(1000); | |
545 | reason &= ~8; | |
546 | outb(reason, 0x61); | |
547 | } | |
548 | ||
549 | static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs) | |
550 | { | |
551 | #ifdef CONFIG_MCA | |
552 | /* Might actually be able to figure out what the guilty party | |
553 | * is. */ | |
554 | if( MCA_bus ) { | |
555 | mca_handle_nmi(); | |
556 | return; | |
557 | } | |
558 | #endif | |
559 | printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | |
560 | reason, smp_processor_id()); | |
561 | printk("Dazed and confused, but trying to continue\n"); | |
562 | printk("Do you have a strange power saving mode enabled?\n"); | |
563 | } | |
564 | ||
565 | static DEFINE_SPINLOCK(nmi_print_lock); | |
566 | ||
567 | void die_nmi (struct pt_regs *regs, const char *msg) | |
568 | { | |
748f2edb GA |
569 | if (notify_die(DIE_NMIWATCHDOG, msg, regs, 0, 0, SIGINT) == |
570 | NOTIFY_STOP) | |
571 | return; | |
572 | ||
1da177e4 LT |
573 | spin_lock(&nmi_print_lock); |
574 | /* | |
575 | * We are in trouble anyway, lets at least try | |
576 | * to get a message out. | |
577 | */ | |
578 | bust_spinlocks(1); | |
579 | printk(msg); | |
580 | printk(" on CPU%d, eip %08lx, registers:\n", | |
581 | smp_processor_id(), regs->eip); | |
582 | show_registers(regs); | |
583 | printk("console shuts up ...\n"); | |
584 | console_silent(); | |
585 | spin_unlock(&nmi_print_lock); | |
586 | bust_spinlocks(0); | |
6e274d14 AN |
587 | |
588 | /* If we are in kernel we are probably nested up pretty bad | |
589 | * and might aswell get out now while we still can. | |
590 | */ | |
591 | if (!user_mode(regs)) { | |
592 | current->thread.trap_no = 2; | |
593 | crash_kexec(regs); | |
594 | } | |
595 | ||
1da177e4 LT |
596 | do_exit(SIGSEGV); |
597 | } | |
598 | ||
599 | static void default_do_nmi(struct pt_regs * regs) | |
600 | { | |
601 | unsigned char reason = 0; | |
602 | ||
603 | /* Only the BSP gets external NMIs from the system. */ | |
604 | if (!smp_processor_id()) | |
605 | reason = get_nmi_reason(); | |
606 | ||
607 | if (!(reason & 0xc0)) { | |
608 | if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT) | |
609 | == NOTIFY_STOP) | |
610 | return; | |
611 | #ifdef CONFIG_X86_LOCAL_APIC | |
612 | /* | |
613 | * Ok, so this is none of the documented NMI sources, | |
614 | * so it must be the NMI watchdog. | |
615 | */ | |
616 | if (nmi_watchdog) { | |
617 | nmi_watchdog_tick(regs); | |
618 | return; | |
619 | } | |
620 | #endif | |
621 | unknown_nmi_error(reason, regs); | |
622 | return; | |
623 | } | |
624 | if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP) | |
625 | return; | |
626 | if (reason & 0x80) | |
627 | mem_parity_error(reason, regs); | |
628 | if (reason & 0x40) | |
629 | io_check_error(reason, regs); | |
630 | /* | |
631 | * Reassert NMI in case it became active meanwhile | |
632 | * as it's edge-triggered. | |
633 | */ | |
634 | reassert_nmi(); | |
635 | } | |
636 | ||
637 | static int dummy_nmi_callback(struct pt_regs * regs, int cpu) | |
638 | { | |
639 | return 0; | |
640 | } | |
641 | ||
642 | static nmi_callback_t nmi_callback = dummy_nmi_callback; | |
643 | ||
644 | fastcall void do_nmi(struct pt_regs * regs, long error_code) | |
645 | { | |
646 | int cpu; | |
647 | ||
648 | nmi_enter(); | |
649 | ||
650 | cpu = smp_processor_id(); | |
f3705136 ZM |
651 | |
652 | #ifdef CONFIG_HOTPLUG_CPU | |
653 | if (!cpu_online(cpu)) { | |
654 | nmi_exit(); | |
655 | return; | |
656 | } | |
657 | #endif | |
658 | ||
1da177e4 LT |
659 | ++nmi_count(cpu); |
660 | ||
19306059 | 661 | if (!rcu_dereference(nmi_callback)(regs, cpu)) |
1da177e4 LT |
662 | default_do_nmi(regs); |
663 | ||
664 | nmi_exit(); | |
665 | } | |
666 | ||
667 | void set_nmi_callback(nmi_callback_t callback) | |
668 | { | |
19306059 | 669 | rcu_assign_pointer(nmi_callback, callback); |
1da177e4 | 670 | } |
129f6946 | 671 | EXPORT_SYMBOL_GPL(set_nmi_callback); |
1da177e4 LT |
672 | |
673 | void unset_nmi_callback(void) | |
674 | { | |
675 | nmi_callback = dummy_nmi_callback; | |
676 | } | |
129f6946 | 677 | EXPORT_SYMBOL_GPL(unset_nmi_callback); |
1da177e4 LT |
678 | |
679 | #ifdef CONFIG_KPROBES | |
3d97ae5b | 680 | fastcall void __kprobes do_int3(struct pt_regs *regs, long error_code) |
1da177e4 LT |
681 | { |
682 | if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP) | |
683 | == NOTIFY_STOP) | |
48c88211 | 684 | return; |
1da177e4 LT |
685 | /* This is an interrupt gate, because kprobes wants interrupts |
686 | disabled. Normal trap handlers don't. */ | |
687 | restore_interrupts(regs); | |
688 | do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL); | |
1da177e4 LT |
689 | } |
690 | #endif | |
691 | ||
692 | /* | |
693 | * Our handling of the processor debug registers is non-trivial. | |
694 | * We do not clear them on entry and exit from the kernel. Therefore | |
695 | * it is possible to get a watchpoint trap here from inside the kernel. | |
696 | * However, the code in ./ptrace.c has ensured that the user can | |
697 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
698 | * watchpoint trap can only occur in code which is reading/writing | |
699 | * from user space. Such code must not hold kernel locks (since it | |
700 | * can equally take a page fault), therefore it is safe to call | |
701 | * force_sig_info even though that claims and releases locks. | |
702 | * | |
703 | * Code in ./signal.c ensures that the debug control register | |
704 | * is restored before we deliver any signal, and therefore that | |
705 | * user code runs with the correct debug control register even though | |
706 | * we clear it here. | |
707 | * | |
708 | * Being careful here means that we don't have to be as careful in a | |
709 | * lot of more complicated places (task switching can be a bit lazy | |
710 | * about restoring all the debug state, and ptrace doesn't have to | |
711 | * find every occurrence of the TF bit that could be saved away even | |
712 | * by user code) | |
713 | */ | |
3d97ae5b | 714 | fastcall void __kprobes do_debug(struct pt_regs * regs, long error_code) |
1da177e4 LT |
715 | { |
716 | unsigned int condition; | |
717 | struct task_struct *tsk = current; | |
718 | ||
1cc6f12e | 719 | get_debugreg(condition, 6); |
1da177e4 LT |
720 | |
721 | if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code, | |
722 | SIGTRAP) == NOTIFY_STOP) | |
723 | return; | |
724 | /* It's safe to allow irq's after DR6 has been saved */ | |
725 | if (regs->eflags & X86_EFLAGS_IF) | |
726 | local_irq_enable(); | |
727 | ||
728 | /* Mask out spurious debug traps due to lazy DR7 setting */ | |
729 | if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) { | |
730 | if (!tsk->thread.debugreg[7]) | |
731 | goto clear_dr7; | |
732 | } | |
733 | ||
734 | if (regs->eflags & VM_MASK) | |
735 | goto debug_vm86; | |
736 | ||
737 | /* Save debug status register where ptrace can see it */ | |
738 | tsk->thread.debugreg[6] = condition; | |
739 | ||
740 | /* | |
741 | * Single-stepping through TF: make sure we ignore any events in | |
742 | * kernel space (but re-enable TF when returning to user mode). | |
743 | */ | |
744 | if (condition & DR_STEP) { | |
745 | /* | |
746 | * We already checked v86 mode above, so we can | |
747 | * check for kernel mode by just checking the CPL | |
748 | * of CS. | |
749 | */ | |
717b594a | 750 | if (!user_mode(regs)) |
1da177e4 LT |
751 | goto clear_TF_reenable; |
752 | } | |
753 | ||
754 | /* Ok, finally something we can handle */ | |
755 | send_sigtrap(tsk, regs, error_code); | |
756 | ||
757 | /* Disable additional traps. They'll be re-enabled when | |
758 | * the signal is delivered. | |
759 | */ | |
760 | clear_dr7: | |
1cc6f12e | 761 | set_debugreg(0, 7); |
1da177e4 LT |
762 | return; |
763 | ||
764 | debug_vm86: | |
765 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1); | |
766 | return; | |
767 | ||
768 | clear_TF_reenable: | |
769 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
770 | regs->eflags &= ~TF_MASK; | |
771 | return; | |
772 | } | |
773 | ||
774 | /* | |
775 | * Note that we play around with the 'TS' bit in an attempt to get | |
776 | * the correct behaviour even in the presence of the asynchronous | |
777 | * IRQ13 behaviour | |
778 | */ | |
779 | void math_error(void __user *eip) | |
780 | { | |
781 | struct task_struct * task; | |
782 | siginfo_t info; | |
783 | unsigned short cwd, swd; | |
784 | ||
785 | /* | |
786 | * Save the info for the exception handler and clear the error. | |
787 | */ | |
788 | task = current; | |
789 | save_init_fpu(task); | |
790 | task->thread.trap_no = 16; | |
791 | task->thread.error_code = 0; | |
792 | info.si_signo = SIGFPE; | |
793 | info.si_errno = 0; | |
794 | info.si_code = __SI_FAULT; | |
795 | info.si_addr = eip; | |
796 | /* | |
797 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
798 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
799 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
800 | * fault bit. We should only be taking one exception at a time, | |
801 | * so if this combination doesn't produce any single exception, | |
802 | * then we have a bad program that isn't syncronizing its FPU usage | |
803 | * and it will suffer the consequences since we won't be able to | |
804 | * fully reproduce the context of the exception | |
805 | */ | |
806 | cwd = get_fpu_cwd(task); | |
807 | swd = get_fpu_swd(task); | |
b1daec30 | 808 | switch (swd & ~cwd & 0x3f) { |
33333373 CE |
809 | case 0x000: /* No unmasked exception */ |
810 | return; | |
811 | default: /* Multiple exceptions */ | |
1da177e4 LT |
812 | break; |
813 | case 0x001: /* Invalid Op */ | |
b1daec30 CE |
814 | /* |
815 | * swd & 0x240 == 0x040: Stack Underflow | |
816 | * swd & 0x240 == 0x240: Stack Overflow | |
817 | * User must clear the SF bit (0x40) if set | |
818 | */ | |
1da177e4 | 819 | info.si_code = FPE_FLTINV; |
1da177e4 LT |
820 | break; |
821 | case 0x002: /* Denormalize */ | |
822 | case 0x010: /* Underflow */ | |
823 | info.si_code = FPE_FLTUND; | |
824 | break; | |
825 | case 0x004: /* Zero Divide */ | |
826 | info.si_code = FPE_FLTDIV; | |
827 | break; | |
828 | case 0x008: /* Overflow */ | |
829 | info.si_code = FPE_FLTOVF; | |
830 | break; | |
831 | case 0x020: /* Precision */ | |
832 | info.si_code = FPE_FLTRES; | |
833 | break; | |
834 | } | |
835 | force_sig_info(SIGFPE, &info, task); | |
836 | } | |
837 | ||
838 | fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code) | |
839 | { | |
840 | ignore_fpu_irq = 1; | |
841 | math_error((void __user *)regs->eip); | |
842 | } | |
843 | ||
844 | static void simd_math_error(void __user *eip) | |
845 | { | |
846 | struct task_struct * task; | |
847 | siginfo_t info; | |
848 | unsigned short mxcsr; | |
849 | ||
850 | /* | |
851 | * Save the info for the exception handler and clear the error. | |
852 | */ | |
853 | task = current; | |
854 | save_init_fpu(task); | |
855 | task->thread.trap_no = 19; | |
856 | task->thread.error_code = 0; | |
857 | info.si_signo = SIGFPE; | |
858 | info.si_errno = 0; | |
859 | info.si_code = __SI_FAULT; | |
860 | info.si_addr = eip; | |
861 | /* | |
862 | * The SIMD FPU exceptions are handled a little differently, as there | |
863 | * is only a single status/control register. Thus, to determine which | |
864 | * unmasked exception was caught we must mask the exception mask bits | |
865 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
866 | */ | |
867 | mxcsr = get_fpu_mxcsr(task); | |
868 | switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) { | |
869 | case 0x000: | |
870 | default: | |
871 | break; | |
872 | case 0x001: /* Invalid Op */ | |
873 | info.si_code = FPE_FLTINV; | |
874 | break; | |
875 | case 0x002: /* Denormalize */ | |
876 | case 0x010: /* Underflow */ | |
877 | info.si_code = FPE_FLTUND; | |
878 | break; | |
879 | case 0x004: /* Zero Divide */ | |
880 | info.si_code = FPE_FLTDIV; | |
881 | break; | |
882 | case 0x008: /* Overflow */ | |
883 | info.si_code = FPE_FLTOVF; | |
884 | break; | |
885 | case 0x020: /* Precision */ | |
886 | info.si_code = FPE_FLTRES; | |
887 | break; | |
888 | } | |
889 | force_sig_info(SIGFPE, &info, task); | |
890 | } | |
891 | ||
892 | fastcall void do_simd_coprocessor_error(struct pt_regs * regs, | |
893 | long error_code) | |
894 | { | |
895 | if (cpu_has_xmm) { | |
896 | /* Handle SIMD FPU exceptions on PIII+ processors. */ | |
897 | ignore_fpu_irq = 1; | |
898 | simd_math_error((void __user *)regs->eip); | |
899 | } else { | |
900 | /* | |
901 | * Handle strange cache flush from user space exception | |
902 | * in all other cases. This is undocumented behaviour. | |
903 | */ | |
904 | if (regs->eflags & VM_MASK) { | |
905 | handle_vm86_fault((struct kernel_vm86_regs *)regs, | |
906 | error_code); | |
907 | return; | |
908 | } | |
1da177e4 LT |
909 | current->thread.trap_no = 19; |
910 | current->thread.error_code = error_code; | |
4f339ecb | 911 | die_if_kernel("cache flush denied", regs, error_code); |
1da177e4 LT |
912 | force_sig(SIGSEGV, current); |
913 | } | |
914 | } | |
915 | ||
916 | fastcall void do_spurious_interrupt_bug(struct pt_regs * regs, | |
917 | long error_code) | |
918 | { | |
919 | #if 0 | |
920 | /* No need to warn about this any longer. */ | |
921 | printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); | |
922 | #endif | |
923 | } | |
924 | ||
925 | fastcall void setup_x86_bogus_stack(unsigned char * stk) | |
926 | { | |
927 | unsigned long *switch16_ptr, *switch32_ptr; | |
928 | struct pt_regs *regs; | |
929 | unsigned long stack_top, stack_bot; | |
930 | unsigned short iret_frame16_off; | |
931 | int cpu = smp_processor_id(); | |
932 | /* reserve the space on 32bit stack for the magic switch16 pointer */ | |
933 | memmove(stk, stk + 8, sizeof(struct pt_regs)); | |
934 | switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs)); | |
935 | regs = (struct pt_regs *)stk; | |
936 | /* now the switch32 on 16bit stack */ | |
937 | stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu); | |
938 | stack_top = stack_bot + CPU_16BIT_STACK_SIZE; | |
939 | switch32_ptr = (unsigned long *)(stack_top - 8); | |
940 | iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20; | |
941 | /* copy iret frame on 16bit stack */ | |
942 | memcpy((void *)(stack_bot + iret_frame16_off), ®s->eip, 20); | |
943 | /* fill in the switch pointers */ | |
944 | switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off; | |
945 | switch16_ptr[1] = __ESPFIX_SS; | |
946 | switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) + | |
947 | 8 - CPU_16BIT_STACK_SIZE; | |
948 | switch32_ptr[1] = __KERNEL_DS; | |
949 | } | |
950 | ||
951 | fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp) | |
952 | { | |
953 | unsigned long *switch32_ptr; | |
954 | unsigned char *stack16, *stack32; | |
955 | unsigned long stack_top, stack_bot; | |
956 | int len; | |
957 | int cpu = smp_processor_id(); | |
958 | stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu); | |
959 | stack_top = stack_bot + CPU_16BIT_STACK_SIZE; | |
960 | switch32_ptr = (unsigned long *)(stack_top - 8); | |
961 | /* copy the data from 16bit stack to 32bit stack */ | |
962 | len = CPU_16BIT_STACK_SIZE - 8 - sp; | |
963 | stack16 = (unsigned char *)(stack_bot + sp); | |
964 | stack32 = (unsigned char *) | |
965 | (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len); | |
966 | memcpy(stack32, stack16, len); | |
967 | return stack32; | |
968 | } | |
969 | ||
970 | /* | |
971 | * 'math_state_restore()' saves the current math information in the | |
972 | * old math state array, and gets the new ones from the current task | |
973 | * | |
974 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
975 | * Don't touch unless you *really* know how it works. | |
976 | * | |
977 | * Must be called with kernel preemption disabled (in this case, | |
978 | * local interrupts are disabled at the call-site in entry.S). | |
979 | */ | |
980 | asmlinkage void math_state_restore(struct pt_regs regs) | |
981 | { | |
982 | struct thread_info *thread = current_thread_info(); | |
983 | struct task_struct *tsk = thread->task; | |
984 | ||
985 | clts(); /* Allow maths ops (or we recurse) */ | |
986 | if (!tsk_used_math(tsk)) | |
987 | init_fpu(tsk); | |
988 | restore_fpu(tsk); | |
989 | thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */ | |
990 | } | |
991 | ||
992 | #ifndef CONFIG_MATH_EMULATION | |
993 | ||
994 | asmlinkage void math_emulate(long arg) | |
995 | { | |
996 | printk("math-emulation not enabled and no coprocessor found.\n"); | |
997 | printk("killing %s.\n",current->comm); | |
998 | force_sig(SIGFPE,current); | |
999 | schedule(); | |
1000 | } | |
1001 | ||
1002 | #endif /* CONFIG_MATH_EMULATION */ | |
1003 | ||
1004 | #ifdef CONFIG_X86_F00F_BUG | |
1005 | void __init trap_init_f00f_bug(void) | |
1006 | { | |
1007 | __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO); | |
1008 | ||
1009 | /* | |
1010 | * Update the IDT descriptor and reload the IDT so that | |
1011 | * it uses the read-only mapped virtual address. | |
1012 | */ | |
1013 | idt_descr.address = fix_to_virt(FIX_F00F_IDT); | |
4d37e7e3 | 1014 | load_idt(&idt_descr); |
1da177e4 LT |
1015 | } |
1016 | #endif | |
1017 | ||
1018 | #define _set_gate(gate_addr,type,dpl,addr,seg) \ | |
1019 | do { \ | |
1020 | int __d0, __d1; \ | |
1021 | __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \ | |
1022 | "movw %4,%%dx\n\t" \ | |
1023 | "movl %%eax,%0\n\t" \ | |
1024 | "movl %%edx,%1" \ | |
1025 | :"=m" (*((long *) (gate_addr))), \ | |
1026 | "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \ | |
1027 | :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \ | |
1028 | "3" ((char *) (addr)),"2" ((seg) << 16)); \ | |
1029 | } while (0) | |
1030 | ||
1031 | ||
1032 | /* | |
1033 | * This needs to use 'idt_table' rather than 'idt', and | |
1034 | * thus use the _nonmapped_ version of the IDT, as the | |
1035 | * Pentium F0 0F bugfix can have resulted in the mapped | |
1036 | * IDT being write-protected. | |
1037 | */ | |
1038 | void set_intr_gate(unsigned int n, void *addr) | |
1039 | { | |
1040 | _set_gate(idt_table+n,14,0,addr,__KERNEL_CS); | |
1041 | } | |
1042 | ||
1043 | /* | |
1044 | * This routine sets up an interrupt gate at directory privilege level 3. | |
1045 | */ | |
1046 | static inline void set_system_intr_gate(unsigned int n, void *addr) | |
1047 | { | |
1048 | _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS); | |
1049 | } | |
1050 | ||
1051 | static void __init set_trap_gate(unsigned int n, void *addr) | |
1052 | { | |
1053 | _set_gate(idt_table+n,15,0,addr,__KERNEL_CS); | |
1054 | } | |
1055 | ||
1056 | static void __init set_system_gate(unsigned int n, void *addr) | |
1057 | { | |
1058 | _set_gate(idt_table+n,15,3,addr,__KERNEL_CS); | |
1059 | } | |
1060 | ||
1061 | static void __init set_task_gate(unsigned int n, unsigned int gdt_entry) | |
1062 | { | |
1063 | _set_gate(idt_table+n,5,0,0,(gdt_entry<<3)); | |
1064 | } | |
1065 | ||
1066 | ||
1067 | void __init trap_init(void) | |
1068 | { | |
1069 | #ifdef CONFIG_EISA | |
1070 | void __iomem *p = ioremap(0x0FFFD9, 4); | |
1071 | if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) { | |
1072 | EISA_bus = 1; | |
1073 | } | |
1074 | iounmap(p); | |
1075 | #endif | |
1076 | ||
1077 | #ifdef CONFIG_X86_LOCAL_APIC | |
1078 | init_apic_mappings(); | |
1079 | #endif | |
1080 | ||
1081 | set_trap_gate(0,÷_error); | |
1082 | set_intr_gate(1,&debug); | |
1083 | set_intr_gate(2,&nmi); | |
1084 | set_system_intr_gate(3, &int3); /* int3-5 can be called from all */ | |
1085 | set_system_gate(4,&overflow); | |
1086 | set_system_gate(5,&bounds); | |
1087 | set_trap_gate(6,&invalid_op); | |
1088 | set_trap_gate(7,&device_not_available); | |
1089 | set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS); | |
1090 | set_trap_gate(9,&coprocessor_segment_overrun); | |
1091 | set_trap_gate(10,&invalid_TSS); | |
1092 | set_trap_gate(11,&segment_not_present); | |
1093 | set_trap_gate(12,&stack_segment); | |
1094 | set_trap_gate(13,&general_protection); | |
1095 | set_intr_gate(14,&page_fault); | |
1096 | set_trap_gate(15,&spurious_interrupt_bug); | |
1097 | set_trap_gate(16,&coprocessor_error); | |
1098 | set_trap_gate(17,&alignment_check); | |
1099 | #ifdef CONFIG_X86_MCE | |
1100 | set_trap_gate(18,&machine_check); | |
1101 | #endif | |
1102 | set_trap_gate(19,&simd_coprocessor_error); | |
1103 | ||
1104 | set_system_gate(SYSCALL_VECTOR,&system_call); | |
1105 | ||
1106 | /* | |
1107 | * Should be a barrier for any external CPU state. | |
1108 | */ | |
1109 | cpu_init(); | |
1110 | ||
1111 | trap_init_hook(); | |
1112 | } | |
1113 | ||
1114 | static int __init kstack_setup(char *s) | |
1115 | { | |
1116 | kstack_depth_to_print = simple_strtoul(s, NULL, 0); | |
1117 | return 0; | |
1118 | } | |
1119 | __setup("kstack=", kstack_setup); |