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1da177e4 LT |
1 | /* ----------------------------------------------------------------------- * |
2 | * | |
3 | * Copyright 2000 H. Peter Anvin - All Rights Reserved | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139, | |
8 | * USA; either version 2 of the License, or (at your option) any later | |
9 | * version; incorporated herein by reference. | |
10 | * | |
11 | * ----------------------------------------------------------------------- */ | |
12 | ||
13 | /* | |
14 | * msr.c | |
15 | * | |
16 | * x86 MSR access device | |
17 | * | |
18 | * This device is accessed by lseek() to the appropriate register number | |
19 | * and then read/write in chunks of 8 bytes. A larger size means multiple | |
20 | * reads or writes of the same register. | |
21 | * | |
22 | * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on | |
23 | * an SMP box will direct the access to CPU %d. | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/config.h> | |
28 | ||
29 | #include <linux/types.h> | |
30 | #include <linux/errno.h> | |
31 | #include <linux/fcntl.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/poll.h> | |
34 | #include <linux/smp.h> | |
35 | #include <linux/smp_lock.h> | |
36 | #include <linux/major.h> | |
37 | #include <linux/fs.h> | |
38 | #include <linux/device.h> | |
39 | #include <linux/cpu.h> | |
40 | #include <linux/notifier.h> | |
41 | ||
42 | #include <asm/processor.h> | |
43 | #include <asm/msr.h> | |
44 | #include <asm/uaccess.h> | |
45 | #include <asm/system.h> | |
46 | ||
8874b414 | 47 | static struct class *msr_class; |
1da177e4 | 48 | |
1da177e4 LT |
49 | static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx) |
50 | { | |
51 | int err; | |
52 | ||
f2ab4461 ZA |
53 | err = wrmsr_safe(reg, eax, edx); |
54 | if (err) | |
55 | err = -EIO; | |
1da177e4 LT |
56 | return err; |
57 | } | |
58 | ||
59 | static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx) | |
60 | { | |
61 | int err; | |
62 | ||
f2ab4461 ZA |
63 | err = rdmsr_safe(reg, eax, edx); |
64 | if (err) | |
65 | err = -EIO; | |
1da177e4 LT |
66 | return err; |
67 | } | |
68 | ||
69 | #ifdef CONFIG_SMP | |
70 | ||
71 | struct msr_command { | |
72 | int cpu; | |
73 | int err; | |
74 | u32 reg; | |
75 | u32 data[2]; | |
76 | }; | |
77 | ||
78 | static void msr_smp_wrmsr(void *cmd_block) | |
79 | { | |
80 | struct msr_command *cmd = (struct msr_command *)cmd_block; | |
81 | ||
82 | if (cmd->cpu == smp_processor_id()) | |
83 | cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]); | |
84 | } | |
85 | ||
86 | static void msr_smp_rdmsr(void *cmd_block) | |
87 | { | |
88 | struct msr_command *cmd = (struct msr_command *)cmd_block; | |
89 | ||
90 | if (cmd->cpu == smp_processor_id()) | |
91 | cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]); | |
92 | } | |
93 | ||
94 | static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) | |
95 | { | |
96 | struct msr_command cmd; | |
97 | int ret; | |
98 | ||
99 | preempt_disable(); | |
100 | if (cpu == smp_processor_id()) { | |
101 | ret = wrmsr_eio(reg, eax, edx); | |
102 | } else { | |
103 | cmd.cpu = cpu; | |
104 | cmd.reg = reg; | |
105 | cmd.data[0] = eax; | |
106 | cmd.data[1] = edx; | |
107 | ||
108 | smp_call_function(msr_smp_wrmsr, &cmd, 1, 1); | |
109 | ret = cmd.err; | |
110 | } | |
111 | preempt_enable(); | |
112 | return ret; | |
113 | } | |
114 | ||
115 | static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx) | |
116 | { | |
117 | struct msr_command cmd; | |
118 | int ret; | |
119 | ||
120 | preempt_disable(); | |
121 | if (cpu == smp_processor_id()) { | |
122 | ret = rdmsr_eio(reg, eax, edx); | |
123 | } else { | |
124 | cmd.cpu = cpu; | |
125 | cmd.reg = reg; | |
126 | ||
127 | smp_call_function(msr_smp_rdmsr, &cmd, 1, 1); | |
128 | ||
129 | *eax = cmd.data[0]; | |
130 | *edx = cmd.data[1]; | |
131 | ||
132 | ret = cmd.err; | |
133 | } | |
134 | preempt_enable(); | |
135 | return ret; | |
136 | } | |
137 | ||
138 | #else /* ! CONFIG_SMP */ | |
139 | ||
140 | static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) | |
141 | { | |
142 | return wrmsr_eio(reg, eax, edx); | |
143 | } | |
144 | ||
145 | static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx) | |
146 | { | |
147 | return rdmsr_eio(reg, eax, edx); | |
148 | } | |
149 | ||
150 | #endif /* ! CONFIG_SMP */ | |
151 | ||
152 | static loff_t msr_seek(struct file *file, loff_t offset, int orig) | |
153 | { | |
154 | loff_t ret = -EINVAL; | |
155 | ||
156 | lock_kernel(); | |
157 | switch (orig) { | |
158 | case 0: | |
159 | file->f_pos = offset; | |
160 | ret = file->f_pos; | |
161 | break; | |
162 | case 1: | |
163 | file->f_pos += offset; | |
164 | ret = file->f_pos; | |
165 | } | |
166 | unlock_kernel(); | |
167 | return ret; | |
168 | } | |
169 | ||
170 | static ssize_t msr_read(struct file *file, char __user * buf, | |
171 | size_t count, loff_t * ppos) | |
172 | { | |
173 | u32 __user *tmp = (u32 __user *) buf; | |
174 | u32 data[2]; | |
1da177e4 LT |
175 | u32 reg = *ppos; |
176 | int cpu = iminor(file->f_dentry->d_inode); | |
177 | int err; | |
178 | ||
179 | if (count % 8) | |
180 | return -EINVAL; /* Invalid chunk size */ | |
181 | ||
6926d570 | 182 | for (; count; count -= 8) { |
1da177e4 LT |
183 | err = do_rdmsr(cpu, reg, &data[0], &data[1]); |
184 | if (err) | |
185 | return err; | |
186 | if (copy_to_user(tmp, &data, 8)) | |
187 | return -EFAULT; | |
188 | tmp += 2; | |
189 | } | |
190 | ||
191 | return ((char __user *)tmp) - buf; | |
192 | } | |
193 | ||
194 | static ssize_t msr_write(struct file *file, const char __user *buf, | |
195 | size_t count, loff_t *ppos) | |
196 | { | |
197 | const u32 __user *tmp = (const u32 __user *)buf; | |
198 | u32 data[2]; | |
199 | size_t rv; | |
200 | u32 reg = *ppos; | |
201 | int cpu = iminor(file->f_dentry->d_inode); | |
202 | int err; | |
203 | ||
204 | if (count % 8) | |
205 | return -EINVAL; /* Invalid chunk size */ | |
206 | ||
207 | for (rv = 0; count; count -= 8) { | |
208 | if (copy_from_user(&data, tmp, 8)) | |
209 | return -EFAULT; | |
210 | err = do_wrmsr(cpu, reg, data[0], data[1]); | |
211 | if (err) | |
212 | return err; | |
213 | tmp += 2; | |
214 | } | |
215 | ||
216 | return ((char __user *)tmp) - buf; | |
217 | } | |
218 | ||
219 | static int msr_open(struct inode *inode, struct file *file) | |
220 | { | |
221 | unsigned int cpu = iminor(file->f_dentry->d_inode); | |
222 | struct cpuinfo_x86 *c = &(cpu_data)[cpu]; | |
223 | ||
224 | if (cpu >= NR_CPUS || !cpu_online(cpu)) | |
225 | return -ENXIO; /* No such CPU */ | |
226 | if (!cpu_has(c, X86_FEATURE_MSR)) | |
227 | return -EIO; /* MSR not supported */ | |
228 | ||
229 | return 0; | |
230 | } | |
231 | ||
232 | /* | |
233 | * File operations we support | |
234 | */ | |
235 | static struct file_operations msr_fops = { | |
236 | .owner = THIS_MODULE, | |
237 | .llseek = msr_seek, | |
238 | .read = msr_read, | |
239 | .write = msr_write, | |
240 | .open = msr_open, | |
241 | }; | |
242 | ||
8874b414 | 243 | static int msr_class_device_create(int i) |
1da177e4 LT |
244 | { |
245 | int err = 0; | |
246 | struct class_device *class_err; | |
247 | ||
53f46542 | 248 | class_err = class_device_create(msr_class, NULL, MKDEV(MSR_MAJOR, i), NULL, "msr%d",i); |
1da177e4 LT |
249 | if (IS_ERR(class_err)) |
250 | err = PTR_ERR(class_err); | |
251 | return err; | |
252 | } | |
253 | ||
efe87d2b | 254 | static int msr_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) |
1da177e4 LT |
255 | { |
256 | unsigned int cpu = (unsigned long)hcpu; | |
257 | ||
258 | switch (action) { | |
259 | case CPU_ONLINE: | |
8874b414 | 260 | msr_class_device_create(cpu); |
1da177e4 LT |
261 | break; |
262 | case CPU_DEAD: | |
8874b414 | 263 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); |
1da177e4 LT |
264 | break; |
265 | } | |
266 | return NOTIFY_OK; | |
267 | } | |
268 | ||
74b85f37 | 269 | static struct notifier_block __cpuinitdata msr_class_cpu_notifier = |
1da177e4 LT |
270 | { |
271 | .notifier_call = msr_class_cpu_callback, | |
272 | }; | |
273 | ||
274 | static int __init msr_init(void) | |
275 | { | |
276 | int i, err = 0; | |
277 | i = 0; | |
278 | ||
279 | if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) { | |
280 | printk(KERN_ERR "msr: unable to get major %d for msr\n", | |
281 | MSR_MAJOR); | |
282 | err = -EBUSY; | |
283 | goto out; | |
284 | } | |
8874b414 | 285 | msr_class = class_create(THIS_MODULE, "msr"); |
1da177e4 LT |
286 | if (IS_ERR(msr_class)) { |
287 | err = PTR_ERR(msr_class); | |
288 | goto out_chrdev; | |
289 | } | |
290 | for_each_online_cpu(i) { | |
8874b414 | 291 | err = msr_class_device_create(i); |
1da177e4 LT |
292 | if (err != 0) |
293 | goto out_class; | |
294 | } | |
295 | register_cpu_notifier(&msr_class_cpu_notifier); | |
296 | ||
297 | err = 0; | |
298 | goto out; | |
299 | ||
300 | out_class: | |
301 | i = 0; | |
302 | for_each_online_cpu(i) | |
8874b414 | 303 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, i)); |
304 | class_destroy(msr_class); | |
1da177e4 LT |
305 | out_chrdev: |
306 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); | |
307 | out: | |
308 | return err; | |
309 | } | |
310 | ||
311 | static void __exit msr_exit(void) | |
312 | { | |
313 | int cpu = 0; | |
314 | for_each_online_cpu(cpu) | |
8874b414 | 315 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); |
316 | class_destroy(msr_class); | |
1da177e4 LT |
317 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); |
318 | unregister_cpu_notifier(&msr_class_cpu_notifier); | |
319 | } | |
320 | ||
321 | module_init(msr_init); | |
322 | module_exit(msr_exit) | |
323 | ||
324 | MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>"); | |
325 | MODULE_DESCRIPTION("x86 generic MSR driver"); | |
326 | MODULE_LICENSE("GPL"); |