Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Pentium 4/Xeon CPU on demand clock modulation/speed scaling | |
3 | * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> | |
4 | * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com> | |
5 | * (C) 2002 Arjan van de Ven <arjanv@redhat.com> | |
6 | * (C) 2002 Tora T. Engstad | |
7 | * All Rights Reserved | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | * | |
14 | * The author(s) of this software shall not be held liable for damages | |
15 | * of any nature resulting due to the use of this software. This | |
16 | * software is provided AS-IS with no warranties. | |
32ee8c3e | 17 | * |
1da177e4 LT |
18 | * Date Errata Description |
19 | * 20020525 N44, O17 12.5% or 25% DC causes lockup | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 | 23 | #include <linux/kernel.h> |
32ee8c3e | 24 | #include <linux/module.h> |
1da177e4 LT |
25 | #include <linux/init.h> |
26 | #include <linux/smp.h> | |
27 | #include <linux/cpufreq.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/cpumask.h> | |
4e57b681 | 30 | #include <linux/sched.h> /* current / set_cpus_allowed() */ |
1da177e4 | 31 | |
32ee8c3e | 32 | #include <asm/processor.h> |
1da177e4 LT |
33 | #include <asm/msr.h> |
34 | #include <asm/timex.h> | |
35 | ||
36 | #include "speedstep-lib.h" | |
37 | ||
38 | #define PFX "p4-clockmod: " | |
39 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "p4-clockmod", msg) | |
40 | ||
41 | /* | |
42 | * Duty Cycle (3bits), note DC_DISABLE is not specified in | |
43 | * intel docs i just use it to mean disable | |
44 | */ | |
45 | enum { | |
46 | DC_RESV, DC_DFLT, DC_25PT, DC_38PT, DC_50PT, | |
47 | DC_64PT, DC_75PT, DC_88PT, DC_DISABLE | |
48 | }; | |
49 | ||
50 | #define DC_ENTRIES 8 | |
51 | ||
52 | ||
53 | static int has_N44_O17_errata[NR_CPUS]; | |
c70ca00f | 54 | static int has_N60_errata[NR_CPUS]; |
1da177e4 LT |
55 | static unsigned int stock_freq; |
56 | static struct cpufreq_driver p4clockmod_driver; | |
57 | static unsigned int cpufreq_p4_get(unsigned int cpu); | |
58 | ||
59 | static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate) | |
60 | { | |
61 | u32 l, h; | |
62 | ||
63 | if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV)) | |
64 | return -EINVAL; | |
65 | ||
66 | rdmsr(MSR_IA32_THERM_STATUS, l, h); | |
67 | ||
68 | if (l & 0x01) | |
69 | dprintk("CPU#%d currently thermal throttled\n", cpu); | |
70 | ||
71 | if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT)) | |
72 | newstate = DC_38PT; | |
73 | ||
74 | rdmsr(MSR_IA32_THERM_CONTROL, l, h); | |
75 | if (newstate == DC_DISABLE) { | |
76 | dprintk("CPU#%d disabling modulation\n", cpu); | |
77 | wrmsr(MSR_IA32_THERM_CONTROL, l & ~(1<<4), h); | |
78 | } else { | |
79 | dprintk("CPU#%d setting duty cycle to %d%%\n", | |
80 | cpu, ((125 * newstate) / 10)); | |
32ee8c3e | 81 | /* bits 63 - 5 : reserved |
1da177e4 LT |
82 | * bit 4 : enable/disable |
83 | * bits 3-1 : duty cycle | |
84 | * bit 0 : reserved | |
85 | */ | |
86 | l = (l & ~14); | |
87 | l = l | (1<<4) | ((newstate & 0x7)<<1); | |
88 | wrmsr(MSR_IA32_THERM_CONTROL, l, h); | |
89 | } | |
90 | ||
91 | return 0; | |
92 | } | |
93 | ||
94 | ||
95 | static struct cpufreq_frequency_table p4clockmod_table[] = { | |
96 | {DC_RESV, CPUFREQ_ENTRY_INVALID}, | |
97 | {DC_DFLT, 0}, | |
98 | {DC_25PT, 0}, | |
99 | {DC_38PT, 0}, | |
100 | {DC_50PT, 0}, | |
101 | {DC_64PT, 0}, | |
102 | {DC_75PT, 0}, | |
103 | {DC_88PT, 0}, | |
104 | {DC_DISABLE, 0}, | |
105 | {DC_RESV, CPUFREQ_TABLE_END}, | |
106 | }; | |
107 | ||
108 | ||
109 | static int cpufreq_p4_target(struct cpufreq_policy *policy, | |
110 | unsigned int target_freq, | |
111 | unsigned int relation) | |
112 | { | |
113 | unsigned int newstate = DC_RESV; | |
114 | struct cpufreq_freqs freqs; | |
115 | cpumask_t cpus_allowed; | |
116 | int i; | |
117 | ||
118 | if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate)) | |
119 | return -EINVAL; | |
120 | ||
121 | freqs.old = cpufreq_p4_get(policy->cpu); | |
122 | freqs.new = stock_freq * p4clockmod_table[newstate].index / 8; | |
123 | ||
124 | if (freqs.new == freqs.old) | |
125 | return 0; | |
126 | ||
127 | /* notifiers */ | |
128 | for_each_cpu_mask(i, policy->cpus) { | |
129 | freqs.cpu = i; | |
130 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
131 | } | |
132 | ||
133 | /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software | |
32ee8c3e | 134 | * Developer's Manual, Volume 3 |
1da177e4 LT |
135 | */ |
136 | cpus_allowed = current->cpus_allowed; | |
137 | ||
138 | for_each_cpu_mask(i, policy->cpus) { | |
139 | cpumask_t this_cpu = cpumask_of_cpu(i); | |
140 | ||
141 | set_cpus_allowed(current, this_cpu); | |
142 | BUG_ON(smp_processor_id() != i); | |
143 | ||
144 | cpufreq_p4_setdc(i, p4clockmod_table[newstate].index); | |
145 | } | |
146 | set_cpus_allowed(current, cpus_allowed); | |
147 | ||
148 | /* notifiers */ | |
149 | for_each_cpu_mask(i, policy->cpus) { | |
150 | freqs.cpu = i; | |
151 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
152 | } | |
153 | ||
154 | return 0; | |
155 | } | |
156 | ||
157 | ||
158 | static int cpufreq_p4_verify(struct cpufreq_policy *policy) | |
159 | { | |
160 | return cpufreq_frequency_table_verify(policy, &p4clockmod_table[0]); | |
161 | } | |
162 | ||
163 | ||
164 | static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c) | |
165 | { | |
166 | if ((c->x86 == 0x06) && (c->x86_model == 0x09)) { | |
167 | /* Pentium M (Banias) */ | |
168 | printk(KERN_WARNING PFX "Warning: Pentium M detected. " | |
169 | "The speedstep_centrino module offers voltage scaling" | |
170 | " in addition of frequency scaling. You should use " | |
171 | "that instead of p4-clockmod, if possible.\n"); | |
172 | return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM); | |
173 | } | |
174 | ||
175 | if ((c->x86 == 0x06) && (c->x86_model == 0x0D)) { | |
176 | /* Pentium M (Dothan) */ | |
177 | printk(KERN_WARNING PFX "Warning: Pentium M detected. " | |
178 | "The speedstep_centrino module offers voltage scaling" | |
179 | " in addition of frequency scaling. You should use " | |
180 | "that instead of p4-clockmod, if possible.\n"); | |
181 | /* on P-4s, the TSC runs with constant frequency independent whether | |
182 | * throttling is active or not. */ | |
183 | p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS; | |
184 | return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM); | |
185 | } | |
186 | ||
187 | if (c->x86 != 0xF) { | |
188 | printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <linux@brodo.de>\n"); | |
189 | return 0; | |
190 | } | |
191 | ||
192 | /* on P-4s, the TSC runs with constant frequency independent whether | |
193 | * throttling is active or not. */ | |
194 | p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS; | |
195 | ||
196 | if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) { | |
197 | printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. " | |
198 | "The speedstep-ich or acpi cpufreq modules offer " | |
199 | "voltage scaling in addition of frequency scaling. " | |
200 | "You should use either one instead of p4-clockmod, " | |
201 | "if possible.\n"); | |
202 | return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M); | |
203 | } | |
204 | ||
205 | return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D); | |
206 | } | |
207 | ||
32ee8c3e | 208 | |
1da177e4 LT |
209 | |
210 | static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy) | |
211 | { | |
212 | struct cpuinfo_x86 *c = &cpu_data[policy->cpu]; | |
213 | int cpuid = 0; | |
214 | unsigned int i; | |
215 | ||
216 | #ifdef CONFIG_SMP | |
217 | policy->cpus = cpu_sibling_map[policy->cpu]; | |
218 | #endif | |
219 | ||
220 | /* Errata workaround */ | |
221 | cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask; | |
222 | switch (cpuid) { | |
223 | case 0x0f07: | |
224 | case 0x0f0a: | |
225 | case 0x0f11: | |
226 | case 0x0f12: | |
227 | has_N44_O17_errata[policy->cpu] = 1; | |
228 | dprintk("has errata -- disabling low frequencies\n"); | |
c70ca00f BC |
229 | break; |
230 | ||
231 | case 0x0f29: | |
232 | has_N60_errata[policy->cpu] = 1; | |
233 | dprintk("has errata -- disabling frequencies lower than 2ghz\n"); | |
234 | break; | |
1da177e4 | 235 | } |
32ee8c3e | 236 | |
1da177e4 LT |
237 | /* get max frequency */ |
238 | stock_freq = cpufreq_p4_get_frequency(c); | |
239 | if (!stock_freq) | |
240 | return -EINVAL; | |
241 | ||
242 | /* table init */ | |
243 | for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) { | |
244 | if ((i<2) && (has_N44_O17_errata[policy->cpu])) | |
245 | p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
6d373ea0 | 246 | else if (has_N60_errata[policy->cpu] && ((stock_freq * i)/8) < 2000000) |
c70ca00f | 247 | p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID; |
1da177e4 LT |
248 | else |
249 | p4clockmod_table[i].frequency = (stock_freq * i)/8; | |
250 | } | |
251 | cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu); | |
32ee8c3e | 252 | |
1da177e4 LT |
253 | /* cpuinfo and default policy values */ |
254 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
255 | policy->cpuinfo.transition_latency = 1000000; /* assumed */ | |
256 | policy->cur = stock_freq; | |
257 | ||
258 | return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]); | |
259 | } | |
260 | ||
261 | ||
262 | static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy) | |
263 | { | |
32ee8c3e | 264 | cpufreq_frequency_table_put_attr(policy->cpu); |
1da177e4 LT |
265 | return 0; |
266 | } | |
267 | ||
268 | static unsigned int cpufreq_p4_get(unsigned int cpu) | |
269 | { | |
270 | cpumask_t cpus_allowed; | |
271 | u32 l, h; | |
272 | ||
273 | cpus_allowed = current->cpus_allowed; | |
274 | ||
275 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
276 | BUG_ON(smp_processor_id() != cpu); | |
277 | ||
278 | rdmsr(MSR_IA32_THERM_CONTROL, l, h); | |
279 | ||
280 | set_cpus_allowed(current, cpus_allowed); | |
281 | ||
282 | if (l & 0x10) { | |
283 | l = l >> 1; | |
284 | l &= 0x7; | |
285 | } else | |
286 | l = DC_DISABLE; | |
287 | ||
288 | if (l != DC_DISABLE) | |
289 | return (stock_freq * l / 8); | |
290 | ||
291 | return stock_freq; | |
292 | } | |
293 | ||
294 | static struct freq_attr* p4clockmod_attr[] = { | |
295 | &cpufreq_freq_attr_scaling_available_freqs, | |
296 | NULL, | |
297 | }; | |
298 | ||
299 | static struct cpufreq_driver p4clockmod_driver = { | |
32ee8c3e | 300 | .verify = cpufreq_p4_verify, |
1da177e4 LT |
301 | .target = cpufreq_p4_target, |
302 | .init = cpufreq_p4_cpu_init, | |
303 | .exit = cpufreq_p4_cpu_exit, | |
304 | .get = cpufreq_p4_get, | |
305 | .name = "p4-clockmod", | |
306 | .owner = THIS_MODULE, | |
307 | .attr = p4clockmod_attr, | |
308 | }; | |
309 | ||
310 | ||
311 | static int __init cpufreq_p4_init(void) | |
32ee8c3e | 312 | { |
1da177e4 LT |
313 | struct cpuinfo_x86 *c = cpu_data; |
314 | int ret; | |
315 | ||
316 | /* | |
32ee8c3e | 317 | * THERM_CONTROL is architectural for IA32 now, so |
1da177e4 LT |
318 | * we can rely on the capability checks |
319 | */ | |
320 | if (c->x86_vendor != X86_VENDOR_INTEL) | |
321 | return -ENODEV; | |
322 | ||
323 | if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) || | |
324 | !test_bit(X86_FEATURE_ACC, c->x86_capability)) | |
325 | return -ENODEV; | |
326 | ||
327 | ret = cpufreq_register_driver(&p4clockmod_driver); | |
328 | if (!ret) | |
329 | printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n"); | |
330 | ||
331 | return (ret); | |
332 | } | |
333 | ||
334 | ||
335 | static void __exit cpufreq_p4_exit(void) | |
336 | { | |
337 | cpufreq_unregister_driver(&p4clockmod_driver); | |
338 | } | |
339 | ||
340 | ||
341 | MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>"); | |
342 | MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)"); | |
343 | MODULE_LICENSE ("GPL"); | |
344 | ||
345 | late_initcall(cpufreq_p4_init); | |
346 | module_exit(cpufreq_p4_exit); |