Commit | Line | Data |
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1da177e4 | 1 | /* |
fe27cb35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $) |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
8adcc0c6 | 35 | #include <linux/dmi.h> |
1da177e4 LT |
36 | |
37 | #include <linux/acpi.h> | |
38 | #include <acpi/processor.h> | |
39 | ||
fe27cb35 | 40 | #include <asm/io.h> |
dde9f7ba | 41 | #include <asm/msr.h> |
fe27cb35 VP |
42 | #include <asm/processor.h> |
43 | #include <asm/cpufeature.h> | |
44 | #include <asm/delay.h> | |
45 | #include <asm/uaccess.h> | |
46 | ||
1da177e4 LT |
47 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg) |
48 | ||
49 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); | |
50 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
51 | MODULE_LICENSE("GPL"); | |
52 | ||
dde9f7ba VP |
53 | enum { |
54 | UNDEFINED_CAPABLE = 0, | |
55 | SYSTEM_INTEL_MSR_CAPABLE, | |
56 | SYSTEM_IO_CAPABLE, | |
57 | }; | |
58 | ||
59 | #define INTEL_MSR_RANGE (0xffff) | |
dfde5d62 | 60 | #define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1) |
dde9f7ba | 61 | |
fe27cb35 | 62 | struct acpi_cpufreq_data { |
64be7eed VP |
63 | struct acpi_processor_performance *acpi_data; |
64 | struct cpufreq_frequency_table *freq_table; | |
dfde5d62 | 65 | unsigned int max_freq; |
64be7eed VP |
66 | unsigned int resume; |
67 | unsigned int cpu_feature; | |
1da177e4 LT |
68 | }; |
69 | ||
64be7eed VP |
70 | static struct acpi_cpufreq_data *drv_data[NR_CPUS]; |
71 | static struct acpi_processor_performance *acpi_perf_data[NR_CPUS]; | |
1da177e4 LT |
72 | |
73 | static struct cpufreq_driver acpi_cpufreq_driver; | |
74 | ||
d395bf12 VP |
75 | static unsigned int acpi_pstate_strict; |
76 | ||
dde9f7ba VP |
77 | static int check_est_cpu(unsigned int cpuid) |
78 | { | |
79 | struct cpuinfo_x86 *cpu = &cpu_data[cpuid]; | |
80 | ||
81 | if (cpu->x86_vendor != X86_VENDOR_INTEL || | |
64be7eed | 82 | !cpu_has(cpu, X86_FEATURE_EST)) |
dde9f7ba VP |
83 | return 0; |
84 | ||
85 | return 1; | |
86 | } | |
87 | ||
dde9f7ba | 88 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
fe27cb35 | 89 | { |
64be7eed VP |
90 | struct acpi_processor_performance *perf; |
91 | int i; | |
fe27cb35 VP |
92 | |
93 | perf = data->acpi_data; | |
94 | ||
95dd7227 | 95 | for (i=0; i<perf->state_count; i++) { |
fe27cb35 VP |
96 | if (value == perf->states[i].status) |
97 | return data->freq_table[i].frequency; | |
98 | } | |
99 | return 0; | |
100 | } | |
101 | ||
dde9f7ba VP |
102 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
103 | { | |
104 | int i; | |
a6f6e6e6 | 105 | struct acpi_processor_performance *perf; |
dde9f7ba VP |
106 | |
107 | msr &= INTEL_MSR_RANGE; | |
a6f6e6e6 VP |
108 | perf = data->acpi_data; |
109 | ||
95dd7227 | 110 | for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { |
a6f6e6e6 | 111 | if (msr == perf->states[data->freq_table[i].index].status) |
dde9f7ba VP |
112 | return data->freq_table[i].frequency; |
113 | } | |
114 | return data->freq_table[0].frequency; | |
115 | } | |
116 | ||
dde9f7ba VP |
117 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) |
118 | { | |
119 | switch (data->cpu_feature) { | |
64be7eed | 120 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba | 121 | return extract_msr(val, data); |
64be7eed | 122 | case SYSTEM_IO_CAPABLE: |
dde9f7ba | 123 | return extract_io(val, data); |
64be7eed | 124 | default: |
dde9f7ba VP |
125 | return 0; |
126 | } | |
127 | } | |
128 | ||
fe27cb35 | 129 | static void wrport(u16 port, u8 bit_width, u32 value) |
1da177e4 | 130 | { |
95dd7227 | 131 | if (bit_width <= 8) |
1da177e4 | 132 | outb(value, port); |
95dd7227 | 133 | else if (bit_width <= 16) |
1da177e4 | 134 | outw(value, port); |
95dd7227 | 135 | else if (bit_width <= 32) |
1da177e4 | 136 | outl(value, port); |
1da177e4 LT |
137 | } |
138 | ||
64be7eed | 139 | static void rdport(u16 port, u8 bit_width, u32 * ret) |
1da177e4 LT |
140 | { |
141 | *ret = 0; | |
95dd7227 | 142 | if (bit_width <= 8) |
1da177e4 | 143 | *ret = inb(port); |
95dd7227 | 144 | else if (bit_width <= 16) |
1da177e4 | 145 | *ret = inw(port); |
95dd7227 | 146 | else if (bit_width <= 32) |
1da177e4 | 147 | *ret = inl(port); |
1da177e4 LT |
148 | } |
149 | ||
dde9f7ba VP |
150 | struct msr_addr { |
151 | u32 reg; | |
152 | }; | |
153 | ||
fe27cb35 VP |
154 | struct io_addr { |
155 | u16 port; | |
156 | u8 bit_width; | |
157 | }; | |
158 | ||
dde9f7ba VP |
159 | typedef union { |
160 | struct msr_addr msr; | |
161 | struct io_addr io; | |
162 | } drv_addr_union; | |
163 | ||
fe27cb35 | 164 | struct drv_cmd { |
dde9f7ba | 165 | unsigned int type; |
fe27cb35 | 166 | cpumask_t mask; |
dde9f7ba | 167 | drv_addr_union addr; |
fe27cb35 VP |
168 | u32 val; |
169 | }; | |
170 | ||
171 | static void do_drv_read(struct drv_cmd *cmd) | |
1da177e4 | 172 | { |
dde9f7ba VP |
173 | u32 h; |
174 | ||
175 | switch (cmd->type) { | |
64be7eed | 176 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
177 | rdmsr(cmd->addr.msr.reg, cmd->val, h); |
178 | break; | |
64be7eed | 179 | case SYSTEM_IO_CAPABLE: |
dde9f7ba VP |
180 | rdport(cmd->addr.io.port, cmd->addr.io.bit_width, &cmd->val); |
181 | break; | |
64be7eed | 182 | default: |
dde9f7ba VP |
183 | break; |
184 | } | |
fe27cb35 | 185 | } |
1da177e4 | 186 | |
fe27cb35 VP |
187 | static void do_drv_write(struct drv_cmd *cmd) |
188 | { | |
dde9f7ba VP |
189 | u32 h = 0; |
190 | ||
191 | switch (cmd->type) { | |
64be7eed | 192 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
193 | wrmsr(cmd->addr.msr.reg, cmd->val, h); |
194 | break; | |
64be7eed | 195 | case SYSTEM_IO_CAPABLE: |
dde9f7ba VP |
196 | wrport(cmd->addr.io.port, cmd->addr.io.bit_width, cmd->val); |
197 | break; | |
64be7eed | 198 | default: |
dde9f7ba VP |
199 | break; |
200 | } | |
fe27cb35 | 201 | } |
1da177e4 | 202 | |
95dd7227 | 203 | static void drv_read(struct drv_cmd *cmd) |
fe27cb35 | 204 | { |
64be7eed | 205 | cpumask_t saved_mask = current->cpus_allowed; |
fe27cb35 VP |
206 | cmd->val = 0; |
207 | ||
208 | set_cpus_allowed(current, cmd->mask); | |
209 | do_drv_read(cmd); | |
210 | set_cpus_allowed(current, saved_mask); | |
fe27cb35 VP |
211 | } |
212 | ||
213 | static void drv_write(struct drv_cmd *cmd) | |
214 | { | |
64be7eed VP |
215 | cpumask_t saved_mask = current->cpus_allowed; |
216 | unsigned int i; | |
fe27cb35 VP |
217 | |
218 | for_each_cpu_mask(i, cmd->mask) { | |
219 | set_cpus_allowed(current, cpumask_of_cpu(i)); | |
220 | do_drv_write(cmd); | |
1da177e4 LT |
221 | } |
222 | ||
fe27cb35 VP |
223 | set_cpus_allowed(current, saved_mask); |
224 | return; | |
225 | } | |
1da177e4 | 226 | |
fe27cb35 VP |
227 | static u32 get_cur_val(cpumask_t mask) |
228 | { | |
64be7eed VP |
229 | struct acpi_processor_performance *perf; |
230 | struct drv_cmd cmd; | |
1da177e4 | 231 | |
fe27cb35 VP |
232 | if (unlikely(cpus_empty(mask))) |
233 | return 0; | |
1da177e4 | 234 | |
dde9f7ba VP |
235 | switch (drv_data[first_cpu(mask)]->cpu_feature) { |
236 | case SYSTEM_INTEL_MSR_CAPABLE: | |
237 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
238 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
239 | break; | |
240 | case SYSTEM_IO_CAPABLE: | |
241 | cmd.type = SYSTEM_IO_CAPABLE; | |
242 | perf = drv_data[first_cpu(mask)]->acpi_data; | |
243 | cmd.addr.io.port = perf->control_register.address; | |
244 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
245 | break; | |
246 | default: | |
247 | return 0; | |
248 | } | |
249 | ||
fe27cb35 | 250 | cmd.mask = mask; |
1da177e4 | 251 | |
fe27cb35 | 252 | drv_read(&cmd); |
1da177e4 | 253 | |
fe27cb35 VP |
254 | dprintk("get_cur_val = %u\n", cmd.val); |
255 | ||
256 | return cmd.val; | |
257 | } | |
1da177e4 | 258 | |
dfde5d62 VP |
259 | /* |
260 | * Return the measured active (C0) frequency on this CPU since last call | |
261 | * to this function. | |
262 | * Input: cpu number | |
263 | * Return: Average CPU frequency in terms of max frequency (zero on error) | |
264 | * | |
265 | * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance | |
266 | * over a period of time, while CPU is in C0 state. | |
267 | * IA32_MPERF counts at the rate of max advertised frequency | |
268 | * IA32_APERF counts at the rate of actual CPU frequency | |
269 | * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and | |
270 | * no meaning should be associated with absolute values of these MSRs. | |
271 | */ | |
272 | static unsigned int get_measured_perf(unsigned int cpu) | |
273 | { | |
274 | union { | |
275 | struct { | |
276 | u32 lo; | |
277 | u32 hi; | |
278 | } split; | |
279 | u64 whole; | |
280 | } aperf_cur, mperf_cur; | |
281 | ||
282 | cpumask_t saved_mask; | |
283 | unsigned int perf_percent; | |
284 | unsigned int retval; | |
285 | ||
286 | saved_mask = current->cpus_allowed; | |
287 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
288 | if (get_cpu() != cpu) { | |
289 | /* We were not able to run on requested processor */ | |
290 | put_cpu(); | |
291 | return 0; | |
292 | } | |
293 | ||
294 | rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi); | |
295 | rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi); | |
296 | ||
297 | wrmsr(MSR_IA32_APERF, 0,0); | |
298 | wrmsr(MSR_IA32_MPERF, 0,0); | |
299 | ||
300 | #ifdef __i386__ | |
301 | /* | |
302 | * We dont want to do 64 bit divide with 32 bit kernel | |
303 | * Get an approximate value. Return failure in case we cannot get | |
304 | * an approximate value. | |
305 | */ | |
306 | if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) { | |
307 | int shift_count; | |
308 | u32 h; | |
309 | ||
310 | h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi); | |
311 | shift_count = fls(h); | |
312 | ||
313 | aperf_cur.whole >>= shift_count; | |
314 | mperf_cur.whole >>= shift_count; | |
315 | } | |
316 | ||
317 | if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) { | |
318 | int shift_count = 7; | |
319 | aperf_cur.split.lo >>= shift_count; | |
320 | mperf_cur.split.lo >>= shift_count; | |
321 | } | |
322 | ||
95dd7227 | 323 | if (aperf_cur.split.lo && mperf_cur.split.lo) |
dfde5d62 | 324 | perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo; |
95dd7227 | 325 | else |
dfde5d62 | 326 | perf_percent = 0; |
dfde5d62 VP |
327 | |
328 | #else | |
329 | if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) { | |
330 | int shift_count = 7; | |
331 | aperf_cur.whole >>= shift_count; | |
332 | mperf_cur.whole >>= shift_count; | |
333 | } | |
334 | ||
95dd7227 | 335 | if (aperf_cur.whole && mperf_cur.whole) |
dfde5d62 | 336 | perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole; |
95dd7227 | 337 | else |
dfde5d62 | 338 | perf_percent = 0; |
dfde5d62 VP |
339 | |
340 | #endif | |
341 | ||
342 | retval = drv_data[cpu]->max_freq * perf_percent / 100; | |
343 | ||
344 | put_cpu(); | |
345 | set_cpus_allowed(current, saved_mask); | |
346 | ||
347 | dprintk("cpu %d: performance percent %d\n", cpu, perf_percent); | |
348 | return retval; | |
349 | } | |
350 | ||
fe27cb35 VP |
351 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
352 | { | |
64be7eed VP |
353 | struct acpi_cpufreq_data *data = drv_data[cpu]; |
354 | unsigned int freq; | |
fe27cb35 VP |
355 | |
356 | dprintk("get_cur_freq_on_cpu (%d)\n", cpu); | |
357 | ||
358 | if (unlikely(data == NULL || | |
64be7eed | 359 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 | 360 | return 0; |
1da177e4 LT |
361 | } |
362 | ||
fe27cb35 VP |
363 | freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data); |
364 | dprintk("cur freq = %u\n", freq); | |
1da177e4 | 365 | |
fe27cb35 | 366 | return freq; |
1da177e4 LT |
367 | } |
368 | ||
fe27cb35 | 369 | static unsigned int check_freqs(cpumask_t mask, unsigned int freq, |
64be7eed | 370 | struct acpi_cpufreq_data *data) |
fe27cb35 | 371 | { |
64be7eed VP |
372 | unsigned int cur_freq; |
373 | unsigned int i; | |
1da177e4 | 374 | |
95dd7227 | 375 | for (i=0; i<100; i++) { |
fe27cb35 VP |
376 | cur_freq = extract_freq(get_cur_val(mask), data); |
377 | if (cur_freq == freq) | |
378 | return 1; | |
379 | udelay(10); | |
380 | } | |
381 | return 0; | |
382 | } | |
383 | ||
384 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
64be7eed | 385 | unsigned int target_freq, unsigned int relation) |
1da177e4 | 386 | { |
64be7eed VP |
387 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
388 | struct acpi_processor_performance *perf; | |
389 | struct cpufreq_freqs freqs; | |
390 | cpumask_t online_policy_cpus; | |
391 | struct drv_cmd cmd; | |
392 | unsigned int msr; | |
393 | unsigned int next_state = 0; | |
394 | unsigned int next_perf_state = 0; | |
395 | unsigned int i; | |
396 | int result = 0; | |
fe27cb35 VP |
397 | |
398 | dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); | |
399 | ||
400 | if (unlikely(data == NULL || | |
95dd7227 | 401 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 VP |
402 | return -ENODEV; |
403 | } | |
1da177e4 | 404 | |
fe27cb35 | 405 | perf = data->acpi_data; |
1da177e4 | 406 | result = cpufreq_frequency_table_target(policy, |
64be7eed VP |
407 | data->freq_table, |
408 | target_freq, | |
409 | relation, &next_state); | |
09b4d1ee | 410 | if (unlikely(result)) |
fe27cb35 | 411 | return -ENODEV; |
09b4d1ee | 412 | |
7e1f19e5 | 413 | #ifdef CONFIG_HOTPLUG_CPU |
09b4d1ee VP |
414 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
415 | cpus_and(online_policy_cpus, cpu_online_map, policy->cpus); | |
7e1f19e5 AM |
416 | #else |
417 | online_policy_cpus = policy->cpus; | |
418 | #endif | |
1da177e4 | 419 | |
fe27cb35 | 420 | next_perf_state = data->freq_table[next_state].index; |
7650b281 | 421 | if (perf->state == next_perf_state) { |
fe27cb35 | 422 | if (unlikely(data->resume)) { |
64be7eed VP |
423 | dprintk("Called after resume, resetting to P%d\n", |
424 | next_perf_state); | |
fe27cb35 VP |
425 | data->resume = 0; |
426 | } else { | |
64be7eed VP |
427 | dprintk("Already at target state (P%d)\n", |
428 | next_perf_state); | |
fe27cb35 VP |
429 | return 0; |
430 | } | |
09b4d1ee VP |
431 | } |
432 | ||
64be7eed VP |
433 | switch (data->cpu_feature) { |
434 | case SYSTEM_INTEL_MSR_CAPABLE: | |
435 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
436 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
437 | msr = | |
438 | (u32) perf->states[next_perf_state]. | |
439 | control & INTEL_MSR_RANGE; | |
440 | cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr; | |
441 | break; | |
442 | case SYSTEM_IO_CAPABLE: | |
443 | cmd.type = SYSTEM_IO_CAPABLE; | |
444 | cmd.addr.io.port = perf->control_register.address; | |
445 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
446 | cmd.val = (u32) perf->states[next_perf_state].control; | |
447 | break; | |
448 | default: | |
449 | return -ENODEV; | |
450 | } | |
09b4d1ee | 451 | |
fe27cb35 | 452 | cpus_clear(cmd.mask); |
09b4d1ee | 453 | |
fe27cb35 VP |
454 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
455 | cmd.mask = online_policy_cpus; | |
456 | else | |
457 | cpu_set(policy->cpu, cmd.mask); | |
09b4d1ee | 458 | |
7650b281 VP |
459 | freqs.old = data->freq_table[perf->state].frequency; |
460 | freqs.new = data->freq_table[next_perf_state].frequency; | |
fe27cb35 VP |
461 | for_each_cpu_mask(i, cmd.mask) { |
462 | freqs.cpu = i; | |
463 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 464 | } |
1da177e4 | 465 | |
fe27cb35 | 466 | drv_write(&cmd); |
09b4d1ee | 467 | |
fe27cb35 VP |
468 | if (acpi_pstate_strict) { |
469 | if (!check_freqs(cmd.mask, freqs.new, data)) { | |
470 | dprintk("acpi_cpufreq_target failed (%d)\n", | |
64be7eed | 471 | policy->cpu); |
fe27cb35 | 472 | return -EAGAIN; |
09b4d1ee VP |
473 | } |
474 | } | |
475 | ||
fe27cb35 VP |
476 | for_each_cpu_mask(i, cmd.mask) { |
477 | freqs.cpu = i; | |
478 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
479 | } | |
480 | perf->state = next_perf_state; | |
481 | ||
482 | return result; | |
1da177e4 LT |
483 | } |
484 | ||
64be7eed | 485 | static int acpi_cpufreq_verify(struct cpufreq_policy *policy) |
1da177e4 | 486 | { |
fe27cb35 | 487 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 LT |
488 | |
489 | dprintk("acpi_cpufreq_verify\n"); | |
490 | ||
fe27cb35 | 491 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
492 | } |
493 | ||
1da177e4 | 494 | static unsigned long |
64be7eed | 495 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 496 | { |
64be7eed | 497 | struct acpi_processor_performance *perf = data->acpi_data; |
09b4d1ee | 498 | |
1da177e4 LT |
499 | if (cpu_khz) { |
500 | /* search the closest match to cpu_khz */ | |
501 | unsigned int i; | |
502 | unsigned long freq; | |
09b4d1ee | 503 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 504 | |
95dd7227 | 505 | for (i=0; i<(perf->state_count-1); i++) { |
1da177e4 | 506 | freq = freqn; |
95dd7227 | 507 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 508 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 509 | perf->state = i; |
64be7eed | 510 | return freq; |
1da177e4 LT |
511 | } |
512 | } | |
95dd7227 | 513 | perf->state = perf->state_count-1; |
64be7eed | 514 | return freqn; |
09b4d1ee | 515 | } else { |
1da177e4 | 516 | /* assume CPU is at P0... */ |
09b4d1ee VP |
517 | perf->state = 0; |
518 | return perf->states[0].core_frequency * 1000; | |
519 | } | |
1da177e4 LT |
520 | } |
521 | ||
09b4d1ee VP |
522 | /* |
523 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
524 | * | |
525 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
526 | * in order to determine correct frequency and voltage pairings. We can | |
527 | * do _PDC and _PSD and find out the processor dependency for the | |
528 | * actual init that will happen later... | |
529 | */ | |
fe27cb35 | 530 | static int acpi_cpufreq_early_init(void) |
09b4d1ee | 531 | { |
64be7eed VP |
532 | struct acpi_processor_performance *data; |
533 | cpumask_t covered; | |
534 | unsigned int i, j; | |
09b4d1ee VP |
535 | |
536 | dprintk("acpi_cpufreq_early_init\n"); | |
537 | ||
fb1bb34d | 538 | for_each_possible_cpu(i) { |
64be7eed VP |
539 | data = kzalloc(sizeof(struct acpi_processor_performance), |
540 | GFP_KERNEL); | |
09b4d1ee | 541 | if (!data) { |
fe27cb35 | 542 | for_each_cpu_mask(j, covered) { |
09b4d1ee VP |
543 | kfree(acpi_perf_data[j]); |
544 | acpi_perf_data[j] = NULL; | |
545 | } | |
64be7eed | 546 | return -ENOMEM; |
09b4d1ee VP |
547 | } |
548 | acpi_perf_data[i] = data; | |
fe27cb35 | 549 | cpu_set(i, covered); |
09b4d1ee VP |
550 | } |
551 | ||
552 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
553 | acpi_processor_preregister_performance(acpi_perf_data); |
554 | return 0; | |
09b4d1ee VP |
555 | } |
556 | ||
95625b8f | 557 | #ifdef CONFIG_SMP |
8adcc0c6 VP |
558 | /* |
559 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
560 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
561 | * detected, this has a side effect of making CPU run at a different speed | |
562 | * than OS intended it to run at. Detect it and handle it cleanly. | |
563 | */ | |
564 | static int bios_with_sw_any_bug; | |
565 | ||
0497c8ca | 566 | static int sw_any_bug_found(struct dmi_system_id *d) |
8adcc0c6 VP |
567 | { |
568 | bios_with_sw_any_bug = 1; | |
569 | return 0; | |
570 | } | |
571 | ||
0497c8ca | 572 | static struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
573 | { |
574 | .callback = sw_any_bug_found, | |
575 | .ident = "Supermicro Server X6DLP", | |
576 | .matches = { | |
577 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
578 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
579 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
580 | }, | |
581 | }, | |
582 | { } | |
583 | }; | |
95625b8f | 584 | #endif |
8adcc0c6 | 585 | |
64be7eed | 586 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 587 | { |
64be7eed VP |
588 | unsigned int i; |
589 | unsigned int valid_states = 0; | |
590 | unsigned int cpu = policy->cpu; | |
591 | struct acpi_cpufreq_data *data; | |
64be7eed VP |
592 | unsigned int result = 0; |
593 | struct cpuinfo_x86 *c = &cpu_data[policy->cpu]; | |
594 | struct acpi_processor_performance *perf; | |
1da177e4 | 595 | |
1da177e4 | 596 | dprintk("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 597 | |
09b4d1ee | 598 | if (!acpi_perf_data[cpu]) |
64be7eed | 599 | return -ENODEV; |
09b4d1ee | 600 | |
fe27cb35 | 601 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 | 602 | if (!data) |
64be7eed | 603 | return -ENOMEM; |
1da177e4 | 604 | |
09b4d1ee | 605 | data->acpi_data = acpi_perf_data[cpu]; |
fe27cb35 | 606 | drv_data[cpu] = data; |
1da177e4 | 607 | |
95dd7227 | 608 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
fe27cb35 | 609 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
1da177e4 | 610 | |
fe27cb35 | 611 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
612 | if (result) |
613 | goto err_free; | |
614 | ||
09b4d1ee | 615 | perf = data->acpi_data; |
09b4d1ee | 616 | policy->shared_type = perf->shared_type; |
95dd7227 | 617 | |
46f18e3a | 618 | /* |
95dd7227 | 619 | * Will let policy->cpus know about dependency only when software |
46f18e3a VP |
620 | * coordination is required. |
621 | */ | |
622 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 623 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
46f18e3a | 624 | policy->cpus = perf->shared_cpu_map; |
8adcc0c6 VP |
625 | } |
626 | ||
627 | #ifdef CONFIG_SMP | |
628 | dmi_check_system(sw_any_bug_dmi_table); | |
629 | if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) { | |
630 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
631 | policy->cpus = cpu_core_map[cpu]; | |
632 | } | |
633 | #endif | |
09b4d1ee | 634 | |
1da177e4 | 635 | /* capability check */ |
09b4d1ee | 636 | if (perf->state_count <= 1) { |
1da177e4 LT |
637 | dprintk("No P-States\n"); |
638 | result = -ENODEV; | |
639 | goto err_unreg; | |
640 | } | |
09b4d1ee | 641 | |
fe27cb35 VP |
642 | if (perf->control_register.space_id != perf->status_register.space_id) { |
643 | result = -ENODEV; | |
644 | goto err_unreg; | |
645 | } | |
646 | ||
647 | switch (perf->control_register.space_id) { | |
64be7eed | 648 | case ACPI_ADR_SPACE_SYSTEM_IO: |
fe27cb35 | 649 | dprintk("SYSTEM IO addr space\n"); |
dde9f7ba VP |
650 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
651 | break; | |
64be7eed | 652 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
dde9f7ba VP |
653 | dprintk("HARDWARE addr space\n"); |
654 | if (!check_est_cpu(cpu)) { | |
655 | result = -ENODEV; | |
656 | goto err_unreg; | |
657 | } | |
658 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 | 659 | break; |
64be7eed | 660 | default: |
fe27cb35 | 661 | dprintk("Unknown addr space %d\n", |
64be7eed | 662 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
663 | result = -ENODEV; |
664 | goto err_unreg; | |
665 | } | |
666 | ||
95dd7227 DJ |
667 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * |
668 | (perf->state_count+1), GFP_KERNEL); | |
1da177e4 LT |
669 | if (!data->freq_table) { |
670 | result = -ENOMEM; | |
671 | goto err_unreg; | |
672 | } | |
673 | ||
674 | /* detect transition latency */ | |
675 | policy->cpuinfo.transition_latency = 0; | |
95dd7227 | 676 | for (i=0; i<perf->state_count; i++) { |
64be7eed VP |
677 | if ((perf->states[i].transition_latency * 1000) > |
678 | policy->cpuinfo.transition_latency) | |
679 | policy->cpuinfo.transition_latency = | |
680 | perf->states[i].transition_latency * 1000; | |
1da177e4 LT |
681 | } |
682 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
683 | ||
dfde5d62 | 684 | data->max_freq = perf->states[0].core_frequency * 1000; |
1da177e4 | 685 | /* table init */ |
95dd7227 DJ |
686 | for (i=0; i<perf->state_count; i++) { |
687 | if (i>0 && perf->states[i].core_frequency == | |
688 | perf->states[i-1].core_frequency) | |
fe27cb35 VP |
689 | continue; |
690 | ||
691 | data->freq_table[valid_states].index = i; | |
692 | data->freq_table[valid_states].frequency = | |
64be7eed | 693 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 694 | valid_states++; |
1da177e4 | 695 | } |
3d4a7ef3 | 696 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
1da177e4 LT |
697 | |
698 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
95dd7227 | 699 | if (result) |
1da177e4 | 700 | goto err_freqfree; |
1da177e4 | 701 | |
dde9f7ba | 702 | switch (data->cpu_feature) { |
64be7eed | 703 | case ACPI_ADR_SPACE_SYSTEM_IO: |
dde9f7ba VP |
704 | /* Current speed is unknown and not detectable by IO port */ |
705 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
706 | break; | |
64be7eed | 707 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 708 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
dde9f7ba VP |
709 | get_cur_freq_on_cpu(cpu); |
710 | break; | |
64be7eed | 711 | default: |
dde9f7ba VP |
712 | break; |
713 | } | |
714 | ||
1da177e4 LT |
715 | /* notify BIOS that we exist */ |
716 | acpi_processor_notify_smm(THIS_MODULE); | |
717 | ||
dfde5d62 VP |
718 | /* Check for APERF/MPERF support in hardware */ |
719 | if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) { | |
720 | unsigned int ecx; | |
721 | ecx = cpuid_ecx(6); | |
95dd7227 | 722 | if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY) |
dfde5d62 | 723 | acpi_cpufreq_driver.getavg = get_measured_perf; |
dfde5d62 VP |
724 | } |
725 | ||
fe27cb35 | 726 | dprintk("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 727 | for (i = 0; i < perf->state_count; i++) |
1da177e4 | 728 | dprintk(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 729 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
730 | (u32) perf->states[i].core_frequency, |
731 | (u32) perf->states[i].power, | |
732 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
733 | |
734 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
64be7eed | 735 | |
4b31e774 DB |
736 | /* |
737 | * the first call to ->target() should result in us actually | |
738 | * writing something to the appropriate registers. | |
739 | */ | |
740 | data->resume = 1; | |
64be7eed | 741 | |
fe27cb35 | 742 | return result; |
1da177e4 | 743 | |
95dd7227 | 744 | err_freqfree: |
1da177e4 | 745 | kfree(data->freq_table); |
95dd7227 | 746 | err_unreg: |
09b4d1ee | 747 | acpi_processor_unregister_performance(perf, cpu); |
95dd7227 | 748 | err_free: |
1da177e4 | 749 | kfree(data); |
fe27cb35 | 750 | drv_data[cpu] = NULL; |
1da177e4 | 751 | |
64be7eed | 752 | return result; |
1da177e4 LT |
753 | } |
754 | ||
64be7eed | 755 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 756 | { |
fe27cb35 | 757 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 758 | |
1da177e4 LT |
759 | dprintk("acpi_cpufreq_cpu_exit\n"); |
760 | ||
761 | if (data) { | |
762 | cpufreq_frequency_table_put_attr(policy->cpu); | |
fe27cb35 | 763 | drv_data[policy->cpu] = NULL; |
64be7eed VP |
764 | acpi_processor_unregister_performance(data->acpi_data, |
765 | policy->cpu); | |
1da177e4 LT |
766 | kfree(data); |
767 | } | |
768 | ||
64be7eed | 769 | return 0; |
1da177e4 LT |
770 | } |
771 | ||
64be7eed | 772 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 773 | { |
fe27cb35 | 774 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 775 | |
1da177e4 LT |
776 | dprintk("acpi_cpufreq_resume\n"); |
777 | ||
778 | data->resume = 1; | |
779 | ||
64be7eed | 780 | return 0; |
1da177e4 LT |
781 | } |
782 | ||
64be7eed | 783 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 LT |
784 | &cpufreq_freq_attr_scaling_available_freqs, |
785 | NULL, | |
786 | }; | |
787 | ||
788 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
64be7eed VP |
789 | .verify = acpi_cpufreq_verify, |
790 | .target = acpi_cpufreq_target, | |
64be7eed VP |
791 | .init = acpi_cpufreq_cpu_init, |
792 | .exit = acpi_cpufreq_cpu_exit, | |
793 | .resume = acpi_cpufreq_resume, | |
794 | .name = "acpi-cpufreq", | |
795 | .owner = THIS_MODULE, | |
796 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
797 | }; |
798 | ||
64be7eed | 799 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 800 | { |
1da177e4 LT |
801 | dprintk("acpi_cpufreq_init\n"); |
802 | ||
fe27cb35 | 803 | acpi_cpufreq_early_init(); |
09b4d1ee | 804 | |
64be7eed | 805 | return cpufreq_register_driver(&acpi_cpufreq_driver); |
1da177e4 LT |
806 | } |
807 | ||
64be7eed | 808 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 | 809 | { |
64be7eed | 810 | unsigned int i; |
1da177e4 LT |
811 | dprintk("acpi_cpufreq_exit\n"); |
812 | ||
813 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
814 | ||
fb1bb34d | 815 | for_each_possible_cpu(i) { |
09b4d1ee VP |
816 | kfree(acpi_perf_data[i]); |
817 | acpi_perf_data[i] = NULL; | |
818 | } | |
1da177e4 LT |
819 | return; |
820 | } | |
821 | ||
d395bf12 | 822 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed | 823 | MODULE_PARM_DESC(acpi_pstate_strict, |
95dd7227 DJ |
824 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
825 | "performed during frequency changes."); | |
1da177e4 LT |
826 | |
827 | late_initcall(acpi_cpufreq_init); | |
828 | module_exit(acpi_cpufreq_exit); | |
829 | ||
830 | MODULE_ALIAS("acpi"); |