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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
df2078b8 YS |
2 | #include <linux/init.h> |
3 | #include <asm/thread_info.h> | |
4 | ||
5 | #if defined(CONFIG_CPU_H8300H) | |
6 | .h8300h | |
7 | #define SYSCR 0xfee012 | |
8 | #define IRAMTOP 0xffff20 | |
9 | #define NR_INT 64 | |
10 | #endif | |
11 | #if defined(CONFIG_CPU_H8S) | |
12 | .h8300s | |
13 | #define INTCR 0xffff31 | |
14 | #define IRAMTOP 0xffc000 | |
15 | #define NR_INT 128 | |
16 | #endif | |
17 | ||
18 | __HEAD | |
19 | .global _start | |
20 | _start: | |
21 | mov.l #IRAMTOP,sp | |
22 | #if !defined(CONFIG_H8300H_SIM) && \ | |
23 | !defined(CONFIG_H8S_SIM) | |
24 | jsr @lowlevel_init | |
25 | ||
26 | /* copy .data */ | |
27 | mov.l #_begin_data,er5 | |
28 | mov.l #_sdata,er6 | |
29 | mov.l #_edata,er4 | |
30 | sub.l er6,er4 | |
31 | shlr.l er4 | |
32 | shlr.l er4 | |
33 | 1: | |
34 | mov.l @er5+,er0 | |
35 | mov.l er0,@er6 | |
36 | adds #4,er6 | |
37 | dec.l #1,er4 | |
38 | bne 1b | |
39 | /* .bss clear */ | |
40 | mov.l #_sbss,er5 | |
41 | mov.l #_ebss,er4 | |
42 | sub.l er5,er4 | |
43 | shlr er4 | |
44 | shlr er4 | |
45 | sub.l er0,er0 | |
46 | 1: | |
47 | mov.l er0,@er5 | |
48 | adds #4,er5 | |
49 | dec.l #1,er4 | |
50 | bne 1b | |
51 | #else | |
52 | /* get cmdline from gdb */ | |
53 | jsr @0xcc | |
54 | ;; er0 - argc | |
55 | ;; er1 - argv | |
56 | mov.l #command_line,er3 | |
57 | adds #4,er1 | |
58 | dec.l #1,er0 | |
59 | beq 4f | |
60 | 1: | |
61 | mov.l @er1+,er2 | |
62 | 2: | |
63 | mov.b @er2+,r4l | |
64 | beq 3f | |
65 | mov.b r4l,@er3 | |
66 | adds #1,er3 | |
67 | bra 2b | |
68 | 3: | |
69 | mov.b #' ',r4l | |
70 | mov.b r4l,@er3 | |
71 | adds #1,er3 | |
72 | dec.l #1,er0 | |
73 | bne 1b | |
74 | subs #1,er3 | |
75 | mov.b #0,r4l | |
76 | mov.b r4l,@er3 | |
77 | 4: | |
78 | #endif | |
79 | sub.l er0,er0 | |
80 | jsr @h8300_fdt_init | |
81 | /* linux kernel start */ | |
82 | #if defined(CONFIG_CPU_H8300H) | |
83 | ldc #0xd0,ccr /* running kernel */ | |
84 | mov.l #SYSCR,er0 | |
85 | bclr #3,@er0 | |
86 | #endif | |
87 | #if defined(CONFIG_CPU_H8S) | |
88 | ldc #0x07,exr | |
89 | bclr #4,@INTCR:8 | |
90 | bset #5,@INTCR:8 /* Interrupt mode 2 */ | |
91 | ldc #0x90,ccr /* running kernel */ | |
92 | #endif | |
93 | mov.l #init_thread_union,sp | |
94 | add.l #0x2000,sp | |
95 | jsr @start_kernel | |
96 | ||
97 | 1: | |
98 | bra 1b | |
99 | ||
100 | #if defined(CONFIG_ROMKERNEL) | |
101 | /* interrupt vector */ | |
102 | .section .vectors,"ax" | |
103 | .long _start | |
104 | .long _start | |
105 | vector = 2 | |
106 | .rept NR_INT - 2 | |
107 | .long _interrupt_redirect_table+vector*4 | |
108 | vector = vector + 1 | |
109 | .endr | |
110 | #endif | |
111 | .end |