[linux-2.6-block.git] / arch / frv / Kconfig

config FRV
	bool
	default y
	select HAVE_IDE
	select HAVE_ARCH_TRACEHOOK
	select HAVE_PERF_EVENTS
	select HAVE_UID16
	select VIRT_TO_BUS
	select GENERIC_IRQ_SHOW
	select HAVE_DEBUG_BUGVERBOSE
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select GENERIC_CPU_DEVICES
	select ARCH_HAS_DEVMEM_IS_ALLOWED
	select ARCH_WANT_IPC_PARSE_VERSION
	select OLD_SIGSUSPEND3
	select OLD_SIGACTION
	select HAVE_DEBUG_STACKOVERFLOW
	select ARCH_NO_COHERENT_DMA_MMAP

config CPU_BIG_ENDIAN
	def_bool y

config ZONE_DMA
	bool
	default y

config RWSEM_GENERIC_SPINLOCK
	bool
	default y

config RWSEM_XCHGADD_ALGORITHM
	bool

config GENERIC_HWEIGHT
	bool
	default y

config GENERIC_CALIBRATE_DELAY
	bool
	default n

config TIME_LOW_RES
	bool
	default y

config QUICKLIST
	bool
	default y

config ARCH_HAS_ILOG2_U32
	bool
	default y

config ARCH_HAS_ILOG2_U64
	bool
	default y

config HZ
	int
	default 1000

source "init/Kconfig"

source "kernel/Kconfig.freezer"


menu "Fujitsu FR-V system setup"

config MMU
	bool "MMU support"
	help
	  This options switches on and off support for the FR-V MMU
	  (effectively switching between vmlinux and uClinux). Not all FR-V
	  CPUs support this. Currently only the FR451 has a sufficiently
	  featured MMU.

config FRV_OUTOFLINE_ATOMIC_OPS
	bool "Out-of-line the FRV atomic operations"
	default n
	help
	  Setting this option causes the FR-V atomic operations to be mostly
	  implemented out-of-line.

	  See Documentation/frv/atomic-ops.txt for more information.

config HIGHMEM
	bool "High memory support"
	depends on MMU
	default y
	help
	  If you wish to use more than 256MB of memory with your MMU based
	  system, you will need to select this option. The kernel can only see
	  the memory between 0xC0000000 and 0xD0000000 directly... everything
	  else must be kmapped.

	  The arch is, however, capable of supporting up to 3GB of SDRAM.

config HIGHPTE
	bool "Allocate page tables in highmem"
	depends on HIGHMEM
	default y
	help
	  The VM uses one page of memory for each page table.  For systems
	  with a lot of RAM, this can be wasteful of precious low memory.
	  Setting this option will put user-space page tables in high memory.

source "mm/Kconfig"

choice
	prompt "uClinux kernel load address"
	depends on !MMU
	default UCPAGE_OFFSET_C0000000
	help
	  This option sets the base address for the uClinux kernel. The kernel
	  will rearrange the SDRAM layout to start at this address, and move
	  itself to start there. It must be greater than 0, and it must be
	  sufficiently less than 0xE0000000 that the SDRAM does not intersect
	  the I/O region.

	  The base address must also be aligned such that the SDRAM controller
	  can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.

config UCPAGE_OFFSET_20000000
       bool "0x20000000"

config UCPAGE_OFFSET_40000000
       bool "0x40000000"

config UCPAGE_OFFSET_60000000
       bool "0x60000000"

config UCPAGE_OFFSET_80000000
       bool "0x80000000"

config UCPAGE_OFFSET_A0000000
       bool "0xA0000000"

config UCPAGE_OFFSET_C0000000
       bool "0xC0000000 (Recommended)"

endchoice

config PAGE_OFFSET
	hex
	default 0x20000000 if UCPAGE_OFFSET_20000000
	default 0x40000000 if UCPAGE_OFFSET_40000000
	default 0x60000000 if UCPAGE_OFFSET_60000000
	default 0x80000000 if UCPAGE_OFFSET_80000000
	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	default 0xC0000000

config PROTECT_KERNEL
	bool "Protect core kernel against userspace"
	depends on !MMU
	default y
	help
	  Selecting this option causes the uClinux kernel to change the
	  permittivity of DAMPR register covering the core kernel image to
	  prevent userspace accessing the underlying memory directly.

choice
	prompt "CPU Caching mode"
	default FRV_DEFL_CACHE_WBACK
	help
	  This option determines the default caching mode for the kernel.

	  Write-Back caching mode involves the all reads and writes causing
	  the affected cacheline to be read into the cache first before being
	  operated upon. Memory is not then updated by a write until the cache
	  is filled and a cacheline needs to be displaced from the cache to
	  make room. Only at that point is it written back.

	  Write-Behind caching is similar to Write-Back caching, except that a
	  write won't fetch a cacheline into the cache if there isn't already
	  one there; it will write directly to memory instead.

	  Write-Through caching only fetches cachelines from memory on a
	  read. Writes always get written directly to memory. If the affected
	  cacheline is also in cache, it will be updated too.

	  The final option is to turn of caching entirely.

	  Note that not all CPUs support Write-Behind caching. If the CPU on
	  which the kernel is running doesn't, it'll fall back to Write-Back
	  caching.

config FRV_DEFL_CACHE_WBACK
	bool "Write-Back"

config FRV_DEFL_CACHE_WBEHIND
	bool "Write-Behind"

config FRV_DEFL_CACHE_WTHRU
	bool "Write-Through"

config FRV_DEFL_CACHE_DISABLED
	bool "Disabled"

endchoice

menu "CPU core support"

config CPU_FR401
	bool "Include FR401 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR401, FR401A and FR403 CPUs

config CPU_FR405
	bool "Include FR405 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR405 CPU

config CPU_FR451
	bool "Include FR451 core support"
	default y
	help
	  This enables support for the FR451 CPU

config CPU_FR451_COMPILE
	bool "Specifically compile for FR451 core"
	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR451 CPU

config CPU_FR551
	bool "Include FR551 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR555 CPU

config CPU_FR551_COMPILE
	bool "Specifically compile for FR551 core"
	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR555 CPU

config FRV_L1_CACHE_SHIFT
	int
	default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
	default "6" if CPU_FR551

endmenu

choice
	prompt "System support"
	default MB93091_VDK

config MB93091_VDK
	bool "MB93091 CPU board with or without motherboard"

config MB93093_PDK
	bool "MB93093 PDK unit"

endchoice

if MB93091_VDK
choice
	prompt "Motherboard support"
	default MB93090_MB00

config MB93090_MB00
	bool "Use the MB93090-MB00 motherboard"
	help
	  Select this option if the MB93091 CPU board is going to be used with
	  a MB93090-MB00 VDK motherboard

config MB93091_NO_MB
	bool "Use standalone"
	help
	  Select this option if the MB93091 CPU board is going to be used
	  without a motherboard

endchoice
endif

config FUJITSU_MB93493
	bool "MB93493 Multimedia chip"
	help
	  Select this option if the MB93493 multimedia chip is going to be
	  used.

choice
	prompt "GP-Relative data support"
	default GPREL_DATA_8
	help
	  This option controls what data, if any, should be placed in the GP
	  relative data sections. Using this means that the compiler can
	  generate accesses to the data using GR16-relative addressing which
	  is faster than absolute instructions and saves space (2 instructions
	  per access).

	  However, the GPREL region is limited in size because the immediate
	  value used in the load and store instructions is limited to a 12-bit
	  signed number.

	  So if the linker starts complaining that accesses to GPREL data are
	  out of range, try changing this option from the default.

	  Note that modules will always be compiled with this feature disabled
	  as the module data will not be in range of the GP base address.

config GPREL_DATA_8
	bool "Put data objects of up to 8 bytes into GP-REL"

config GPREL_DATA_4
	bool "Put data objects of up to 4 bytes into GP-REL"

config GPREL_DATA_NONE
	bool "Don't use GP-REL"

endchoice

config FRV_ONCPU_SERIAL
	bool "Use on-CPU serial ports"
	select SERIAL_8250
	default y

config PCI
	bool "Use PCI"
	depends on MB93090_MB00
	default y
	select GENERIC_PCI_IOMAP
	help
	  Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	  onboard. If you have one of these boards and you wish to use the PCI
	  facilities, say Y here.

config RESERVE_DMA_COHERENT
	bool "Reserve DMA coherent memory"
	depends on PCI && !MMU
	default y
	help
	  Many PCI drivers require access to uncached memory for DMA device
	  communications (such as is done with some Ethernet buffer rings). If
	  a fully featured MMU is available, this can be done through page
	  table settings, but if not, a region has to be set aside and marked
	  with a special DAMPR register.

	  Setting this option causes uClinux to set aside a portion of the
	  available memory for use in this manner. The memory will then be
	  unavailable for normal kernel use.

source "drivers/pci/Kconfig"

source "drivers/pcmcia/Kconfig"

menu "Power management options"

config ARCH_SUSPEND_POSSIBLE
	def_bool y

source kernel/power/Kconfig
endmenu

endmenu


menu "Executable formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "arch/frv/Kconfig.debug"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"
Commit	Line	Data
1da177e4 LT	1	config FRV
	2	bool
	3	default y
ec7748b5	4	select HAVE_IDE
4a3b9893	5	select HAVE_ARCH_TRACEHOOK
cdd6c482	6	select HAVE_PERF_EVENTS
af1839eb	7	select HAVE_UID16
4febd95a	8	select VIRT_TO_BUS
3062aa50	9	select GENERIC_IRQ_SHOW
9b2a60c4	10	select HAVE_DEBUG_BUGVERBOSE
df013ffb	11	select ARCH_HAVE_NMI_SAFE_CMPXCHG
9f13a1fd	12	select GENERIC_CPU_DEVICES
21266be9	13	select ARCH_HAS_DEVMEM_IS_ALLOWED
c1d7e01d	14	select ARCH_WANT_IPC_PARSE_VERSION
39e08a9b	15	select OLD_SIGSUSPEND3
177b6703	16	select OLD_SIGACTION
d1a1dc0b	17	select HAVE_DEBUG_STACKOVERFLOW
eae07519	18	select ARCH_NO_COHERENT_DMA_MMAP
1da177e4	19
4c97a0c8 BM	20	config CPU_BIG_ENDIAN
	21	def_bool y
	22
66701b14 CL	23	config ZONE_DMA
	24	bool
	25	default y
	26
1da177e4 LT	27	config RWSEM_GENERIC_SPINLOCK
	28	bool
	29	default y
	30
	31	config RWSEM_XCHGADD_ALGORITHM
	32	bool
	33
1f6d7a93 AM	34	config GENERIC_HWEIGHT
	35	bool
	36	default y
	37
1da177e4 LT	38	config GENERIC_CALIBRATE_DELAY
	39	bool
	40	default n
	41
06027bdd IM	42	config TIME_LOW_RES
	43	bool
	44	default y
	45
8defab33	46	config QUICKLIST
f0d1b0b3 DH	47	bool
	48	default y
	49
8defab33	50	config ARCH_HAS_ILOG2_U32
f0d1b0b3 DH	51	bool
	52	default y
	53
8defab33	54	config ARCH_HAS_ILOG2_U64
81819f0f CL	55	bool
	56	default y
	57
bdc80787 PA	58	config HZ
	59	int
	60	default 1000
	61
1da177e4 LT	62	source "init/Kconfig"
1da177e4 LT	63
dc52ddc0 MH	64	source "kernel/Kconfig.freezer"
dc52ddc0 MH	65
1da177e4 LT	66
	67	menu "Fujitsu FR-V system setup"
	68
	69	config MMU
	70	bool "MMU support"
	71	help
	72	This options switches on and off support for the FR-V MMU
	73	(effectively switching between vmlinux and uClinux). Not all FR-V
	74	CPUs support this. Currently only the FR451 has a sufficiently
	75	featured MMU.
	76
	77	config FRV_OUTOFLINE_ATOMIC_OPS
	78	bool "Out-of-line the FRV atomic operations"
	79	default n
	80	help
	81	Setting this option causes the FR-V atomic operations to be mostly
	82	implemented out-of-line.
	83
0868ff7a	84	See Documentation/frv/atomic-ops.txt for more information.
1da177e4 LT	85
	86	config HIGHMEM
	87	bool "High memory support"
	88	depends on MMU
	89	default y
	90	help
	91	If you wish to use more than 256MB of memory with your MMU based
	92	system, you will need to select this option. The kernel can only see
	93	the memory between 0xC0000000 and 0xD0000000 directly... everything
	94	else must be kmapped.
	95
	96	The arch is, however, capable of supporting up to 3GB of SDRAM.
	97
	98	config HIGHPTE
	99	bool "Allocate page tables in highmem"
	100	depends on HIGHMEM
	101	default y
	102	help
	103	The VM uses one page of memory for each page table. For systems
	104	with a lot of RAM, this can be wasteful of precious low memory.
	105	Setting this option will put user-space page tables in high memory.
	106
3f22ab27 DH	107	source "mm/Kconfig"
3f22ab27 DH	108
1da177e4 LT	109	choice
	110	prompt "uClinux kernel load address"
	111	depends on !MMU
	112	default UCPAGE_OFFSET_C0000000
	113	help
	114	This option sets the base address for the uClinux kernel. The kernel
	115	will rearrange the SDRAM layout to start at this address, and move
	116	itself to start there. It must be greater than 0, and it must be
	117	sufficiently less than 0xE0000000 that the SDRAM does not intersect
	118	the I/O region.
	119
	120	The base address must also be aligned such that the SDRAM controller
	121	can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
	122
	123	config UCPAGE_OFFSET_20000000
	124	bool "0x20000000"
	125
	126	config UCPAGE_OFFSET_40000000
	127	bool "0x40000000"
	128
	129	config UCPAGE_OFFSET_60000000
	130	bool "0x60000000"
	131
	132	config UCPAGE_OFFSET_80000000
	133	bool "0x80000000"
	134
	135	config UCPAGE_OFFSET_A0000000
	136	bool "0xA0000000"
	137
	138	config UCPAGE_OFFSET_C0000000
	139	bool "0xC0000000 (Recommended)"
	140
	141	endchoice
	142
7038220a DH	143	config PAGE_OFFSET
	144	hex
	145	default 0x20000000 if UCPAGE_OFFSET_20000000
	146	default 0x40000000 if UCPAGE_OFFSET_40000000
	147	default 0x60000000 if UCPAGE_OFFSET_60000000
	148	default 0x80000000 if UCPAGE_OFFSET_80000000
	149	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	150	default 0xC0000000
	151
1da177e4 LT	152	config PROTECT_KERNEL
	153	bool "Protect core kernel against userspace"
	154	depends on !MMU
	155	default y
	156	help
	157	Selecting this option causes the uClinux kernel to change the
	158	permittivity of DAMPR register covering the core kernel image to
	159	prevent userspace accessing the underlying memory directly.
	160
	161	choice
	162	prompt "CPU Caching mode"
	163	default FRV_DEFL_CACHE_WBACK
	164	help
	165	This option determines the default caching mode for the kernel.
	166
	167	Write-Back caching mode involves the all reads and writes causing
	168	the affected cacheline to be read into the cache first before being
	169	operated upon. Memory is not then updated by a write until the cache
	170	is filled and a cacheline needs to be displaced from the cache to
	171	make room. Only at that point is it written back.
	172
	173	Write-Behind caching is similar to Write-Back caching, except that a
	174	write won't fetch a cacheline into the cache if there isn't already
	175	one there; it will write directly to memory instead.
	176
	177	Write-Through caching only fetches cachelines from memory on a
	178	read. Writes always get written directly to memory. If the affected
	179	cacheline is also in cache, it will be updated too.
	180
	181	The final option is to turn of caching entirely.
	182
	183	Note that not all CPUs support Write-Behind caching. If the CPU on
	184	which the kernel is running doesn't, it'll fall back to Write-Back
	185	caching.
	186
	187	config FRV_DEFL_CACHE_WBACK
	188	bool "Write-Back"
	189
	190	config FRV_DEFL_CACHE_WBEHIND
	191	bool "Write-Behind"
	192
	193	config FRV_DEFL_CACHE_WTHRU
	194	bool "Write-Through"
	195
	196	config FRV_DEFL_CACHE_DISABLED
	197	bool "Disabled"
	198
	199	endchoice
	200
	201	menu "CPU core support"
	202
	203	config CPU_FR401
	204	bool "Include FR401 core support"
	205	depends on !MMU
	206	default y
	207	help
	208	This enables support for the FR401, FR401A and FR403 CPUs
	209
	210	config CPU_FR405
	211	bool "Include FR405 core support"
	212	depends on !MMU
	213	default y
	214	help
	215	This enables support for the FR405 CPU
216
217	config CPU_FR451
218	bool "Include FR451 core support"
219	default y
220	help
221	This enables support for the FR451 CPU
222
223	config CPU_FR451_COMPILE
224	bool "Specifically compile for FR451 core"
225	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
226	default y
227	help
228	This causes appropriate flags to be passed to the compiler to
229	optimise for the FR451 CPU
230
231	config CPU_FR551
232	bool "Include FR551 core support"
233	depends on !MMU
234	default y
235	help
236	This enables support for the FR555 CPU
237
238	config CPU_FR551_COMPILE
239	bool "Specifically compile for FR551 core"
240	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
241	default y
242	help
243	This causes appropriate flags to be passed to the compiler to
244	optimise for the FR555 CPU
245
246	config FRV_L1_CACHE_SHIFT
247	int
248	default "5" if CPU_FR401 \|\| CPU_FR405 \|\| CPU_FR451
249	default "6" if CPU_FR551
250
251	endmenu
252
253	choice
254	prompt "System support"
255	default MB93091_VDK
256
257	config MB93091_VDK
258	bool "MB93091 CPU board with or without motherboard"
259
260	config MB93093_PDK
261	bool "MB93093 PDK unit"
262
263	endchoice
264
265	if MB93091_VDK
266	choice
267	prompt "Motherboard support"
268	default MB93090_MB00
269
270	config MB93090_MB00
271	bool "Use the MB93090-MB00 motherboard"
272	help
273	Select this option if the MB93091 CPU board is going to be used with
274	a MB93090-MB00 VDK motherboard
275
276	config MB93091_NO_MB
277	bool "Use standalone"
278	help
279	Select this option if the MB93091 CPU board is going to be used
280	without a motherboard
281
282	endchoice
283	endif
284
1bcbba30 DH	285	config FUJITSU_MB93493
	286	bool "MB93493 Multimedia chip"
	287	help
	288	Select this option if the MB93493 multimedia chip is going to be
	289	used.
	290
1da177e4 LT	291	choice
	292	prompt "GP-Relative data support"
	293	default GPREL_DATA_8
	294	help
	295	This option controls what data, if any, should be placed in the GP
	296	relative data sections. Using this means that the compiler can
	297	generate accesses to the data using GR16-relative addressing which
	298	is faster than absolute instructions and saves space (2 instructions
	299	per access).
	300
	301	However, the GPREL region is limited in size because the immediate
	302	value used in the load and store instructions is limited to a 12-bit
	303	signed number.
	304
	305	So if the linker starts complaining that accesses to GPREL data are
	306	out of range, try changing this option from the default.
	307
	308	Note that modules will always be compiled with this feature disabled
	309	as the module data will not be in range of the GP base address.
	310
	311	config GPREL_DATA_8
	312	bool "Put data objects of up to 8 bytes into GP-REL"
	313
	314	config GPREL_DATA_4
	315	bool "Put data objects of up to 4 bytes into GP-REL"
	316
	317	config GPREL_DATA_NONE
	318	bool "Don't use GP-REL"
	319
	320	endchoice
	321
f8aec757 DH	322	config FRV_ONCPU_SERIAL
	323	bool "Use on-CPU serial ports"
	324	select SERIAL_8250
	325	default y
	326
1da177e4 LT	327	config PCI
	328	bool "Use PCI"
	329	depends on MB93090_MB00
	330	default y
53224185	331	select GENERIC_PCI_IOMAP
1da177e4 LT	332	help
	333	Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	334	onboard. If you have one of these boards and you wish to use the PCI
	335	facilities, say Y here.
	336
1da177e4 LT	337	config RESERVE_DMA_COHERENT
	338	bool "Reserve DMA coherent memory"
	339	depends on PCI && !MMU
	340	default y
	341	help
	342	Many PCI drivers require access to uncached memory for DMA device
	343	communications (such as is done with some Ethernet buffer rings). If
	344	a fully featured MMU is available, this can be done through page
	345	table settings, but if not, a region has to be set aside and marked
	346	with a special DAMPR register.
	347
	348	Setting this option causes uClinux to set aside a portion of the
	349	available memory for use in this manner. The memory will then be
	350	unavailable for normal kernel use.
	351
	352	source "drivers/pci/Kconfig"
	353
7a758313	354	source "drivers/pcmcia/Kconfig"
1da177e4	355
1da177e4	356	menu "Power management options"
f4cb5700 JB	357
	358	config ARCH_SUSPEND_POSSIBLE
	359	def_bool y
f4cb5700	360
1da177e4 LT	361	source kernel/power/Kconfig
	362	endmenu
	363
	364	endmenu
	365
	366
	367	menu "Executable formats"
	368
	369	source "fs/Kconfig.binfmt"
	370
	371	endmenu
	372
d5950b43 SR	373	source "net/Kconfig"
d5950b43 SR	374
1da177e4 LT	375	source "drivers/Kconfig"
	376
	377	source "fs/Kconfig"
	378
	379	source "arch/frv/Kconfig.debug"
	380
	381	source "security/Kconfig"
	382
	383	source "crypto/Kconfig"
	384
	385	source "lib/Kconfig"