Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c32e64e8 GR |
2 | config CSKY |
3 | def_bool y | |
942fa985 | 4 | select ARCH_32BIT_OFF_T |
13bf5ced | 5 | select ARCH_HAS_DMA_PREP_COHERENT |
de863678 | 6 | select ARCH_HAS_GCOV_PROFILE_ALL |
c32e64e8 GR |
7 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
8 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE | |
9 | select ARCH_USE_BUILTIN_BSWAP | |
8e35ac73 | 10 | select ARCH_USE_QUEUED_RWLOCKS |
45e15c1a | 11 | select ARCH_USE_QUEUED_SPINLOCKS |
b203c67e | 12 | select ARCH_HAS_CURRENT_STACK_POINTER |
7f8030ce GR |
13 | select ARCH_INLINE_READ_LOCK if !PREEMPTION |
14 | select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION | |
15 | select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION | |
16 | select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION | |
17 | select ARCH_INLINE_READ_UNLOCK if !PREEMPTION | |
18 | select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION | |
19 | select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION | |
20 | select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION | |
21 | select ARCH_INLINE_WRITE_LOCK if !PREEMPTION | |
22 | select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION | |
23 | select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION | |
24 | select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION | |
25 | select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION | |
26 | select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION | |
27 | select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION | |
28 | select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION | |
29 | select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION | |
30 | select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION | |
31 | select ARCH_INLINE_SPIN_LOCK if !PREEMPTION | |
32 | select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION | |
33 | select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION | |
34 | select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION | |
35 | select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION | |
36 | select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION | |
37 | select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION | |
38 | select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION | |
aeba0b84 | 39 | select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace) |
953131e5 | 40 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT |
c32e64e8 GR |
41 | select COMMON_CLK |
42 | select CLKSRC_MMIO | |
1994cc49 GR |
43 | select CSKY_MPINTC if CPU_CK860 |
44 | select CSKY_MP_TIMER if CPU_CK860 | |
45 | select CSKY_APB_INTC | |
f04b951f | 46 | select DMA_DIRECT_REMAP |
c32e64e8 | 47 | select IRQ_DOMAIN |
c32e64e8 | 48 | select DW_APB_TIMER_OF |
0055f67b | 49 | select GENERIC_IOREMAP |
c32e64e8 GR |
50 | select GENERIC_LIB_ASHLDI3 |
51 | select GENERIC_LIB_ASHRDI3 | |
52 | select GENERIC_LIB_LSHRDI3 | |
53 | select GENERIC_LIB_MULDI3 | |
54 | select GENERIC_LIB_CMPDI2 | |
55 | select GENERIC_LIB_UCMPDI2 | |
56 | select GENERIC_ALLOCATOR | |
57 | select GENERIC_ATOMIC64 | |
c32e64e8 GR |
58 | select GENERIC_CPU_DEVICES |
59 | select GENERIC_IRQ_CHIP | |
60 | select GENERIC_IRQ_PROBE | |
61 | select GENERIC_IRQ_SHOW | |
62 | select GENERIC_IRQ_MULTI_HANDLER | |
63 | select GENERIC_SCHED_CLOCK | |
64 | select GENERIC_SMP_IDLE_THREAD | |
0d3b051a GR |
65 | select GENERIC_TIME_VSYSCALL |
66 | select GENERIC_VDSO_32 | |
67 | select GENERIC_GETTIMEOFDAY | |
1994cc49 | 68 | select GX6605S_TIMER if CPU_CK610 |
c32e64e8 | 69 | select HAVE_ARCH_TRACEHOOK |
2f7932b0 | 70 | select HAVE_ARCH_AUDITSYSCALL |
4e8bb4ba GR |
71 | select HAVE_ARCH_JUMP_LABEL if !CPU_CK610 |
72 | select HAVE_ARCH_JUMP_LABEL_RELATIVE | |
953131e5 | 73 | select HAVE_ARCH_MMAP_RND_BITS |
e95a4f8c | 74 | select HAVE_ARCH_SECCOMP_FILTER |
24a9c541 | 75 | select HAVE_CONTEXT_TRACKING_USER |
bdcd93ef | 76 | select HAVE_VIRT_CPU_ACCOUNTING_GEN |
18c07d23 | 77 | select HAVE_DEBUG_BUGVERBOSE |
c109f424 | 78 | select HAVE_DEBUG_KMEMLEAK |
28bb030f | 79 | select HAVE_DYNAMIC_FTRACE |
89a3927a | 80 | select HAVE_DYNAMIC_FTRACE_WITH_REGS |
0d3b051a | 81 | select HAVE_GENERIC_VDSO |
230c77a5 | 82 | select HAVE_FUNCTION_TRACER |
d7950be1 | 83 | select HAVE_FUNCTION_GRAPH_TRACER |
71e193d7 | 84 | select HAVE_FUNCTION_ERROR_INJECTION |
28bb030f | 85 | select HAVE_FTRACE_MCOUNT_RECORD |
c32e64e8 GR |
86 | select HAVE_KERNEL_GZIP |
87 | select HAVE_KERNEL_LZO | |
88 | select HAVE_KERNEL_LZMA | |
33e53ae1 GR |
89 | select HAVE_KPROBES if !CPU_CK610 |
90 | select HAVE_KPROBES_ON_FTRACE if !CPU_CK610 | |
91 | select HAVE_KRETPROBES if !CPU_CK610 | |
f50fd2d8 | 92 | select HAVE_PERF_EVENTS |
daac95e7 MH |
93 | select HAVE_PERF_REGS |
94 | select HAVE_PERF_USER_STACK_DUMP | |
c32e64e8 | 95 | select HAVE_DMA_CONTIGUOUS |
bfe47f35 | 96 | select HAVE_REGS_AND_STACK_ACCESS_API |
2f78c73f | 97 | select HAVE_STACKPROTECTOR |
2f7932b0 | 98 | select HAVE_SYSCALL_TRACEPOINTS |
7202e979 | 99 | select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU |
a050ba1e | 100 | select LOCK_MM_AND_FIND_VMA |
c32e64e8 GR |
101 | select MAY_HAVE_SPARSE_IRQ |
102 | select MODULES_USE_ELF_RELA if MODULES | |
c32e64e8 GR |
103 | select OF |
104 | select OF_EARLY_FLATTREE | |
f50fd2d8 | 105 | select PERF_USE_VMALLOC if CPU_CK610 |
c32e64e8 GR |
106 | select RTC_LIB |
107 | select TIMER_OF | |
5b49c82d M |
108 | select GENERIC_PCI_IOMAP |
109 | select HAVE_PCI | |
110 | select PCI_DOMAINS_GENERIC if PCI | |
111 | select PCI_SYSCALL if PCI | |
112 | select PCI_MSI if PCI | |
4aae683f | 113 | select TRACE_IRQFLAGS_SUPPORT |
c32e64e8 | 114 | |
000591f1 GR |
115 | config LOCKDEP_SUPPORT |
116 | def_bool y | |
117 | ||
8f6bb793 GR |
118 | config ARCH_SUPPORTS_UPROBES |
119 | def_bool y if !CPU_CK610 | |
120 | ||
c32e64e8 GR |
121 | config CPU_HAS_CACHEV2 |
122 | bool | |
123 | ||
124 | config CPU_HAS_FPUV2 | |
125 | bool | |
126 | ||
127 | config CPU_HAS_HILO | |
128 | bool | |
129 | ||
130 | config CPU_HAS_TLBI | |
131 | bool | |
132 | ||
133 | config CPU_HAS_LDSTEX | |
134 | bool | |
135 | help | |
bebd26ab | 136 | For SMP, CPU needs "ldex&stex" instructions for atomic operations. |
c32e64e8 GR |
137 | |
138 | config CPU_NEED_TLBSYNC | |
139 | bool | |
140 | ||
141 | config CPU_NEED_SOFTALIGN | |
142 | bool | |
143 | ||
144 | config CPU_NO_USER_BKPT | |
145 | bool | |
146 | help | |
147 | For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because | |
148 | abiv2 is 16/32bit instruction set and "trap 1" is 32bit. | |
149 | So we need a 16bit instruction as user space bkpt, and it will cause an illegal | |
150 | instruction exception. | |
151 | In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. | |
152 | ||
153 | config GENERIC_CALIBRATE_DELAY | |
154 | def_bool y | |
155 | ||
156 | config GENERIC_CSUM | |
157 | def_bool y | |
158 | ||
159 | config GENERIC_HWEIGHT | |
160 | def_bool y | |
161 | ||
162 | config MMU | |
163 | def_bool y | |
164 | ||
0ea2dc7c GR |
165 | config STACKTRACE_SUPPORT |
166 | def_bool y | |
167 | ||
c32e64e8 GR |
168 | config TIME_LOW_RES |
169 | def_bool y | |
170 | ||
c32e64e8 GR |
171 | config CPU_ASID_BITS |
172 | int | |
173 | default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) | |
174 | default "12" if (CPU_CK860) | |
175 | ||
176 | config L1_CACHE_SHIFT | |
177 | int | |
178 | default "4" if (CPU_CK610) | |
179 | default "5" if (CPU_CK807 || CPU_CK810) | |
180 | default "6" if (CPU_CK860) | |
181 | ||
953131e5 GR |
182 | config ARCH_MMAP_RND_BITS_MIN |
183 | default 8 | |
184 | ||
185 | # max bits determined by the following formula: | |
186 | # VA_BITS - PAGE_SHIFT - 3 | |
187 | config ARCH_MMAP_RND_BITS_MAX | |
188 | default 17 | |
189 | ||
c32e64e8 GR |
190 | menu "Processor type and features" |
191 | ||
192 | choice | |
193 | prompt "CPU MODEL" | |
194 | default CPU_CK807 | |
195 | ||
196 | config CPU_CK610 | |
197 | bool "CSKY CPU ck610" | |
198 | select CPU_NEED_TLBSYNC | |
199 | select CPU_NEED_SOFTALIGN | |
200 | select CPU_NO_USER_BKPT | |
201 | ||
202 | config CPU_CK810 | |
203 | bool "CSKY CPU ck810" | |
204 | select CPU_HAS_HILO | |
205 | select CPU_NEED_TLBSYNC | |
206 | ||
207 | config CPU_CK807 | |
208 | bool "CSKY CPU ck807" | |
209 | select CPU_HAS_HILO | |
210 | ||
211 | config CPU_CK860 | |
212 | bool "CSKY CPU ck860" | |
213 | select CPU_HAS_TLBI | |
214 | select CPU_HAS_CACHEV2 | |
215 | select CPU_HAS_LDSTEX | |
216 | select CPU_HAS_FPUV2 | |
217 | endchoice | |
218 | ||
f50fd2d8 | 219 | choice |
0c8a32ee GR |
220 | prompt "PAGE OFFSET" |
221 | default PAGE_OFFSET_80000000 | |
222 | ||
223 | config PAGE_OFFSET_80000000 | |
224 | bool "PAGE OFFSET 2G (user:kernel = 2:2)" | |
225 | ||
226 | config PAGE_OFFSET_A0000000 | |
227 | bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)" | |
228 | endchoice | |
229 | ||
230 | config PAGE_OFFSET | |
231 | hex | |
232 | default 0x80000000 if PAGE_OFFSET_80000000 | |
233 | default 0xa0000000 if PAGE_OFFSET_A0000000 | |
234 | choice | |
235 | ||
f50fd2d8 GR |
236 | prompt "C-SKY PMU type" |
237 | depends on PERF_EVENTS | |
238 | depends on CPU_CK807 || CPU_CK810 || CPU_CK860 | |
239 | ||
240 | config CPU_PMU_NONE | |
241 | bool "None" | |
242 | ||
243 | config CSKY_PMU_V1 | |
244 | bool "Performance Monitoring Unit Ver.1" | |
245 | ||
246 | endchoice | |
247 | ||
c32e64e8 GR |
248 | choice |
249 | prompt "Power Manager Instruction (wait/doze/stop)" | |
250 | default CPU_PM_NONE | |
251 | ||
252 | config CPU_PM_NONE | |
253 | bool "None" | |
254 | ||
255 | config CPU_PM_WAIT | |
256 | bool "wait" | |
257 | ||
258 | config CPU_PM_DOZE | |
259 | bool "doze" | |
260 | ||
261 | config CPU_PM_STOP | |
262 | bool "stop" | |
263 | endchoice | |
264 | ||
f525bb2c GR |
265 | menuconfig HAVE_TCM |
266 | bool "Tightly-Coupled/Sram Memory" | |
e21e52ad | 267 | depends on !COMPILE_TEST |
f525bb2c | 268 | help |
ce0ba954 | 269 | The implementation are not only used by TCM (Tightly-Coupled Memory) |
f525bb2c GR |
270 | but also used by sram on SOC bus. It follow existed linux tcm |
271 | software interface, so that old tcm application codes could be | |
272 | re-used directly. | |
273 | ||
274 | if HAVE_TCM | |
275 | config ITCM_RAM_BASE | |
276 | hex "ITCM ram base" | |
277 | default 0xffffffff | |
278 | ||
279 | config ITCM_NR_PAGES | |
280 | int "Page count of ITCM size: NR*4KB" | |
281 | range 1 256 | |
282 | default 32 | |
283 | ||
284 | config HAVE_DTCM | |
285 | bool "DTCM Support" | |
286 | ||
287 | config DTCM_RAM_BASE | |
288 | hex "DTCM ram base" | |
289 | depends on HAVE_DTCM | |
290 | default 0xffffffff | |
291 | ||
292 | config DTCM_NR_PAGES | |
293 | int "Page count of DTCM size: NR*4KB" | |
294 | depends on HAVE_DTCM | |
295 | range 1 256 | |
296 | default 32 | |
297 | endif | |
298 | ||
c32e64e8 GR |
299 | config CPU_HAS_VDSP |
300 | bool "CPU has VDSP coprocessor" | |
301 | depends on CPU_HAS_FPU && CPU_HAS_FPUV2 | |
302 | ||
303 | config CPU_HAS_FPU | |
304 | bool "CPU has FPU coprocessor" | |
305 | depends on CPU_CK807 || CPU_CK810 || CPU_CK860 | |
306 | ||
761b4f69 GR |
307 | config CPU_HAS_ICACHE_INS |
308 | bool "CPU has Icache invalidate instructions" | |
309 | depends on CPU_HAS_CACHEV2 | |
310 | ||
c32e64e8 GR |
311 | config CPU_HAS_TEE |
312 | bool "CPU has Trusted Execution Environment" | |
313 | depends on CPU_CK810 | |
314 | ||
315 | config SMP | |
316 | bool "Symmetric Multi-Processing (SMP) support for C-SKY" | |
317 | depends on CPU_CK860 | |
318 | default n | |
319 | ||
320 | config NR_CPUS | |
321 | int "Maximum number of CPUs (2-32)" | |
322 | range 2 32 | |
323 | depends on SMP | |
50d23a1c | 324 | default "4" |
c32e64e8 GR |
325 | |
326 | config HIGHMEM | |
327 | bool "High Memory Support" | |
328 | depends on !CPU_CK610 | |
5af627a0 | 329 | select KMAP_LOCAL |
c32e64e8 GR |
330 | default y |
331 | ||
d1991616 | 332 | config DRAM_BASE |
c32e64e8 GR |
333 | hex "DRAM start addr (the same with memory-section in dts)" |
334 | default 0x0 | |
335 | ||
859e5f45 GR |
336 | config HOTPLUG_CPU |
337 | bool "Support for hot-pluggable CPUs" | |
338 | select GENERIC_IRQ_MIGRATION | |
339 | depends on SMP | |
340 | help | |
341 | Say Y here to allow turning CPUs off and on. CPUs can be | |
342 | controlled through /sys/devices/system/cpu/cpu1/hotplug/target. | |
343 | ||
344 | Say N if you want to disable CPU hotplug. | |
e4df2d5e MC |
345 | |
346 | config HAVE_EFFICIENT_UNALIGNED_STRING_OPS | |
347 | bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2" | |
348 | depends on CPU_CK807 || CPU_CK810 || CPU_CK860 | |
349 | help | |
350 | Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could | |
351 | deal with unaligned access by hardware. | |
352 | ||
c32e64e8 GR |
353 | endmenu |
354 | ||
a736fa1e GR |
355 | source "arch/csky/Kconfig.platforms" |
356 | ||
c32e64e8 | 357 | source "kernel/Kconfig.hz" |