License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[linux-2.6-block.git] / arch / cris / include / arch-v32 / mach-a3 / mach / hwregs / pinmux_defs.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
58d08319
JN
2#ifndef __pinmux_defs_h
3#define __pinmux_defs_h
4
5/*
6 * This file is autogenerated from
7 * file: pinmux.r
8 *
9 * by ../../../tools/rdesc/bin/rdes2c -outfile pinmux_defs.h pinmux.r
10 * Any changes here will be lost.
11 *
12 * -*- buffer-read-only: t -*-
13 */
14/* Main access macros */
15#ifndef REG_RD
16#define REG_RD( scope, inst, reg ) \
17 REG_READ( reg_##scope##_##reg, \
18 (inst) + REG_RD_ADDR_##scope##_##reg )
19#endif
20
21#ifndef REG_WR
22#define REG_WR( scope, inst, reg, val ) \
23 REG_WRITE( reg_##scope##_##reg, \
24 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
25#endif
26
27#ifndef REG_RD_VECT
28#define REG_RD_VECT( scope, inst, reg, index ) \
29 REG_READ( reg_##scope##_##reg, \
30 (inst) + REG_RD_ADDR_##scope##_##reg + \
31 (index) * STRIDE_##scope##_##reg )
32#endif
33
34#ifndef REG_WR_VECT
35#define REG_WR_VECT( scope, inst, reg, index, val ) \
36 REG_WRITE( reg_##scope##_##reg, \
37 (inst) + REG_WR_ADDR_##scope##_##reg + \
38 (index) * STRIDE_##scope##_##reg, (val) )
39#endif
40
41#ifndef REG_RD_INT
42#define REG_RD_INT( scope, inst, reg ) \
43 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
44#endif
45
46#ifndef REG_WR_INT
47#define REG_WR_INT( scope, inst, reg, val ) \
48 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
49#endif
50
51#ifndef REG_RD_INT_VECT
52#define REG_RD_INT_VECT( scope, inst, reg, index ) \
53 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
54 (index) * STRIDE_##scope##_##reg )
55#endif
56
57#ifndef REG_WR_INT_VECT
58#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
59 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
60 (index) * STRIDE_##scope##_##reg, (val) )
61#endif
62
63#ifndef REG_TYPE_CONV
64#define REG_TYPE_CONV( type, orgtype, val ) \
65 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
66#endif
67
68#ifndef reg_page_size
69#define reg_page_size 8192
70#endif
71
72#ifndef REG_ADDR
73#define REG_ADDR( scope, inst, reg ) \
74 ( (inst) + REG_RD_ADDR_##scope##_##reg )
75#endif
76
77#ifndef REG_ADDR_VECT
78#define REG_ADDR_VECT( scope, inst, reg, index ) \
79 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
80 (index) * STRIDE_##scope##_##reg )
81#endif
82
83/* C-code for register scope pinmux */
84
85/* Register rw_hwprot, scope pinmux, type rw */
86typedef struct {
87 unsigned int eth : 1;
88 unsigned int eth_mdio : 1;
89 unsigned int geth : 1;
90 unsigned int tg : 1;
91 unsigned int tg_clk : 1;
92 unsigned int vout : 1;
93 unsigned int vout_sync : 1;
94 unsigned int ser1 : 1;
95 unsigned int ser2 : 1;
96 unsigned int ser3 : 1;
97 unsigned int ser4 : 1;
98 unsigned int sser : 1;
99 unsigned int pwm0 : 1;
100 unsigned int pwm1 : 1;
101 unsigned int pwm2 : 1;
102 unsigned int timer0 : 1;
103 unsigned int timer1 : 1;
104 unsigned int pio : 1;
105 unsigned int i2c0 : 1;
106 unsigned int i2c1 : 1;
107 unsigned int i2c1_sda1 : 1;
108 unsigned int i2c1_sda2 : 1;
109 unsigned int i2c1_sda3 : 1;
110 unsigned int i2c1_sen : 1;
111 unsigned int dummy1 : 8;
112} reg_pinmux_rw_hwprot;
113#define REG_RD_ADDR_pinmux_rw_hwprot 0
114#define REG_WR_ADDR_pinmux_rw_hwprot 0
115
116/* Register rw_gio_pa, scope pinmux, type rw */
117typedef struct {
118 unsigned int pa0 : 1;
119 unsigned int pa1 : 1;
120 unsigned int pa2 : 1;
121 unsigned int pa3 : 1;
122 unsigned int pa4 : 1;
123 unsigned int pa5 : 1;
124 unsigned int pa6 : 1;
125 unsigned int pa7 : 1;
126 unsigned int pa8 : 1;
127 unsigned int pa9 : 1;
128 unsigned int pa10 : 1;
129 unsigned int pa11 : 1;
130 unsigned int pa12 : 1;
131 unsigned int pa13 : 1;
132 unsigned int pa14 : 1;
133 unsigned int pa15 : 1;
134 unsigned int pa16 : 1;
135 unsigned int pa17 : 1;
136 unsigned int pa18 : 1;
137 unsigned int pa19 : 1;
138 unsigned int pa20 : 1;
139 unsigned int pa21 : 1;
140 unsigned int pa22 : 1;
141 unsigned int pa23 : 1;
142 unsigned int pa24 : 1;
143 unsigned int pa25 : 1;
144 unsigned int pa26 : 1;
145 unsigned int pa27 : 1;
146 unsigned int pa28 : 1;
147 unsigned int pa29 : 1;
148 unsigned int pa30 : 1;
149 unsigned int pa31 : 1;
150} reg_pinmux_rw_gio_pa;
151#define REG_RD_ADDR_pinmux_rw_gio_pa 4
152#define REG_WR_ADDR_pinmux_rw_gio_pa 4
153
154/* Register rw_gio_pb, scope pinmux, type rw */
155typedef struct {
156 unsigned int pb0 : 1;
157 unsigned int pb1 : 1;
158 unsigned int pb2 : 1;
159 unsigned int pb3 : 1;
160 unsigned int pb4 : 1;
161 unsigned int pb5 : 1;
162 unsigned int pb6 : 1;
163 unsigned int pb7 : 1;
164 unsigned int pb8 : 1;
165 unsigned int pb9 : 1;
166 unsigned int pb10 : 1;
167 unsigned int pb11 : 1;
168 unsigned int pb12 : 1;
169 unsigned int pb13 : 1;
170 unsigned int pb14 : 1;
171 unsigned int pb15 : 1;
172 unsigned int pb16 : 1;
173 unsigned int pb17 : 1;
174 unsigned int pb18 : 1;
175 unsigned int pb19 : 1;
176 unsigned int pb20 : 1;
177 unsigned int pb21 : 1;
178 unsigned int pb22 : 1;
179 unsigned int pb23 : 1;
180 unsigned int pb24 : 1;
181 unsigned int pb25 : 1;
182 unsigned int pb26 : 1;
183 unsigned int pb27 : 1;
184 unsigned int pb28 : 1;
185 unsigned int pb29 : 1;
186 unsigned int pb30 : 1;
187 unsigned int pb31 : 1;
188} reg_pinmux_rw_gio_pb;
189#define REG_RD_ADDR_pinmux_rw_gio_pb 8
190#define REG_WR_ADDR_pinmux_rw_gio_pb 8
191
192/* Register rw_gio_pc, scope pinmux, type rw */
193typedef struct {
194 unsigned int pc0 : 1;
195 unsigned int pc1 : 1;
196 unsigned int pc2 : 1;
197 unsigned int pc3 : 1;
198 unsigned int pc4 : 1;
199 unsigned int pc5 : 1;
200 unsigned int pc6 : 1;
201 unsigned int pc7 : 1;
202 unsigned int pc8 : 1;
203 unsigned int pc9 : 1;
204 unsigned int pc10 : 1;
205 unsigned int pc11 : 1;
206 unsigned int pc12 : 1;
207 unsigned int pc13 : 1;
208 unsigned int pc14 : 1;
209 unsigned int pc15 : 1;
210 unsigned int dummy1 : 16;
211} reg_pinmux_rw_gio_pc;
212#define REG_RD_ADDR_pinmux_rw_gio_pc 12
213#define REG_WR_ADDR_pinmux_rw_gio_pc 12
214
215/* Register rw_iop_pa, scope pinmux, type rw */
216typedef struct {
217 unsigned int pa0 : 1;
218 unsigned int pa1 : 1;
219 unsigned int pa2 : 1;
220 unsigned int pa3 : 1;
221 unsigned int pa4 : 1;
222 unsigned int pa5 : 1;
223 unsigned int pa6 : 1;
224 unsigned int pa7 : 1;
225 unsigned int pa8 : 1;
226 unsigned int pa9 : 1;
227 unsigned int pa10 : 1;
228 unsigned int pa11 : 1;
229 unsigned int pa12 : 1;
230 unsigned int pa13 : 1;
231 unsigned int pa14 : 1;
232 unsigned int pa15 : 1;
233 unsigned int pa16 : 1;
234 unsigned int pa17 : 1;
235 unsigned int pa18 : 1;
236 unsigned int pa19 : 1;
237 unsigned int pa20 : 1;
238 unsigned int pa21 : 1;
239 unsigned int pa22 : 1;
240 unsigned int pa23 : 1;
241 unsigned int pa24 : 1;
242 unsigned int pa25 : 1;
243 unsigned int pa26 : 1;
244 unsigned int pa27 : 1;
245 unsigned int pa28 : 1;
246 unsigned int pa29 : 1;
247 unsigned int pa30 : 1;
248 unsigned int pa31 : 1;
249} reg_pinmux_rw_iop_pa;
250#define REG_RD_ADDR_pinmux_rw_iop_pa 16
251#define REG_WR_ADDR_pinmux_rw_iop_pa 16
252
253/* Register rw_iop_pb, scope pinmux, type rw */
254typedef struct {
255 unsigned int pb0 : 1;
256 unsigned int pb1 : 1;
257 unsigned int pb2 : 1;
258 unsigned int pb3 : 1;
259 unsigned int pb4 : 1;
260 unsigned int pb5 : 1;
261 unsigned int pb6 : 1;
262 unsigned int pb7 : 1;
263 unsigned int dummy1 : 24;
264} reg_pinmux_rw_iop_pb;
265#define REG_RD_ADDR_pinmux_rw_iop_pb 20
266#define REG_WR_ADDR_pinmux_rw_iop_pb 20
267
268/* Register rw_iop_pio, scope pinmux, type rw */
269typedef struct {
270 unsigned int d0 : 1;
271 unsigned int d1 : 1;
272 unsigned int d2 : 1;
273 unsigned int d3 : 1;
274 unsigned int d4 : 1;
275 unsigned int d5 : 1;
276 unsigned int d6 : 1;
277 unsigned int d7 : 1;
278 unsigned int rd_n : 1;
279 unsigned int wr_n : 1;
280 unsigned int a0 : 1;
281 unsigned int a1 : 1;
282 unsigned int ce0_n : 1;
283 unsigned int ce1_n : 1;
284 unsigned int ce2_n : 1;
285 unsigned int rdy : 1;
286 unsigned int dummy1 : 16;
287} reg_pinmux_rw_iop_pio;
288#define REG_RD_ADDR_pinmux_rw_iop_pio 24
289#define REG_WR_ADDR_pinmux_rw_iop_pio 24
290
291/* Register rw_iop_usb, scope pinmux, type rw */
292typedef struct {
293 unsigned int usb0 : 1;
294 unsigned int dummy1 : 31;
295} reg_pinmux_rw_iop_usb;
296#define REG_RD_ADDR_pinmux_rw_iop_usb 28
297#define REG_WR_ADDR_pinmux_rw_iop_usb 28
298
299
300/* Constants */
301enum {
302 regk_pinmux_no = 0x00000000,
303 regk_pinmux_rw_gio_pa_default = 0x00000000,
304 regk_pinmux_rw_gio_pb_default = 0x00000000,
305 regk_pinmux_rw_gio_pc_default = 0x00000000,
306 regk_pinmux_rw_hwprot_default = 0x00000000,
307 regk_pinmux_rw_iop_pa_default = 0x00000000,
308 regk_pinmux_rw_iop_pb_default = 0x00000000,
309 regk_pinmux_rw_iop_pio_default = 0x00000000,
310 regk_pinmux_rw_iop_usb_default = 0x00000001,
311 regk_pinmux_yes = 0x00000001
312};
313#endif /* __pinmux_defs_h */