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License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[linux-2.6-block.git] / arch / cris / include / arch-v32 / mach-a3 / mach / hwregs / intr_vect_defs.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
58d08319
JN		 2#ifndef __intr_vect_defs_h
3#define __intr_vect_defs_h
4
5/*
6 * This file is autogenerated from
7 * file: intr_vect.r
8 *
9 * by ../../../tools/rdesc/bin/rdes2c -outfile intr_vect_defs.h intr_vect.r
10 * Any changes here will be lost.
11 *
12 * -*- buffer-read-only: t -*-
13 */
14/* Main access macros */
15#ifndef REG_RD
16#define REG_RD( scope, inst, reg ) \
17 REG_READ( reg_##scope##_##reg, \
18 (inst) + REG_RD_ADDR_##scope##_##reg )
19#endif
20
21#ifndef REG_WR
22#define REG_WR( scope, inst, reg, val ) \
23 REG_WRITE( reg_##scope##_##reg, \
24 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
25#endif
26
27#ifndef REG_RD_VECT
28#define REG_RD_VECT( scope, inst, reg, index ) \
29 REG_READ( reg_##scope##_##reg, \
30 (inst) + REG_RD_ADDR_##scope##_##reg + \
31 (index) * STRIDE_##scope##_##reg )
32#endif
33
34#ifndef REG_WR_VECT
35#define REG_WR_VECT( scope, inst, reg, index, val ) \
36 REG_WRITE( reg_##scope##_##reg, \
37 (inst) + REG_WR_ADDR_##scope##_##reg + \
38 (index) * STRIDE_##scope##_##reg, (val) )
39#endif
40
41#ifndef REG_RD_INT
42#define REG_RD_INT( scope, inst, reg ) \
43 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
44#endif
45
46#ifndef REG_WR_INT
47#define REG_WR_INT( scope, inst, reg, val ) \
48 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
49#endif
50
51#ifndef REG_RD_INT_VECT
52#define REG_RD_INT_VECT( scope, inst, reg, index ) \
53 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
54 (index) * STRIDE_##scope##_##reg )
55#endif
56
57#ifndef REG_WR_INT_VECT
58#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
59 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
60 (index) * STRIDE_##scope##_##reg, (val) )
61#endif
62
63#ifndef REG_TYPE_CONV
64#define REG_TYPE_CONV( type, orgtype, val ) \
65 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
66#endif
67
68#ifndef reg_page_size
69#define reg_page_size 8192
70#endif
71
72#ifndef REG_ADDR
73#define REG_ADDR( scope, inst, reg ) \
74 ( (inst) + REG_RD_ADDR_##scope##_##reg )
75#endif
76
77#ifndef REG_ADDR_VECT
78#define REG_ADDR_VECT( scope, inst, reg, index ) \
79 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
80 (index) * STRIDE_##scope##_##reg )
81#endif
82
83/* C-code for register scope intr_vect */
84
85
86#define STRIDE_intr_vect_rw_mask 4
87/* Register rw_mask0, scope intr_vect, type rw */
88typedef struct {
89 unsigned int timer0 : 1;
90 unsigned int timer1 : 1;
91 unsigned int dma0 : 1;
92 unsigned int dma1 : 1;
93 unsigned int dma2 : 1;
94 unsigned int dma3 : 1;
95 unsigned int dma4 : 1;
96 unsigned int dma5 : 1;
97 unsigned int dma6 : 1;
98 unsigned int dma7 : 1;
99 unsigned int dma9 : 1;
100 unsigned int dma11 : 1;
101 unsigned int gio : 1;
102 unsigned int iop0 : 1;
103 unsigned int iop1 : 1;
104 unsigned int ser0 : 1;
105 unsigned int ser1 : 1;
106 unsigned int ser2 : 1;
107 unsigned int ser3 : 1;
108 unsigned int ser4 : 1;
109 unsigned int sser : 1;
110 unsigned int strdma0 : 1;
111 unsigned int strdma1 : 1;
112 unsigned int strdma2 : 1;
113 unsigned int strdma3 : 1;
114 unsigned int strdma5 : 1;
115 unsigned int vin : 1;
116 unsigned int vout : 1;
117 unsigned int jpeg : 1;
118 unsigned int h264 : 1;
119 unsigned int histo : 1;
120 unsigned int ccd : 1;
121} reg_intr_vect_rw_mask0;
122#define reg_intr_vect_rw_mask reg_intr_vect_rw_mask0
123#define REG_RD_ADDR_intr_vect_rw_mask 0
124#define REG_WR_ADDR_intr_vect_rw_mask 0
125#define REG_RD_ADDR_intr_vect_rw_mask0 0
126#define REG_WR_ADDR_intr_vect_rw_mask0 0
127
128#define STRIDE_intr_vect_r_vect 4
129/* Register r_vect0, scope intr_vect, type r */
130typedef struct {
131 unsigned int timer0 : 1;
132 unsigned int timer1 : 1;
133 unsigned int dma0 : 1;
134 unsigned int dma1 : 1;
135 unsigned int dma2 : 1;
136 unsigned int dma3 : 1;
137 unsigned int dma4 : 1;
138 unsigned int dma5 : 1;
139 unsigned int dma6 : 1;
140 unsigned int dma7 : 1;
141 unsigned int dma9 : 1;
142 unsigned int dma11 : 1;
143 unsigned int gio : 1;
144 unsigned int iop0 : 1;
145 unsigned int iop1 : 1;
146 unsigned int ser0 : 1;
147 unsigned int ser1 : 1;
148 unsigned int ser2 : 1;
149 unsigned int ser3 : 1;
150 unsigned int ser4 : 1;
151 unsigned int sser : 1;
152 unsigned int strdma0 : 1;
153 unsigned int strdma1 : 1;
154 unsigned int strdma2 : 1;
155 unsigned int strdma3 : 1;
156 unsigned int strdma5 : 1;
157 unsigned int vin : 1;
158 unsigned int vout : 1;
159 unsigned int jpeg : 1;
160 unsigned int h264 : 1;
161 unsigned int histo : 1;
162 unsigned int ccd : 1;
163} reg_intr_vect_r_vect0;
164#define reg_intr_vect_r_vect reg_intr_vect_r_vect0
165#define REG_RD_ADDR_intr_vect_r_vect 8
166#define REG_RD_ADDR_intr_vect_r_vect0 8
167
168#define STRIDE_intr_vect_r_masked_vect 4
169/* Register r_masked_vect0, scope intr_vect, type r */
170typedef struct {
171 unsigned int timer0 : 1;
172 unsigned int timer1 : 1;
173 unsigned int dma0 : 1;
174 unsigned int dma1 : 1;
175 unsigned int dma2 : 1;
176 unsigned int dma3 : 1;
177 unsigned int dma4 : 1;
178 unsigned int dma5 : 1;
179 unsigned int dma6 : 1;
180 unsigned int dma7 : 1;
181 unsigned int dma9 : 1;
182 unsigned int dma11 : 1;
183 unsigned int gio : 1;
184 unsigned int iop0 : 1;
185 unsigned int iop1 : 1;
186 unsigned int ser0 : 1;
187 unsigned int ser1 : 1;
188 unsigned int ser2 : 1;
189 unsigned int ser3 : 1;
190 unsigned int ser4 : 1;
191 unsigned int sser : 1;
192 unsigned int strdma0 : 1;
193 unsigned int strdma1 : 1;
194 unsigned int strdma2 : 1;
195 unsigned int strdma3 : 1;
196 unsigned int strdma5 : 1;
197 unsigned int vin : 1;
198 unsigned int vout : 1;
199 unsigned int jpeg : 1;
200 unsigned int h264 : 1;
201 unsigned int histo : 1;
202 unsigned int ccd : 1;
203} reg_intr_vect_r_masked_vect0;
204#define reg_intr_vect_r_masked_vect reg_intr_masked_vect_r_vect0
205#define REG_RD_ADDR_intr_vect_r_masked_vect0 16
206#define REG_RD_ADDR_intr_vect_r_masked_vect 16
207
208#define STRIDE_intr_vect_rw_xmask 4
209/* Register rw_xmask0, scope intr_vect, type rw */
210typedef struct {
211 unsigned int timer0 : 1;
212 unsigned int timer1 : 1;
213 unsigned int dma0 : 1;
214 unsigned int dma1 : 1;
215 unsigned int dma2 : 1;
216 unsigned int dma3 : 1;
217 unsigned int dma4 : 1;
218 unsigned int dma5 : 1;
219 unsigned int dma6 : 1;
220 unsigned int dma7 : 1;
221 unsigned int dma9 : 1;
222 unsigned int dma11 : 1;
223 unsigned int gio : 1;
224 unsigned int iop0 : 1;
225 unsigned int iop1 : 1;
226 unsigned int ser0 : 1;
227 unsigned int ser1 : 1;
228 unsigned int ser2 : 1;
229 unsigned int ser3 : 1;
230 unsigned int ser4 : 1;
231 unsigned int sser : 1;
232 unsigned int strdma0 : 1;
233 unsigned int strdma1 : 1;
234 unsigned int strdma2 : 1;
235 unsigned int strdma3 : 1;
236 unsigned int strdma5 : 1;
237 unsigned int vin : 1;
238 unsigned int vout : 1;
239 unsigned int jpeg : 1;
240 unsigned int h264 : 1;
241 unsigned int histo : 1;
242 unsigned int ccd : 1;
243} reg_intr_vect_rw_xmask0;
244#define reg_intr_vect_rw_xmask reg_intr_vect_rw_xmask0
245#define REG_RD_ADDR_intr_vect_rw_xmask0 24
246#define REG_WR_ADDR_intr_vect_rw_xmask0 24
247#define REG_RD_ADDR_intr_vect_rw_xmask 24
248#define REG_WR_ADDR_intr_vect_rw_xmask 24
249
250/* Register rw_mask1, scope intr_vect, type rw */
251typedef struct {
252 unsigned int eth : 1;
253 unsigned int memarb_bar : 1;
254 unsigned int memarb_foo : 1;
255 unsigned int pio : 1;
256 unsigned int sclr : 1;
257 unsigned int sclr_fifo : 1;
258 unsigned int dummy1 : 26;
259} reg_intr_vect_rw_mask1;
260#define REG_RD_ADDR_intr_vect_rw_mask1 4
261#define REG_WR_ADDR_intr_vect_rw_mask1 4
262
263/* Register r_vect1, scope intr_vect, type r */
264typedef struct {
265 unsigned int eth : 1;
266 unsigned int memarb_bar : 1;
267 unsigned int memarb_foo : 1;
268 unsigned int pio : 1;
269 unsigned int sclr : 1;
270 unsigned int sclr_fifo : 1;
271 unsigned int dummy1 : 26;
272} reg_intr_vect_r_vect1;
273#define REG_RD_ADDR_intr_vect_r_vect1 12
274
275/* Register r_masked_vect1, scope intr_vect, type r */
276typedef struct {
277 unsigned int eth : 1;
278 unsigned int memarb_bar : 1;
279 unsigned int memarb_foo : 1;
280 unsigned int pio : 1;
281 unsigned int sclr : 1;
282 unsigned int sclr_fifo : 1;
283 unsigned int dummy1 : 26;
284} reg_intr_vect_r_masked_vect1;
285#define REG_RD_ADDR_intr_vect_r_masked_vect1 20
286
287/* Register rw_xmask1, scope intr_vect, type rw */
288typedef struct {
289 unsigned int eth : 1;
290 unsigned int memarb_bar : 1;
291 unsigned int memarb_foo : 1;
292 unsigned int pio : 1;
293 unsigned int sclr : 1;
294 unsigned int sclr_fifo : 1;
295 unsigned int dummy1 : 26;
296} reg_intr_vect_rw_xmask1;
297#define REG_RD_ADDR_intr_vect_rw_xmask1 28
298#define REG_WR_ADDR_intr_vect_rw_xmask1 28
299
300/* Register rw_xmask_ctrl, scope intr_vect, type rw */
301typedef struct {
302 unsigned int en : 1;
303 unsigned int dummy1 : 31;
304} reg_intr_vect_rw_xmask_ctrl;
305#define REG_RD_ADDR_intr_vect_rw_xmask_ctrl 32
306#define REG_WR_ADDR_intr_vect_rw_xmask_ctrl 32
307
308/* Register r_nmi, scope intr_vect, type r */
309typedef struct {
310 unsigned int watchdog0 : 1;
311 unsigned int watchdog1 : 1;
312 unsigned int dummy1 : 30;
313} reg_intr_vect_r_nmi;
314#define REG_RD_ADDR_intr_vect_r_nmi 64
315
316/* Register r_guru, scope intr_vect, type r */
317typedef struct {
318 unsigned int jtag : 1;
319 unsigned int dummy1 : 31;
320} reg_intr_vect_r_guru;
321#define REG_RD_ADDR_intr_vect_r_guru 68
322
323
324/* Register rw_ipi, scope intr_vect, type rw */
325typedef struct
326{
327 unsigned int vector;
328} reg_intr_vect_rw_ipi;
329#define REG_RD_ADDR_intr_vect_rw_ipi 72
330#define REG_WR_ADDR_intr_vect_rw_ipi 72
331
332/* Constants */
333enum {
334 regk_intr_vect_no = 0x00000000,
335 regk_intr_vect_rw_mask0_default = 0x00000000,
336 regk_intr_vect_rw_mask1_default = 0x00000000,
337 regk_intr_vect_rw_xmask0_default = 0x00000000,
338 regk_intr_vect_rw_xmask1_default = 0x00000000,
339 regk_intr_vect_rw_xmask_ctrl_default = 0x00000000,
340 regk_intr_vect_yes = 0x00000001
341};
342#endif /* __intr_vect_defs_h */
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