[linux-block.git] / arch / cris / include / arch-v32 / arch / hwregs / rt_trace_defs.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __rt_trace_defs_h
#define __rt_trace_defs_h

/*
 * This file is autogenerated from
 *   file:           ../../inst/rt_trace/rtl/rt_regs.r
 *     id:           rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
 *     last modfied: Mon Apr 11 16:09:14 2005
 *
 *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile rt_trace_defs.h ../../inst/rt_trace/rtl/rt_regs.r
 *      id: $Id: rt_trace_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $
 * Any changes here will be lost.
 *
 * -*- buffer-read-only: t -*-
 */
/* Main access macros */
#ifndef REG_RD
#define REG_RD( scope, inst, reg ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR
#define REG_WR( scope, inst, reg, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_VECT
#define REG_RD_VECT( scope, inst, reg, index ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_VECT
#define REG_WR_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT
#define REG_RD_INT( scope, inst, reg ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR_INT
#define REG_WR_INT( scope, inst, reg, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT_VECT
#define REG_RD_INT_VECT( scope, inst, reg, index ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_INT_VECT
#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_TYPE_CONV
#define REG_TYPE_CONV( type, orgtype, val ) \
  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
#endif

#ifndef reg_page_size
#define reg_page_size 8192
#endif

#ifndef REG_ADDR
#define REG_ADDR( scope, inst, reg ) \
  ( (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_ADDR_VECT
#define REG_ADDR_VECT( scope, inst, reg, index ) \
  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
    (index) * STRIDE_##scope##_##reg )
#endif

/* C-code for register scope rt_trace */

/* Register rw_cfg, scope rt_trace, type rw */
typedef struct {
  unsigned int en       : 1;
  unsigned int mode     : 1;
  unsigned int owner    : 1;
  unsigned int wp       : 1;
  unsigned int stall    : 1;
  unsigned int dummy1   : 3;
  unsigned int wp_start : 7;
  unsigned int dummy2   : 1;
  unsigned int wp_stop  : 7;
  unsigned int dummy3   : 9;
} reg_rt_trace_rw_cfg;
#define REG_RD_ADDR_rt_trace_rw_cfg 0
#define REG_WR_ADDR_rt_trace_rw_cfg 0

/* Register rw_tap_ctrl, scope rt_trace, type rw */
typedef struct {
  unsigned int ack_data : 1;
  unsigned int ack_guru : 1;
  unsigned int dummy1   : 30;
} reg_rt_trace_rw_tap_ctrl;
#define REG_RD_ADDR_rt_trace_rw_tap_ctrl 4
#define REG_WR_ADDR_rt_trace_rw_tap_ctrl 4

/* Register r_tap_stat, scope rt_trace, type r */
typedef struct {
  unsigned int dav   : 1;
  unsigned int empty : 1;
  unsigned int dummy1 : 30;
} reg_rt_trace_r_tap_stat;
#define REG_RD_ADDR_rt_trace_r_tap_stat 8

/* Register rw_tap_data, scope rt_trace, type rw */
typedef unsigned int reg_rt_trace_rw_tap_data;
#define REG_RD_ADDR_rt_trace_rw_tap_data 12
#define REG_WR_ADDR_rt_trace_rw_tap_data 12

/* Register rw_tap_hdata, scope rt_trace, type rw */
typedef struct {
  unsigned int op     : 4;
  unsigned int sub_op : 4;
  unsigned int dummy1 : 24;
} reg_rt_trace_rw_tap_hdata;
#define REG_RD_ADDR_rt_trace_rw_tap_hdata 16
#define REG_WR_ADDR_rt_trace_rw_tap_hdata 16

/* Register r_redir, scope rt_trace, type r */
typedef unsigned int reg_rt_trace_r_redir;
#define REG_RD_ADDR_rt_trace_r_redir 20


/* Constants */
enum {
  regk_rt_trace_brk                        = 0x0000000c,
  regk_rt_trace_dbg                        = 0x00000003,
  regk_rt_trace_dbgdi                      = 0x00000004,
  regk_rt_trace_dbgdo                      = 0x00000005,
  regk_rt_trace_gmode                      = 0x00000000,
  regk_rt_trace_no                         = 0x00000000,
  regk_rt_trace_nop                        = 0x00000000,
  regk_rt_trace_normal                     = 0x00000000,
  regk_rt_trace_rdmem                      = 0x00000007,
  regk_rt_trace_rdmemb                     = 0x00000009,
  regk_rt_trace_rdpreg                     = 0x00000002,
  regk_rt_trace_rdreg                      = 0x00000001,
  regk_rt_trace_rdsreg                     = 0x00000003,
  regk_rt_trace_redir                      = 0x00000006,
  regk_rt_trace_ret                        = 0x0000000b,
  regk_rt_trace_rw_cfg_default             = 0x00000000,
  regk_rt_trace_trcfg                      = 0x00000001,
  regk_rt_trace_wp                         = 0x00000001,
  regk_rt_trace_wp0                        = 0x00000001,
  regk_rt_trace_wp1                        = 0x00000002,
  regk_rt_trace_wp2                        = 0x00000004,
  regk_rt_trace_wp3                        = 0x00000008,
  regk_rt_trace_wp4                        = 0x00000010,
  regk_rt_trace_wp5                        = 0x00000020,
  regk_rt_trace_wp6                        = 0x00000040,
  regk_rt_trace_wrmem                      = 0x00000008,
  regk_rt_trace_wrmemb                     = 0x0000000a,
  regk_rt_trace_wrpreg                     = 0x00000005,
  regk_rt_trace_wrreg                      = 0x00000004,
  regk_rt_trace_wrsreg                     = 0x00000006,
  regk_rt_trace_yes                        = 0x00000001
};
#endif /* __rt_trace_defs_h */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
51533b61 MS	2	#ifndef __rt_trace_defs_h
	3	#define __rt_trace_defs_h
	4
	5	/*
	6	* This file is autogenerated from
	7	* file: ../../inst/rt_trace/rtl/rt_regs.r
	8	* id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
	9	* last modfied: Mon Apr 11 16:09:14 2005
	10	*
	11	* by /n/asic/design/tools/rdesc/src/rdes2c --outfile rt_trace_defs.h ../../inst/rt_trace/rtl/rt_regs.r
	12	* id: $Id: rt_trace_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $
	13	* Any changes here will be lost.
	14	*
	15	* -- buffer-read-only: t --
	16	*/
	17	/* Main access macros */
	18	#ifndef REG_RD
	19	#define REG_RD( scope, inst, reg ) \
	20	REG_READ( reg_##scope##_##reg, \
	21	(inst) + REG_RD_ADDR_##scope##_##reg )
	22	#endif
	23
	24	#ifndef REG_WR
	25	#define REG_WR( scope, inst, reg, val ) \
	26	REG_WRITE( reg_##scope##_##reg, \
	27	(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	28	#endif
	29
	30	#ifndef REG_RD_VECT
	31	#define REG_RD_VECT( scope, inst, reg, index ) \
	32	REG_READ( reg_##scope##_##reg, \
	33	(inst) + REG_RD_ADDR_##scope##_##reg + \
	34	(index) * STRIDE_##scope##_##reg )
	35	#endif
	36
	37	#ifndef REG_WR_VECT
	38	#define REG_WR_VECT( scope, inst, reg, index, val ) \
	39	REG_WRITE( reg_##scope##_##reg, \
	40	(inst) + REG_WR_ADDR_##scope##_##reg + \
	41	(index) * STRIDE_##scope##_##reg, (val) )
	42	#endif
	43
	44	#ifndef REG_RD_INT
	45	#define REG_RD_INT( scope, inst, reg ) \
	46	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
	47	#endif
	48
	49	#ifndef REG_WR_INT
	50	#define REG_WR_INT( scope, inst, reg, val ) \
	51	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	52	#endif
	53
	54	#ifndef REG_RD_INT_VECT
	55	#define REG_RD_INT_VECT( scope, inst, reg, index ) \
	56	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	57	(index) * STRIDE_##scope##_##reg )
	58	#endif
	59
	60	#ifndef REG_WR_INT_VECT
	61	#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
	62	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	63	(index) * STRIDE_##scope##_##reg, (val) )
	64	#endif
	65
66	#ifndef REG_TYPE_CONV
67	#define REG_TYPE_CONV( type, orgtype, val ) \
68	( { union { orgtype o; type n; } r; r.o = val; r.n; } )
69	#endif
70
71	#ifndef reg_page_size
72	#define reg_page_size 8192
73	#endif
74
75	#ifndef REG_ADDR
76	#define REG_ADDR( scope, inst, reg ) \
77	( (inst) + REG_RD_ADDR_##scope##_##reg )
78	#endif
79
80	#ifndef REG_ADDR_VECT
81	#define REG_ADDR_VECT( scope, inst, reg, index ) \
82	( (inst) + REG_RD_ADDR_##scope##_##reg + \
83	(index) * STRIDE_##scope##_##reg )
84	#endif
85
86	/* C-code for register scope rt_trace */
87
88	/* Register rw_cfg, scope rt_trace, type rw */
89	typedef struct {
90	unsigned int en : 1;
91	unsigned int mode : 1;
92	unsigned int owner : 1;
93	unsigned int wp : 1;
94	unsigned int stall : 1;
95	unsigned int dummy1 : 3;
96	unsigned int wp_start : 7;
97	unsigned int dummy2 : 1;
98	unsigned int wp_stop : 7;
99	unsigned int dummy3 : 9;
100	} reg_rt_trace_rw_cfg;
101	#define REG_RD_ADDR_rt_trace_rw_cfg 0
102	#define REG_WR_ADDR_rt_trace_rw_cfg 0
103
104	/* Register rw_tap_ctrl, scope rt_trace, type rw */
105	typedef struct {
106	unsigned int ack_data : 1;
107	unsigned int ack_guru : 1;
108	unsigned int dummy1 : 30;
109	} reg_rt_trace_rw_tap_ctrl;
110	#define REG_RD_ADDR_rt_trace_rw_tap_ctrl 4
111	#define REG_WR_ADDR_rt_trace_rw_tap_ctrl 4
112
113	/* Register r_tap_stat, scope rt_trace, type r */
114	typedef struct {
115	unsigned int dav : 1;
116	unsigned int empty : 1;
117	unsigned int dummy1 : 30;
118	} reg_rt_trace_r_tap_stat;
119	#define REG_RD_ADDR_rt_trace_r_tap_stat 8
120
121	/* Register rw_tap_data, scope rt_trace, type rw */
122	typedef unsigned int reg_rt_trace_rw_tap_data;
123	#define REG_RD_ADDR_rt_trace_rw_tap_data 12
124	#define REG_WR_ADDR_rt_trace_rw_tap_data 12
125
126	/* Register rw_tap_hdata, scope rt_trace, type rw */
127	typedef struct {
128	unsigned int op : 4;
129	unsigned int sub_op : 4;
130	unsigned int dummy1 : 24;
131	} reg_rt_trace_rw_tap_hdata;
132	#define REG_RD_ADDR_rt_trace_rw_tap_hdata 16
133	#define REG_WR_ADDR_rt_trace_rw_tap_hdata 16
134
135	/* Register r_redir, scope rt_trace, type r */
136	typedef unsigned int reg_rt_trace_r_redir;
137	#define REG_RD_ADDR_rt_trace_r_redir 20
138
139
140	/* Constants */
141	enum {
142	regk_rt_trace_brk = 0x0000000c,
143	regk_rt_trace_dbg = 0x00000003,
144	regk_rt_trace_dbgdi = 0x00000004,
145	regk_rt_trace_dbgdo = 0x00000005,
146	regk_rt_trace_gmode = 0x00000000,
147	regk_rt_trace_no = 0x00000000,
148	regk_rt_trace_nop = 0x00000000,
149	regk_rt_trace_normal = 0x00000000,
150	regk_rt_trace_rdmem = 0x00000007,
151	regk_rt_trace_rdmemb = 0x00000009,
152	regk_rt_trace_rdpreg = 0x00000002,
153	regk_rt_trace_rdreg = 0x00000001,
154	regk_rt_trace_rdsreg = 0x00000003,
155	regk_rt_trace_redir = 0x00000006,
156	regk_rt_trace_ret = 0x0000000b,
157	regk_rt_trace_rw_cfg_default = 0x00000000,
158	regk_rt_trace_trcfg = 0x00000001,
159	regk_rt_trace_wp = 0x00000001,
160	regk_rt_trace_wp0 = 0x00000001,
161	regk_rt_trace_wp1 = 0x00000002,
162	regk_rt_trace_wp2 = 0x00000004,
163	regk_rt_trace_wp3 = 0x00000008,
164	regk_rt_trace_wp4 = 0x00000010,
165	regk_rt_trace_wp5 = 0x00000020,
166	regk_rt_trace_wp6 = 0x00000040,
167	regk_rt_trace_wrmem = 0x00000008,
168	regk_rt_trace_wrmemb = 0x0000000a,
169	regk_rt_trace_wrpreg = 0x00000005,
170	regk_rt_trace_wrreg = 0x00000004,
171	regk_rt_trace_wrsreg = 0x00000006,
172	regk_rt_trace_yes = 0x00000001
173	};
174	#endif /* __rt_trace_defs_h */