Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
51533b61 MS |
2 | #ifndef __irq_nmi_defs_h |
3 | #define __irq_nmi_defs_h | |
4 | ||
5 | /* | |
6 | * This file is autogenerated from | |
7 | * file: ../../mod/irq_nmi.r | |
8 | * id: <not found> | |
9 | * last modfied: Thu Jan 22 09:22:43 2004 | |
10 | * | |
11 | * by /n/asic/design/tools/rdesc/src/rdes2c --outfile irq_nmi_defs.h ../../mod/irq_nmi.r | |
12 | * id: $Id: irq_nmi_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $ | |
13 | * Any changes here will be lost. | |
14 | * | |
15 | * -*- buffer-read-only: t -*- | |
16 | */ | |
17 | /* Main access macros */ | |
18 | #ifndef REG_RD | |
19 | #define REG_RD( scope, inst, reg ) \ | |
20 | REG_READ( reg_##scope##_##reg, \ | |
21 | (inst) + REG_RD_ADDR_##scope##_##reg ) | |
22 | #endif | |
23 | ||
24 | #ifndef REG_WR | |
25 | #define REG_WR( scope, inst, reg, val ) \ | |
26 | REG_WRITE( reg_##scope##_##reg, \ | |
27 | (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) | |
28 | #endif | |
29 | ||
30 | #ifndef REG_RD_VECT | |
31 | #define REG_RD_VECT( scope, inst, reg, index ) \ | |
32 | REG_READ( reg_##scope##_##reg, \ | |
33 | (inst) + REG_RD_ADDR_##scope##_##reg + \ | |
34 | (index) * STRIDE_##scope##_##reg ) | |
35 | #endif | |
36 | ||
37 | #ifndef REG_WR_VECT | |
38 | #define REG_WR_VECT( scope, inst, reg, index, val ) \ | |
39 | REG_WRITE( reg_##scope##_##reg, \ | |
40 | (inst) + REG_WR_ADDR_##scope##_##reg + \ | |
41 | (index) * STRIDE_##scope##_##reg, (val) ) | |
42 | #endif | |
43 | ||
44 | #ifndef REG_RD_INT | |
45 | #define REG_RD_INT( scope, inst, reg ) \ | |
46 | REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) | |
47 | #endif | |
48 | ||
49 | #ifndef REG_WR_INT | |
50 | #define REG_WR_INT( scope, inst, reg, val ) \ | |
51 | REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) | |
52 | #endif | |
53 | ||
54 | #ifndef REG_RD_INT_VECT | |
55 | #define REG_RD_INT_VECT( scope, inst, reg, index ) \ | |
56 | REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ | |
57 | (index) * STRIDE_##scope##_##reg ) | |
58 | #endif | |
59 | ||
60 | #ifndef REG_WR_INT_VECT | |
61 | #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ | |
62 | REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ | |
63 | (index) * STRIDE_##scope##_##reg, (val) ) | |
64 | #endif | |
65 | ||
66 | #ifndef REG_TYPE_CONV | |
67 | #define REG_TYPE_CONV( type, orgtype, val ) \ | |
68 | ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) | |
69 | #endif | |
70 | ||
71 | #ifndef reg_page_size | |
72 | #define reg_page_size 8192 | |
73 | #endif | |
74 | ||
75 | #ifndef REG_ADDR | |
76 | #define REG_ADDR( scope, inst, reg ) \ | |
77 | ( (inst) + REG_RD_ADDR_##scope##_##reg ) | |
78 | #endif | |
79 | ||
80 | #ifndef REG_ADDR_VECT | |
81 | #define REG_ADDR_VECT( scope, inst, reg, index ) \ | |
82 | ( (inst) + REG_RD_ADDR_##scope##_##reg + \ | |
83 | (index) * STRIDE_##scope##_##reg ) | |
84 | #endif | |
85 | ||
86 | /* C-code for register scope irq_nmi */ | |
87 | ||
88 | /* Register rw_cmd, scope irq_nmi, type rw */ | |
89 | typedef struct { | |
90 | unsigned int delay : 16; | |
91 | unsigned int op : 2; | |
92 | unsigned int dummy1 : 14; | |
93 | } reg_irq_nmi_rw_cmd; | |
94 | #define REG_RD_ADDR_irq_nmi_rw_cmd 0 | |
95 | #define REG_WR_ADDR_irq_nmi_rw_cmd 0 | |
96 | ||
97 | ||
98 | /* Constants */ | |
99 | enum { | |
100 | regk_irq_nmi_ack_irq = 0x00000002, | |
101 | regk_irq_nmi_ack_nmi = 0x00000003, | |
102 | regk_irq_nmi_irq = 0x00000000, | |
103 | regk_irq_nmi_nmi = 0x00000001 | |
104 | }; | |
105 | #endif /* __irq_nmi_defs_h */ |