[linux-2.6-block.git] / arch / cris / arch-v32 / kernel / ptrace.c

/*
 * Copyright (C) 2000-2007, Axis Communications AB.
 */

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/sched/task_stack.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/user.h>
#include <linux/signal.h>
#include <linux/security.h>

#include <linux/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <arch/hwregs/supp_reg.h>

/*
 * Determines which bits in CCS the user has access to.
 * 1 = access, 0 = no access.
 */
#define CCS_MASK 0x00087c00     /* SXNZVC */

#define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))

static int put_debugreg(long pid, unsigned int regno, long data);
static long get_debugreg(long pid, unsigned int regno);
static unsigned long get_pseudo_pc(struct task_struct *child);
void deconfigure_bp(long pid);

extern unsigned long cris_signal_return_page;

/*
 * Get contents of register REGNO in task TASK.
 */
long get_reg(struct task_struct *task, unsigned int regno)
{
	/* USP is a special case, it's not in the pt_regs struct but
	 * in the tasks thread struct
	 */
	unsigned long ret;

	if (regno <= PT_EDA)
		ret = ((unsigned long *)task_pt_regs(task))[regno];
	else if (regno == PT_USP)
		ret = task->thread.usp;
	else if (regno == PT_PPC)
		ret = get_pseudo_pc(task);
	else if (regno <= PT_MAX)
		ret = get_debugreg(task->pid, regno);
	else
		ret = 0;

	return ret;
}

/*
 * Write contents of register REGNO in task TASK.
 */
int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
{
	if (regno <= PT_EDA)
		((unsigned long *)task_pt_regs(task))[regno] = data;
	else if (regno == PT_USP)
		task->thread.usp = data;
	else if (regno == PT_PPC) {
		/* Write pseudo-PC to ERP only if changed. */
		if (data != get_pseudo_pc(task))
			task_pt_regs(task)->erp = data;
	} else if (regno <= PT_MAX)
		return put_debugreg(task->pid, regno, data);
	else
		return -1;
	return 0;
}

void user_enable_single_step(struct task_struct *child)
{
	unsigned long tmp;

	/*
	 * Set up SPC if not set already (in which case we have no other
	 * choice but to trust it).
	 */
	if (!get_reg(child, PT_SPC)) {
		/* In case we're stopped in a delay slot. */
		tmp = get_reg(child, PT_ERP) & ~1;
		put_reg(child, PT_SPC, tmp);
	}
	tmp = get_reg(child, PT_CCS) | SBIT_USER;
	put_reg(child, PT_CCS, tmp);
}

void user_disable_single_step(struct task_struct *child)
{
	put_reg(child, PT_SPC, 0);

	if (!get_debugreg(child->pid, PT_BP_CTRL)) {
		unsigned long tmp;
		/* If no h/w bp configured, disable S bit. */
		tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
		put_reg(child, PT_CCS, tmp);
	}
}

/*
 * Called by kernel/ptrace.c when detaching.
 *
 * Make sure the single step bit is not set.
 */
void
ptrace_disable(struct task_struct *child)
{
	/* Deconfigure SPC and S-bit. */
	user_disable_single_step(child);
	put_reg(child, PT_SPC, 0);

	/* Deconfigure any watchpoints associated with the child. */
	deconfigure_bp(child->pid);
}


long arch_ptrace(struct task_struct *child, long request,
		 unsigned long addr, unsigned long data)
{
	int ret;
	unsigned int regno = addr >> 2;
	unsigned long __user *datap = (unsigned long __user *)data;

	switch (request) {
		/* Read word at location address. */
		case PTRACE_PEEKTEXT:
		case PTRACE_PEEKDATA: {
			unsigned long tmp;
			int copied;

			ret = -EIO;

			/* The signal trampoline page is outside the normal user-addressable
			 * space but still accessible. This is hack to make it possible to
			 * access the signal handler code in GDB.
			 */
			if ((addr & PAGE_MASK) == cris_signal_return_page) {
				/* The trampoline page is globally mapped, no page table to traverse.*/
				tmp = *(unsigned long*)addr;
			} else {
				copied = ptrace_access_vm(child, addr, &tmp, sizeof(tmp), FOLL_FORCE);

				if (copied != sizeof(tmp))
					break;
			}

			ret = put_user(tmp,datap);
			break;
		}

		/* Read the word at location address in the USER area. */
		case PTRACE_PEEKUSR: {
			unsigned long tmp;

			ret = -EIO;
			if ((addr & 3) || regno > PT_MAX)
				break;

			tmp = get_reg(child, regno);
			ret = put_user(tmp, datap);
			break;
		}

		/* Write the word at location address. */
		case PTRACE_POKETEXT:
		case PTRACE_POKEDATA:
			ret = generic_ptrace_pokedata(child, addr, data);
			break;

		/* Write the word at location address in the USER area. */
		case PTRACE_POKEUSR:
			ret = -EIO;
			if ((addr & 3) || regno > PT_MAX)
				break;

			if (regno == PT_CCS) {
				/* don't allow the tracing process to change stuff like
				 * interrupt enable, kernel/user bit, dma enables etc.
				 */
				data &= CCS_MASK;
				data |= get_reg(child, PT_CCS) & ~CCS_MASK;
			}
			if (put_reg(child, regno, data))
				break;
			ret = 0;
			break;

		/* Get all GP registers from the child. */
		case PTRACE_GETREGS: {
			int i;
			unsigned long tmp;

			for (i = 0; i <= PT_MAX; i++) {
				tmp = get_reg(child, i);

				if (put_user(tmp, datap)) {
					ret = -EFAULT;
					goto out_tsk;
				}

				datap++;
			}

			ret = 0;
			break;
		}

		/* Set all GP registers in the child. */
		case PTRACE_SETREGS: {
			int i;
			unsigned long tmp;

			for (i = 0; i <= PT_MAX; i++) {
				if (get_user(tmp, datap)) {
					ret = -EFAULT;
					goto out_tsk;
				}

				if (i == PT_CCS) {
					tmp &= CCS_MASK;
					tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
				}

				put_reg(child, i, tmp);
				datap++;
			}

			ret = 0;
			break;
		}

		default:
			ret = ptrace_request(child, request, addr, data);
			break;
	}

out_tsk:
	return ret;
}

void do_syscall_trace(void)
{
	if (!test_thread_flag(TIF_SYSCALL_TRACE))
		return;

	if (!(current->ptrace & PT_PTRACED))
		return;

	/* the 0x80 provides a way for the tracing parent to distinguish
	   between a syscall stop and SIGTRAP delivery */
	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
				 ? 0x80 : 0));

	/*
	 * This isn't the same as continuing with a signal, but it will do for
	 * normal use.
	 */
	if (current->exit_code) {
		send_sig(current->exit_code, current, 1);
		current->exit_code = 0;
	}
}

/* Returns the size of an instruction that has a delay slot. */

static int insn_size(struct task_struct *child, unsigned long pc)
{
  unsigned long opcode;
  int copied;
  int opsize = 0;

  /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
  copied = access_process_vm(child, pc, &opcode, sizeof(opcode), FOLL_FORCE);
  if (copied != sizeof(opcode))
    return 0;

  switch ((opcode & 0x0f00) >> 8) {
  case 0x0:
  case 0x9:
  case 0xb:
	  opsize = 2;
	  break;
  case 0xe:
  case 0xf:
	  opsize = 6;
	  break;
  case 0xd:
	  /* Could be 4 or 6; check more bits. */
	  if ((opcode & 0xff) == 0xff)
		  opsize = 4;
	  else
		  opsize = 6;
	  break;
  default:
	  panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
		opcode, pc);
  }

  return opsize;
}

static unsigned long get_pseudo_pc(struct task_struct *child)
{
	/* Default value for PC is ERP. */
	unsigned long pc = get_reg(child, PT_ERP);

	if (pc & 0x1) {
		unsigned long spc = get_reg(child, PT_SPC);
		/* Delay slot bit set. Report as stopped on proper
		   instruction. */
		if (spc) {
			/* Rely on SPC if set. FIXME: We might want to check
			   that EXS indicates we stopped due to a single-step
			   exception. */
			pc = spc;
		} else {
			/* Calculate the PC from the size of the instruction
			   that the delay slot we're in belongs to. */
			pc += insn_size(child, pc & ~1) - 1;
		}
	}
	return pc;
}

static long bp_owner = 0;

/* Reachable from exit_thread in signal.c, so not static. */
void deconfigure_bp(long pid)
{
	int bp;

	/* Only deconfigure if the pid is the owner. */
	if (bp_owner != pid)
		return;

	for (bp = 0; bp < 6; bp++) {
		unsigned long tmp;
		/* Deconfigure start and end address (also gets rid of ownership). */
		put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
		put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);

		/* Deconfigure relevant bits in control register. */
		tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
		put_debugreg(pid, PT_BP_CTRL, tmp);
	}
	/* No owner now. */
	bp_owner = 0;
}

static int put_debugreg(long pid, unsigned int regno, long data)
{
	int ret = 0;
	register int old_srs;

#ifdef CONFIG_ETRAX_KGDB
	/* Ignore write, but pretend it was ok if value is 0
	   (we don't want POKEUSR/SETREGS failing unnessecarily). */
	return (data == 0) ? ret : -1;
#endif

	/* Simple owner management. */
	if (!bp_owner)
		bp_owner = pid;
	else if (bp_owner != pid) {
		/* Ignore write, but pretend it was ok if value is 0
		   (we don't want POKEUSR/SETREGS failing unnessecarily). */
		return (data == 0) ? ret : -1;
	}

	/* Remember old SRS. */
	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
	/* Switch to BP bank. */
	SUPP_BANK_SEL(BANK_BP);

	switch (regno - PT_BP) {
	case 0:
		SUPP_REG_WR(0, data); break;
	case 1:
	case 2:
		if (data)
			ret = -1;
		break;
	case 3:
		SUPP_REG_WR(3, data); break;
	case 4:
		SUPP_REG_WR(4, data); break;
	case 5:
		SUPP_REG_WR(5, data); break;
	case 6:
		SUPP_REG_WR(6, data); break;
	case 7:
		SUPP_REG_WR(7, data); break;
	case 8:
		SUPP_REG_WR(8, data); break;
	case 9:
		SUPP_REG_WR(9, data); break;
	case 10:
		SUPP_REG_WR(10, data); break;
	case 11:
		SUPP_REG_WR(11, data); break;
	case 12:
		SUPP_REG_WR(12, data); break;
	case 13:
		SUPP_REG_WR(13, data); break;
	case 14:
		SUPP_REG_WR(14, data); break;
	default:
		ret = -1;
		break;
	}

	/* Restore SRS. */
	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
	/* Just for show. */
	NOP();
	NOP();
	NOP();

	return ret;
}

static long get_debugreg(long pid, unsigned int regno)
{
	register int old_srs;
	register long data;

	if (pid != bp_owner) {
		return 0;
	}

	/* Remember old SRS. */
	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
	/* Switch to BP bank. */
	SUPP_BANK_SEL(BANK_BP);

	switch (regno - PT_BP) {
	case 0:
		SUPP_REG_RD(0, data); break;
	case 1:
	case 2:
		/* error return value? */
		data = 0;
		break;
	case 3:
		SUPP_REG_RD(3, data); break;
	case 4:
		SUPP_REG_RD(4, data); break;
	case 5:
		SUPP_REG_RD(5, data); break;
	case 6:
		SUPP_REG_RD(6, data); break;
	case 7:
		SUPP_REG_RD(7, data); break;
	case 8:
		SUPP_REG_RD(8, data); break;
	case 9:
		SUPP_REG_RD(9, data); break;
	case 10:
		SUPP_REG_RD(10, data); break;
	case 11:
		SUPP_REG_RD(11, data); break;
	case 12:
		SUPP_REG_RD(12, data); break;
	case 13:
		SUPP_REG_RD(13, data); break;
	case 14:
		SUPP_REG_RD(14, data); break;
	default:
		/* error return value? */
		data = 0;
	}

	/* Restore SRS. */
	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
	/* Just for show. */
	NOP();
	NOP();
	NOP();

	return data;
}
Commit	Line	Data
51533b61	1	/*
54ab4d72	2	* Copyright (C) 2000-2007, Axis Communications AB.
51533b61 MS	3	*/
	4
	5	#include <linux/kernel.h>
	6	#include <linux/sched.h>
68db0cf1	7	#include <linux/sched/task_stack.h>
51533b61 MS	8	#include <linux/mm.h>
51533b61 MS	9	#include <linux/smp.h>
51533b61 MS	10	#include <linux/errno.h>
	11	#include <linux/ptrace.h>
	12	#include <linux/user.h>
	13	#include <linux/signal.h>
	14	#include <linux/security.h>
	15
7c0f6ba6	16	#include <linux/uaccess.h>
51533b61 MS	17	#include <asm/page.h>
51533b61 MS	18	#include <asm/pgtable.h>
51533b61	19	#include <asm/processor.h>
556dcee7	20	#include <arch/hwregs/supp_reg.h>
51533b61 MS	21
	22	/*
	23	* Determines which bits in CCS the user has access to.
	24	* 1 = access, 0 = no access.
	25	*/
	26	#define CCS_MASK 0x00087c00 /* SXNZVC */
	27
	28	#define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
	29
	30	static int put_debugreg(long pid, unsigned int regno, long data);
	31	static long get_debugreg(long pid, unsigned int regno);
	32	static unsigned long get_pseudo_pc(struct task_struct *child);
	33	void deconfigure_bp(long pid);
	34
	35	extern unsigned long cris_signal_return_page;
	36
	37	/*
	38	* Get contents of register REGNO in task TASK.
	39	*/
	40	long get_reg(struct task_struct *task, unsigned int regno)
	41	{
	42	/* USP is a special case, it's not in the pt_regs struct but
	43	* in the tasks thread struct
	44	*/
	45	unsigned long ret;
	46
	47	if (regno <= PT_EDA)
95ca0dc6	48	ret = ((unsigned long *)task_pt_regs(task))[regno];
51533b61 MS	49	else if (regno == PT_USP)
	50	ret = task->thread.usp;
	51	else if (regno == PT_PPC)
	52	ret = get_pseudo_pc(task);
	53	else if (regno <= PT_MAX)
	54	ret = get_debugreg(task->pid, regno);
	55	else
	56	ret = 0;
	57
	58	return ret;
	59	}
	60
	61	/*
	62	* Write contents of register REGNO in task TASK.
	63	*/
	64	int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
	65	{
	66	if (regno <= PT_EDA)
95ca0dc6	67	((unsigned long *)task_pt_regs(task))[regno] = data;
51533b61 MS	68	else if (regno == PT_USP)
	69	task->thread.usp = data;
	70	else if (regno == PT_PPC) {
	71	/* Write pseudo-PC to ERP only if changed. */
	72	if (data != get_pseudo_pc(task))
95ca0dc6	73	task_pt_regs(task)->erp = data;
51533b61 MS	74	} else if (regno <= PT_MAX)
	75	return put_debugreg(task->pid, regno, data);
	76	else
	77	return -1;
	78	return 0;
	79	}
	80
290ba3ae CH	81	void user_enable_single_step(struct task_struct *child)
	82	{
	83	unsigned long tmp;
	84
	85	/*
	86	* Set up SPC if not set already (in which case we have no other
	87	* choice but to trust it).
	88	*/
	89	if (!get_reg(child, PT_SPC)) {
	90	/* In case we're stopped in a delay slot. */
	91	tmp = get_reg(child, PT_ERP) & ~1;
	92	put_reg(child, PT_SPC, tmp);
	93	}
	94	tmp = get_reg(child, PT_CCS) \| SBIT_USER;
	95	put_reg(child, PT_CCS, tmp);
	96	}
	97
	98	void user_disable_single_step(struct task_struct *child)
	99	{
	100	put_reg(child, PT_SPC, 0);
	101
	102	if (!get_debugreg(child->pid, PT_BP_CTRL)) {
	103	unsigned long tmp;
	104	/* If no h/w bp configured, disable S bit. */
	105	tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
	106	put_reg(child, PT_CCS, tmp);
	107	}
	108	}
	109
51533b61 MS	110	/*
	111	* Called by kernel/ptrace.c when detaching.
	112	*
	113	* Make sure the single step bit is not set.
	114	*/
	115	void
	116	ptrace_disable(struct task_struct *child)
	117	{
51533b61	118	/* Deconfigure SPC and S-bit. */
290ba3ae	119	user_disable_single_step(child);
51533b61 MS	120	put_reg(child, PT_SPC, 0);
	121
	122	/* Deconfigure any watchpoints associated with the child. */
	123	deconfigure_bp(child->pid);
	124	}
	125
	126
9b05a69e NK	127	long arch_ptrace(struct task_struct *child, long request,
9b05a69e NK	128	unsigned long addr, unsigned long data)
51533b61	129	{
51533b61	130	int ret;
475a4b81	131	unsigned int regno = addr >> 2;
51533b61 MS	132	unsigned long __user datap = (unsigned long __user )data;
51533b61 MS	133
51533b61 MS	134	switch (request) {
	135	/* Read word at location address. */
	136	case PTRACE_PEEKTEXT:
	137	case PTRACE_PEEKDATA: {
	138	unsigned long tmp;
	139	int copied;
	140
	141	ret = -EIO;
	142
	143	/* The signal trampoline page is outside the normal user-addressable
	144	* space but still accessible. This is hack to make it possible to
	145	* access the signal handler code in GDB.
	146	*/
	147	if ((addr & PAGE_MASK) == cris_signal_return_page) {
	148	/* The trampoline page is globally mapped, no page table to traverse.*/
	149	tmp = (unsigned long)addr;
	150	} else {
84d77d3f	151	copied = ptrace_access_vm(child, addr, &tmp, sizeof(tmp), FOLL_FORCE);
51533b61 MS	152
	153	if (copied != sizeof(tmp))
	154	break;
	155	}
	156
	157	ret = put_user(tmp,datap);
	158	break;
	159	}
	160
	161	/* Read the word at location address in the USER area. */
	162	case PTRACE_PEEKUSR: {
	163	unsigned long tmp;
	164
	165	ret = -EIO;
475a4b81	166	if ((addr & 3) \|\| regno > PT_MAX)
51533b61 MS	167	break;
51533b61 MS	168
475a4b81	169	tmp = get_reg(child, regno);
51533b61 MS	170	ret = put_user(tmp, datap);
	171	break;
	172	}
	173
	174	/* Write the word at location address. */
	175	case PTRACE_POKETEXT:
	176	case PTRACE_POKEDATA:
f284ce72	177	ret = generic_ptrace_pokedata(child, addr, data);
51533b61 MS	178	break;
51533b61 MS	179
54ab4d72	180	/* Write the word at location address in the USER area. */
51533b61 MS	181	case PTRACE_POKEUSR:
51533b61 MS	182	ret = -EIO;
475a4b81	183	if ((addr & 3) \|\| regno > PT_MAX)
51533b61 MS	184	break;
51533b61 MS	185
475a4b81	186	if (regno == PT_CCS) {
51533b61 MS	187	/* don't allow the tracing process to change stuff like
	188	* interrupt enable, kernel/user bit, dma enables etc.
	189	*/
	190	data &= CCS_MASK;
	191	data \|= get_reg(child, PT_CCS) & ~CCS_MASK;
	192	}
475a4b81	193	if (put_reg(child, regno, data))
51533b61 MS	194	break;
	195	ret = 0;
	196	break;
	197
51533b61 MS	198	/* Get all GP registers from the child. */
51533b61 MS	199	case PTRACE_GETREGS: {
54ab4d72	200	int i;
51533b61 MS	201	unsigned long tmp;
	202
	203	for (i = 0; i <= PT_MAX; i++) {
	204	tmp = get_reg(child, i);
	205
	206	if (put_user(tmp, datap)) {
	207	ret = -EFAULT;
	208	goto out_tsk;
	209	}
	210
	211	datap++;
	212	}
	213
	214	ret = 0;
	215	break;
	216	}
	217
	218	/* Set all GP registers in the child. */
	219	case PTRACE_SETREGS: {
	220	int i;
	221	unsigned long tmp;
	222
	223	for (i = 0; i <= PT_MAX; i++) {
	224	if (get_user(tmp, datap)) {
	225	ret = -EFAULT;
	226	goto out_tsk;
	227	}
	228
	229	if (i == PT_CCS) {
	230	tmp &= CCS_MASK;
	231	tmp \|= get_reg(child, PT_CCS) & ~CCS_MASK;
	232	}
	233
	234	put_reg(child, i, tmp);
	235	datap++;
	236	}
	237
	238	ret = 0;
	239	break;
	240	}
	241
	242	default:
	243	ret = ptrace_request(child, request, addr, data);
	244	break;
	245	}
481bed45	246
54ab4d72	247	out_tsk:
51533b61 MS	248	return ret;
	249	}
	250
	251	void do_syscall_trace(void)
	252	{
	253	if (!test_thread_flag(TIF_SYSCALL_TRACE))
	254	return;
	255
	256	if (!(current->ptrace & PT_PTRACED))
	257	return;
	258
	259	/* the 0x80 provides a way for the tracing parent to distinguish
	260	between a syscall stop and SIGTRAP delivery */
	261	ptrace_notify(SIGTRAP \| ((current->ptrace & PT_TRACESYSGOOD)
	262	? 0x80 : 0));
	263
	264	/*
	265	* This isn't the same as continuing with a signal, but it will do for
	266	* normal use.
	267	*/
	268	if (current->exit_code) {
	269	send_sig(current->exit_code, current, 1);
	270	current->exit_code = 0;
	271	}
	272	}
	273
	274	/* Returns the size of an instruction that has a delay slot. */
	275
	276	static int insn_size(struct task_struct *child, unsigned long pc)
	277	{
	278	unsigned long opcode;
	279	int copied;
	280	int opsize = 0;
	281
	282	/* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
f307ab6d	283	copied = access_process_vm(child, pc, &opcode, sizeof(opcode), FOLL_FORCE);
51533b61 MS	284	if (copied != sizeof(opcode))
	285	return 0;
	286
	287	switch ((opcode & 0x0f00) >> 8) {
	288	case 0x0:
	289	case 0x9:
	290	case 0xb:
	291	opsize = 2;
	292	break;
	293	case 0xe:
	294	case 0xf:
	295	opsize = 6;
	296	break;
	297	case 0xd:
	298	/* Could be 4 or 6; check more bits. */
	299	if ((opcode & 0xff) == 0xff)
	300	opsize = 4;
	301	else
	302	opsize = 6;
	303	break;
	304	default:
	305	panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
	306	opcode, pc);
	307	}
	308
	309	return opsize;
	310	}
	311
	312	static unsigned long get_pseudo_pc(struct task_struct *child)
	313	{
	314	/* Default value for PC is ERP. */
	315	unsigned long pc = get_reg(child, PT_ERP);
	316
	317	if (pc & 0x1) {
	318	unsigned long spc = get_reg(child, PT_SPC);
	319	/* Delay slot bit set. Report as stopped on proper
	320	instruction. */
	321	if (spc) {
	322	/* Rely on SPC if set. FIXME: We might want to check
	323	that EXS indicates we stopped due to a single-step
	324	exception. */
	325	pc = spc;
	326	} else {
	327	/* Calculate the PC from the size of the instruction
	328	that the delay slot we're in belongs to. */
	329	pc += insn_size(child, pc & ~1) - 1;
	330	}
	331	}
	332	return pc;
	333	}
	334
	335	static long bp_owner = 0;
	336
	337	/* Reachable from exit_thread in signal.c, so not static. */
	338	void deconfigure_bp(long pid)
	339	{
	340	int bp;
	341
	342	/* Only deconfigure if the pid is the owner. */
	343	if (bp_owner != pid)
	344	return;
	345
	346	for (bp = 0; bp < 6; bp++) {
	347	unsigned long tmp;
348	/* Deconfigure start and end address (also gets rid of ownership). */
349	put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
350	put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
351
352	/* Deconfigure relevant bits in control register. */
353	tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
354	put_debugreg(pid, PT_BP_CTRL, tmp);
355	}
356	/* No owner now. */
357	bp_owner = 0;
358	}
359
360	static int put_debugreg(long pid, unsigned int regno, long data)
361	{
362	int ret = 0;
363	register int old_srs;
364
365	#ifdef CONFIG_ETRAX_KGDB
366	/* Ignore write, but pretend it was ok if value is 0
367	(we don't want POKEUSR/SETREGS failing unnessecarily). */
368	return (data == 0) ? ret : -1;
369	#endif
370
371	/* Simple owner management. */
372	if (!bp_owner)
373	bp_owner = pid;
374	else if (bp_owner != pid) {
375	/* Ignore write, but pretend it was ok if value is 0
376	(we don't want POKEUSR/SETREGS failing unnessecarily). */
377	return (data == 0) ? ret : -1;
378	}
379
380	/* Remember old SRS. */
381	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
382	/* Switch to BP bank. */
383	SUPP_BANK_SEL(BANK_BP);
384
385	switch (regno - PT_BP) {
386	case 0:
387	SUPP_REG_WR(0, data); break;
388	case 1:
389	case 2:
390	if (data)
391	ret = -1;
392	break;
393	case 3:
394	SUPP_REG_WR(3, data); break;
395	case 4:
396	SUPP_REG_WR(4, data); break;
397	case 5:
398	SUPP_REG_WR(5, data); break;
399	case 6:
400	SUPP_REG_WR(6, data); break;
401	case 7:
402	SUPP_REG_WR(7, data); break;
403	case 8:
404	SUPP_REG_WR(8, data); break;
405	case 9:
406	SUPP_REG_WR(9, data); break;
407	case 10:
408	SUPP_REG_WR(10, data); break;
409	case 11:
410	SUPP_REG_WR(11, data); break;
411	case 12:
412	SUPP_REG_WR(12, data); break;
413	case 13:
414	SUPP_REG_WR(13, data); break;
415	case 14:
416	SUPP_REG_WR(14, data); break;
417	default:
418	ret = -1;
419	break;
420	}
421
422	/* Restore SRS. */
423	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
424	/* Just for show. */
425	NOP();
426	NOP();
427	NOP();
428
429	return ret;
430	}
431
432	static long get_debugreg(long pid, unsigned int regno)
433	{
434	register int old_srs;
435	register long data;
436
437	if (pid != bp_owner) {
438	return 0;
439	}
440
441	/* Remember old SRS. */
442	SPEC_REG_RD(SPEC_REG_SRS, old_srs);
443	/* Switch to BP bank. */
444	SUPP_BANK_SEL(BANK_BP);
445
446	switch (regno - PT_BP) {
447	case 0:
448	SUPP_REG_RD(0, data); break;
449	case 1:
450	case 2:
451	/* error return value? */
452	data = 0;
453	break;
454	case 3:
455	SUPP_REG_RD(3, data); break;
456	case 4:
457	SUPP_REG_RD(4, data); break;
458	case 5:
459	SUPP_REG_RD(5, data); break;
460	case 6:
461	SUPP_REG_RD(6, data); break;
462	case 7:
463	SUPP_REG_RD(7, data); break;
464	case 8:
465	SUPP_REG_RD(8, data); break;
466	case 9:
467	SUPP_REG_RD(9, data); break;
468	case 10:
469	SUPP_REG_RD(10, data); break;
470	case 11:
471	SUPP_REG_RD(11, data); break;
472	case 12:
473	SUPP_REG_RD(12, data); break;
474	case 13:
475	SUPP_REG_RD(13, data); break;
476	case 14:
477	SUPP_REG_RD(14, data); break;
478	default:
479	/* error return value? */
480	data = 0;
481	}
482
483	/* Restore SRS. */
484	SPEC_REG_WR(SPEC_REG_SRS, old_srs);
485	/* Just for show. */
486	NOP();
487	NOP();
488	NOP();
489
490	return data;
491	}