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51533b61 MS |
1 | /* |
2 | * Copyright (C) 2000-2003, Axis Communications AB. | |
3 | */ | |
4 | ||
5 | #include <linux/kernel.h> | |
6 | #include <linux/sched.h> | |
7 | #include <linux/mm.h> | |
8 | #include <linux/smp.h> | |
51533b61 MS |
9 | #include <linux/errno.h> |
10 | #include <linux/ptrace.h> | |
11 | #include <linux/user.h> | |
12 | #include <linux/signal.h> | |
13 | #include <linux/security.h> | |
14 | ||
15 | #include <asm/uaccess.h> | |
16 | #include <asm/page.h> | |
17 | #include <asm/pgtable.h> | |
18 | #include <asm/system.h> | |
19 | #include <asm/processor.h> | |
20 | #include <asm/arch/hwregs/supp_reg.h> | |
21 | ||
22 | /* | |
23 | * Determines which bits in CCS the user has access to. | |
24 | * 1 = access, 0 = no access. | |
25 | */ | |
26 | #define CCS_MASK 0x00087c00 /* SXNZVC */ | |
27 | ||
28 | #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT)) | |
29 | ||
30 | static int put_debugreg(long pid, unsigned int regno, long data); | |
31 | static long get_debugreg(long pid, unsigned int regno); | |
32 | static unsigned long get_pseudo_pc(struct task_struct *child); | |
33 | void deconfigure_bp(long pid); | |
34 | ||
35 | extern unsigned long cris_signal_return_page; | |
36 | ||
37 | /* | |
38 | * Get contents of register REGNO in task TASK. | |
39 | */ | |
40 | long get_reg(struct task_struct *task, unsigned int regno) | |
41 | { | |
42 | /* USP is a special case, it's not in the pt_regs struct but | |
43 | * in the tasks thread struct | |
44 | */ | |
45 | unsigned long ret; | |
46 | ||
47 | if (regno <= PT_EDA) | |
95ca0dc6 | 48 | ret = ((unsigned long *)task_pt_regs(task))[regno]; |
51533b61 MS |
49 | else if (regno == PT_USP) |
50 | ret = task->thread.usp; | |
51 | else if (regno == PT_PPC) | |
52 | ret = get_pseudo_pc(task); | |
53 | else if (regno <= PT_MAX) | |
54 | ret = get_debugreg(task->pid, regno); | |
55 | else | |
56 | ret = 0; | |
57 | ||
58 | return ret; | |
59 | } | |
60 | ||
61 | /* | |
62 | * Write contents of register REGNO in task TASK. | |
63 | */ | |
64 | int put_reg(struct task_struct *task, unsigned int regno, unsigned long data) | |
65 | { | |
66 | if (regno <= PT_EDA) | |
95ca0dc6 | 67 | ((unsigned long *)task_pt_regs(task))[regno] = data; |
51533b61 MS |
68 | else if (regno == PT_USP) |
69 | task->thread.usp = data; | |
70 | else if (regno == PT_PPC) { | |
71 | /* Write pseudo-PC to ERP only if changed. */ | |
72 | if (data != get_pseudo_pc(task)) | |
95ca0dc6 | 73 | task_pt_regs(task)->erp = data; |
51533b61 MS |
74 | } else if (regno <= PT_MAX) |
75 | return put_debugreg(task->pid, regno, data); | |
76 | else | |
77 | return -1; | |
78 | return 0; | |
79 | } | |
80 | ||
81 | /* | |
82 | * Called by kernel/ptrace.c when detaching. | |
83 | * | |
84 | * Make sure the single step bit is not set. | |
85 | */ | |
86 | void | |
87 | ptrace_disable(struct task_struct *child) | |
88 | { | |
89 | unsigned long tmp; | |
90 | ||
91 | /* Deconfigure SPC and S-bit. */ | |
92 | tmp = get_reg(child, PT_CCS) & ~SBIT_USER; | |
93 | put_reg(child, PT_CCS, tmp); | |
94 | put_reg(child, PT_SPC, 0); | |
95 | ||
96 | /* Deconfigure any watchpoints associated with the child. */ | |
97 | deconfigure_bp(child->pid); | |
98 | } | |
99 | ||
100 | ||
481bed45 | 101 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
51533b61 | 102 | { |
51533b61 MS |
103 | int ret; |
104 | unsigned long __user *datap = (unsigned long __user *)data; | |
105 | ||
51533b61 MS |
106 | switch (request) { |
107 | /* Read word at location address. */ | |
108 | case PTRACE_PEEKTEXT: | |
109 | case PTRACE_PEEKDATA: { | |
110 | unsigned long tmp; | |
111 | int copied; | |
112 | ||
113 | ret = -EIO; | |
114 | ||
115 | /* The signal trampoline page is outside the normal user-addressable | |
116 | * space but still accessible. This is hack to make it possible to | |
117 | * access the signal handler code in GDB. | |
118 | */ | |
119 | if ((addr & PAGE_MASK) == cris_signal_return_page) { | |
120 | /* The trampoline page is globally mapped, no page table to traverse.*/ | |
121 | tmp = *(unsigned long*)addr; | |
122 | } else { | |
123 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
124 | ||
125 | if (copied != sizeof(tmp)) | |
126 | break; | |
127 | } | |
128 | ||
129 | ret = put_user(tmp,datap); | |
130 | break; | |
131 | } | |
132 | ||
133 | /* Read the word at location address in the USER area. */ | |
134 | case PTRACE_PEEKUSR: { | |
135 | unsigned long tmp; | |
136 | ||
137 | ret = -EIO; | |
138 | if ((addr & 3) || addr < 0 || addr > PT_MAX << 2) | |
139 | break; | |
140 | ||
141 | tmp = get_reg(child, addr >> 2); | |
142 | ret = put_user(tmp, datap); | |
143 | break; | |
144 | } | |
145 | ||
146 | /* Write the word at location address. */ | |
147 | case PTRACE_POKETEXT: | |
148 | case PTRACE_POKEDATA: | |
f284ce72 | 149 | ret = generic_ptrace_pokedata(child, addr, data); |
51533b61 MS |
150 | break; |
151 | ||
152 | /* Write the word at location address in the USER area. */ | |
153 | case PTRACE_POKEUSR: | |
154 | ret = -EIO; | |
155 | if ((addr & 3) || addr < 0 || addr > PT_MAX << 2) | |
156 | break; | |
157 | ||
158 | addr >>= 2; | |
159 | ||
160 | if (addr == PT_CCS) { | |
161 | /* don't allow the tracing process to change stuff like | |
162 | * interrupt enable, kernel/user bit, dma enables etc. | |
163 | */ | |
164 | data &= CCS_MASK; | |
165 | data |= get_reg(child, PT_CCS) & ~CCS_MASK; | |
166 | } | |
167 | if (put_reg(child, addr, data)) | |
168 | break; | |
169 | ret = 0; | |
170 | break; | |
171 | ||
172 | case PTRACE_SYSCALL: | |
173 | case PTRACE_CONT: | |
174 | ret = -EIO; | |
175 | ||
176 | if (!valid_signal(data)) | |
177 | break; | |
178 | ||
179 | /* Continue means no single-step. */ | |
180 | put_reg(child, PT_SPC, 0); | |
181 | ||
182 | if (!get_debugreg(child->pid, PT_BP_CTRL)) { | |
183 | unsigned long tmp; | |
184 | /* If no h/w bp configured, disable S bit. */ | |
185 | tmp = get_reg(child, PT_CCS) & ~SBIT_USER; | |
186 | put_reg(child, PT_CCS, tmp); | |
187 | } | |
188 | ||
189 | if (request == PTRACE_SYSCALL) { | |
190 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
191 | } | |
192 | else { | |
193 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
194 | } | |
195 | ||
196 | child->exit_code = data; | |
197 | ||
198 | /* TODO: make sure any pending breakpoint is killed */ | |
199 | wake_up_process(child); | |
200 | ret = 0; | |
201 | ||
202 | break; | |
203 | ||
204 | /* Make the child exit by sending it a sigkill. */ | |
205 | case PTRACE_KILL: | |
206 | ret = 0; | |
207 | ||
208 | if (child->exit_state == EXIT_ZOMBIE) | |
209 | break; | |
210 | ||
211 | child->exit_code = SIGKILL; | |
212 | ||
213 | /* Deconfigure single-step and h/w bp. */ | |
214 | ptrace_disable(child); | |
215 | ||
216 | /* TODO: make sure any pending breakpoint is killed */ | |
217 | wake_up_process(child); | |
218 | break; | |
219 | ||
220 | /* Set the trap flag. */ | |
221 | case PTRACE_SINGLESTEP: { | |
222 | unsigned long tmp; | |
223 | ret = -EIO; | |
224 | ||
225 | /* Set up SPC if not set already (in which case we have | |
226 | no other choice but to trust it). */ | |
227 | if (!get_reg(child, PT_SPC)) { | |
228 | /* In case we're stopped in a delay slot. */ | |
229 | tmp = get_reg(child, PT_ERP) & ~1; | |
230 | put_reg(child, PT_SPC, tmp); | |
231 | } | |
232 | tmp = get_reg(child, PT_CCS) | SBIT_USER; | |
233 | put_reg(child, PT_CCS, tmp); | |
234 | ||
235 | if (!valid_signal(data)) | |
236 | break; | |
237 | ||
238 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
239 | ||
240 | /* TODO: set some clever breakpoint mechanism... */ | |
241 | ||
242 | child->exit_code = data; | |
243 | wake_up_process(child); | |
244 | ret = 0; | |
245 | break; | |
246 | ||
247 | } | |
51533b61 MS |
248 | /* Get all GP registers from the child. */ |
249 | case PTRACE_GETREGS: { | |
250 | int i; | |
251 | unsigned long tmp; | |
252 | ||
253 | for (i = 0; i <= PT_MAX; i++) { | |
254 | tmp = get_reg(child, i); | |
255 | ||
256 | if (put_user(tmp, datap)) { | |
257 | ret = -EFAULT; | |
258 | goto out_tsk; | |
259 | } | |
260 | ||
261 | datap++; | |
262 | } | |
263 | ||
264 | ret = 0; | |
265 | break; | |
266 | } | |
267 | ||
268 | /* Set all GP registers in the child. */ | |
269 | case PTRACE_SETREGS: { | |
270 | int i; | |
271 | unsigned long tmp; | |
272 | ||
273 | for (i = 0; i <= PT_MAX; i++) { | |
274 | if (get_user(tmp, datap)) { | |
275 | ret = -EFAULT; | |
276 | goto out_tsk; | |
277 | } | |
278 | ||
279 | if (i == PT_CCS) { | |
280 | tmp &= CCS_MASK; | |
281 | tmp |= get_reg(child, PT_CCS) & ~CCS_MASK; | |
282 | } | |
283 | ||
284 | put_reg(child, i, tmp); | |
285 | datap++; | |
286 | } | |
287 | ||
288 | ret = 0; | |
289 | break; | |
290 | } | |
291 | ||
292 | default: | |
293 | ret = ptrace_request(child, request, addr, data); | |
294 | break; | |
295 | } | |
481bed45 | 296 | |
51533b61 MS |
297 | return ret; |
298 | } | |
299 | ||
300 | void do_syscall_trace(void) | |
301 | { | |
302 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | |
303 | return; | |
304 | ||
305 | if (!(current->ptrace & PT_PTRACED)) | |
306 | return; | |
307 | ||
308 | /* the 0x80 provides a way for the tracing parent to distinguish | |
309 | between a syscall stop and SIGTRAP delivery */ | |
310 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) | |
311 | ? 0x80 : 0)); | |
312 | ||
313 | /* | |
314 | * This isn't the same as continuing with a signal, but it will do for | |
315 | * normal use. | |
316 | */ | |
317 | if (current->exit_code) { | |
318 | send_sig(current->exit_code, current, 1); | |
319 | current->exit_code = 0; | |
320 | } | |
321 | } | |
322 | ||
323 | /* Returns the size of an instruction that has a delay slot. */ | |
324 | ||
325 | static int insn_size(struct task_struct *child, unsigned long pc) | |
326 | { | |
327 | unsigned long opcode; | |
328 | int copied; | |
329 | int opsize = 0; | |
330 | ||
331 | /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */ | |
332 | copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0); | |
333 | if (copied != sizeof(opcode)) | |
334 | return 0; | |
335 | ||
336 | switch ((opcode & 0x0f00) >> 8) { | |
337 | case 0x0: | |
338 | case 0x9: | |
339 | case 0xb: | |
340 | opsize = 2; | |
341 | break; | |
342 | case 0xe: | |
343 | case 0xf: | |
344 | opsize = 6; | |
345 | break; | |
346 | case 0xd: | |
347 | /* Could be 4 or 6; check more bits. */ | |
348 | if ((opcode & 0xff) == 0xff) | |
349 | opsize = 4; | |
350 | else | |
351 | opsize = 6; | |
352 | break; | |
353 | default: | |
354 | panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n", | |
355 | opcode, pc); | |
356 | } | |
357 | ||
358 | return opsize; | |
359 | } | |
360 | ||
361 | static unsigned long get_pseudo_pc(struct task_struct *child) | |
362 | { | |
363 | /* Default value for PC is ERP. */ | |
364 | unsigned long pc = get_reg(child, PT_ERP); | |
365 | ||
366 | if (pc & 0x1) { | |
367 | unsigned long spc = get_reg(child, PT_SPC); | |
368 | /* Delay slot bit set. Report as stopped on proper | |
369 | instruction. */ | |
370 | if (spc) { | |
371 | /* Rely on SPC if set. FIXME: We might want to check | |
372 | that EXS indicates we stopped due to a single-step | |
373 | exception. */ | |
374 | pc = spc; | |
375 | } else { | |
376 | /* Calculate the PC from the size of the instruction | |
377 | that the delay slot we're in belongs to. */ | |
378 | pc += insn_size(child, pc & ~1) - 1; | |
379 | } | |
380 | } | |
381 | return pc; | |
382 | } | |
383 | ||
384 | static long bp_owner = 0; | |
385 | ||
386 | /* Reachable from exit_thread in signal.c, so not static. */ | |
387 | void deconfigure_bp(long pid) | |
388 | { | |
389 | int bp; | |
390 | ||
391 | /* Only deconfigure if the pid is the owner. */ | |
392 | if (bp_owner != pid) | |
393 | return; | |
394 | ||
395 | for (bp = 0; bp < 6; bp++) { | |
396 | unsigned long tmp; | |
397 | /* Deconfigure start and end address (also gets rid of ownership). */ | |
398 | put_debugreg(pid, PT_BP + 3 + (bp * 2), 0); | |
399 | put_debugreg(pid, PT_BP + 4 + (bp * 2), 0); | |
400 | ||
401 | /* Deconfigure relevant bits in control register. */ | |
402 | tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4))); | |
403 | put_debugreg(pid, PT_BP_CTRL, tmp); | |
404 | } | |
405 | /* No owner now. */ | |
406 | bp_owner = 0; | |
407 | } | |
408 | ||
409 | static int put_debugreg(long pid, unsigned int regno, long data) | |
410 | { | |
411 | int ret = 0; | |
412 | register int old_srs; | |
413 | ||
414 | #ifdef CONFIG_ETRAX_KGDB | |
415 | /* Ignore write, but pretend it was ok if value is 0 | |
416 | (we don't want POKEUSR/SETREGS failing unnessecarily). */ | |
417 | return (data == 0) ? ret : -1; | |
418 | #endif | |
419 | ||
420 | /* Simple owner management. */ | |
421 | if (!bp_owner) | |
422 | bp_owner = pid; | |
423 | else if (bp_owner != pid) { | |
424 | /* Ignore write, but pretend it was ok if value is 0 | |
425 | (we don't want POKEUSR/SETREGS failing unnessecarily). */ | |
426 | return (data == 0) ? ret : -1; | |
427 | } | |
428 | ||
429 | /* Remember old SRS. */ | |
430 | SPEC_REG_RD(SPEC_REG_SRS, old_srs); | |
431 | /* Switch to BP bank. */ | |
432 | SUPP_BANK_SEL(BANK_BP); | |
433 | ||
434 | switch (regno - PT_BP) { | |
435 | case 0: | |
436 | SUPP_REG_WR(0, data); break; | |
437 | case 1: | |
438 | case 2: | |
439 | if (data) | |
440 | ret = -1; | |
441 | break; | |
442 | case 3: | |
443 | SUPP_REG_WR(3, data); break; | |
444 | case 4: | |
445 | SUPP_REG_WR(4, data); break; | |
446 | case 5: | |
447 | SUPP_REG_WR(5, data); break; | |
448 | case 6: | |
449 | SUPP_REG_WR(6, data); break; | |
450 | case 7: | |
451 | SUPP_REG_WR(7, data); break; | |
452 | case 8: | |
453 | SUPP_REG_WR(8, data); break; | |
454 | case 9: | |
455 | SUPP_REG_WR(9, data); break; | |
456 | case 10: | |
457 | SUPP_REG_WR(10, data); break; | |
458 | case 11: | |
459 | SUPP_REG_WR(11, data); break; | |
460 | case 12: | |
461 | SUPP_REG_WR(12, data); break; | |
462 | case 13: | |
463 | SUPP_REG_WR(13, data); break; | |
464 | case 14: | |
465 | SUPP_REG_WR(14, data); break; | |
466 | default: | |
467 | ret = -1; | |
468 | break; | |
469 | } | |
470 | ||
471 | /* Restore SRS. */ | |
472 | SPEC_REG_WR(SPEC_REG_SRS, old_srs); | |
473 | /* Just for show. */ | |
474 | NOP(); | |
475 | NOP(); | |
476 | NOP(); | |
477 | ||
478 | return ret; | |
479 | } | |
480 | ||
481 | static long get_debugreg(long pid, unsigned int regno) | |
482 | { | |
483 | register int old_srs; | |
484 | register long data; | |
485 | ||
486 | if (pid != bp_owner) { | |
487 | return 0; | |
488 | } | |
489 | ||
490 | /* Remember old SRS. */ | |
491 | SPEC_REG_RD(SPEC_REG_SRS, old_srs); | |
492 | /* Switch to BP bank. */ | |
493 | SUPP_BANK_SEL(BANK_BP); | |
494 | ||
495 | switch (regno - PT_BP) { | |
496 | case 0: | |
497 | SUPP_REG_RD(0, data); break; | |
498 | case 1: | |
499 | case 2: | |
500 | /* error return value? */ | |
501 | data = 0; | |
502 | break; | |
503 | case 3: | |
504 | SUPP_REG_RD(3, data); break; | |
505 | case 4: | |
506 | SUPP_REG_RD(4, data); break; | |
507 | case 5: | |
508 | SUPP_REG_RD(5, data); break; | |
509 | case 6: | |
510 | SUPP_REG_RD(6, data); break; | |
511 | case 7: | |
512 | SUPP_REG_RD(7, data); break; | |
513 | case 8: | |
514 | SUPP_REG_RD(8, data); break; | |
515 | case 9: | |
516 | SUPP_REG_RD(9, data); break; | |
517 | case 10: | |
518 | SUPP_REG_RD(10, data); break; | |
519 | case 11: | |
520 | SUPP_REG_RD(11, data); break; | |
521 | case 12: | |
522 | SUPP_REG_RD(12, data); break; | |
523 | case 13: | |
524 | SUPP_REG_RD(13, data); break; | |
525 | case 14: | |
526 | SUPP_REG_RD(14, data); break; | |
527 | default: | |
528 | /* error return value? */ | |
529 | data = 0; | |
530 | } | |
531 | ||
532 | /* Restore SRS. */ | |
533 | SPEC_REG_WR(SPEC_REG_SRS, old_srs); | |
534 | /* Just for show. */ | |
535 | NOP(); | |
536 | NOP(); | |
537 | NOP(); | |
538 | ||
539 | return data; | |
540 | } |