[linux-2.6-block.git] / arch / cris / arch-v32 / kernel / head.S

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * CRISv32 kernel startup code.
 *
 * Copyright (C) 2003, Axis Communications AB
 */

#include <linux/init.h>

#define ASSEMBLER_MACROS_ONLY

/*
 * The macros found in mmu_defs_asm.h uses the ## concatenation operator, so
 * -traditional must not be used when assembling this file.
 */
#include <arch/memmap.h>
#include <hwregs/reg_rdwr.h>
#include <hwregs/intr_vect.h>
#include <hwregs/asm/mmu_defs_asm.h>
#include <hwregs/asm/reg_map_asm.h>
#include <mach/startup.inc>

#define CRAMFS_MAGIC 0x28cd3d45
#define JHEAD_MAGIC 0x1FF528A6
#define JHEAD_SIZE 8
#define RAM_INIT_MAGIC 0x56902387
#define COMMAND_LINE_MAGIC 0x87109563
#define NAND_BOOT_MAGIC 0x9a9db001

	;; NOTE: R8 and R9 carry information from the decompressor (if the
	;; kernel was compressed). They must not be used in the code below
	;; until they are read!

	;; Exported symbols.
	.global etrax_irv
	.global romfs_start
	.global romfs_length
	.global romfs_in_flash
	.global nand_boot
	.global swapper_pg_dir

	__HEAD
tstart:
	;; This is the entry point of the kernel. The CPU is currently in
	;; supervisor mode.
	;;
	;; 0x00000000 if flash.
	;; 0x40004000 if DRAM.
	;;
	di

	START_CLOCKS

	SETUP_WAIT_STATES

	GIO_INIT

	;; Setup and enable the MMU. Use same configuration for both the data
	;; and the instruction MMU.
	;;
	;; Note; 3 cycles is needed for a bank-select to take effect. Further;
	;; bank 1 is the instruction MMU, bank 2 is the data MMU.

#ifdef CONFIG_CRIS_MACH_ARTPEC3
	move.d	REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8)	\
		| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4)	\
		| REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5)     \
		| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
#else
	move.d	REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8)	\
		| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4)	\
		| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
#endif

	;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
	move.d	REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4)  \
		| REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0), $r1

	;; Enable certain page protections and setup linear mapping
	;; for f,e,c,b,4,0.

	;; ARTPEC-3:
	;; c,d used for linear kernel mapping, up to 512 MB
	;; e used for vmalloc
	;; f unused, but page mapped to get page faults

	;; ETRAX FS:
	;; c used for linear kernel mapping, up to 256 MB
	;; d used for vmalloc
	;; e,f used for memory-mapped NOR flash

#ifdef CONFIG_CRIS_MACH_ARTPEC3
	move.d	REG_STATE(mmu, rw_mm_cfg, we, on)		\
		| REG_STATE(mmu, rw_mm_cfg, acc, on)		\
		| REG_STATE(mmu, rw_mm_cfg, ex, on)		\
		| REG_STATE(mmu, rw_mm_cfg, inv, on)            \
		| REG_STATE(mmu, rw_mm_cfg, seg_f, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_e, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_d, linear)      \
		| REG_STATE(mmu, rw_mm_cfg, seg_c, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_b, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_a, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_9, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_8, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_7, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_6, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_5, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_4, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_3, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_2, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_1, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
#else
	move.d	REG_STATE(mmu, rw_mm_cfg, we, on)		\
		| REG_STATE(mmu, rw_mm_cfg, acc, on)		\
		| REG_STATE(mmu, rw_mm_cfg, ex, on)		\
		| REG_STATE(mmu, rw_mm_cfg, inv, on)		\
		| REG_STATE(mmu, rw_mm_cfg, seg_f, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_e, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_d, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_c, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_b, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_a, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_9, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_8, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_7, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_6, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_5, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_4, linear)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_3, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_2, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_1, page)	\
		| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
#endif

	;; Update instruction MMU.
	move	1, $srs
	nop
	nop
	nop
	move	$r0, $s2	; kbase_hi.
	move	$r1, $s1	; kbase_lo.
	move	$r2, $s0	; mm_cfg, virtual memory configuration.

	;; Update data MMU.
	move	2, $srs
	nop
	nop
	nop
	move	$r0, $s2	; kbase_hi.
	move	$r1, $s1	; kbase_lo
	move	$r2, $s0	; mm_cfg, virtual memory configuration.

	;; Enable data and instruction MMU.
	move	0, $srs
	moveq	0xf, $r0	;  IMMU, DMMU, DCache, Icache on
	nop
	nop
	nop
	move	$r0, $s0
	nop
	nop
	nop

	; Check if starting from DRAM (network->RAM boot or unpacked
	; compressed kernel), or directly from flash.
	lapcq	., $r0
	and.d	0x7fffffff, $r0 ; Mask off the non-cache bit.
	cmp.d	0x10000, $r0	; Arbitrary, something above this code.
	blo	_inflash0
	nop

	jump	_inram		; Jump to cached RAM.
	nop

	;; Jumpgate.
_inflash0:
	jump _inflash
	nop

	;; Put the following in a section so that storage for it can be
	;; reclaimed after init is finished.
	__INIT

_inflash:

	;; Initialize DRAM.
	cmp.d	RAM_INIT_MAGIC, $r8 ; Already initialized?
	beq	_dram_initialized
	nop

#if defined CONFIG_ETRAXFS
#include "../mach-fs/dram_init.S"
#elif defined CONFIG_CRIS_MACH_ARTPEC3
#include "../mach-a3/dram_init.S"
#else
#error Only ETRAXFS and ARTPEC-3 supported!
#endif


_dram_initialized:
	;; Copy the text and data section to DRAM. This depends on that the
	;; variables used below are correctly set up by the linker script.
	;; The calculated value stored in R4 is used below.
	;; Leave the cramfs file system (piggybacked after the kernel) in flash.
	moveq	0, $r0		; Source.
	move.d	text_start, $r1	; Destination.
	move.d	__vmlinux_end, $r2
	move.d	$r2, $r4
	sub.d	$r1, $r4
1:	move.w	[$r0+], $r3
	move.w	$r3, [$r1+]
	cmp.d	$r2, $r1
	blo	1b
	nop

	;; Check for cramfs.
	moveq	0, $r0
	move.d	romfs_length, $r1
	move.d	$r0, [$r1]
	move.d	[$r4], $r0	; cramfs_super.magic
	cmp.d	CRAMFS_MAGIC, $r0
	bne 1f
	nop

	;; Set length and start of cramfs, set romfs_in_flash flag
	addoq	+4, $r4, $acr
	move.d	[$acr], $r0
	move.d	romfs_length, $r1
	move.d	$r0, [$r1]
	add.d	0xf0000000, $r4	; Add cached flash start in virtual memory.
	move.d	romfs_start, $r1
	move.d	$r4, [$r1]
1:	moveq	1, $r0
	move.d	romfs_in_flash, $r1
	move.d	$r0, [$r1]

	jump	_start_it	; Jump to cached code.
	nop

_inram:
	;; Check if booting from NAND flash; if so, set appropriate flags
	;; and move on.
	cmp.d	NAND_BOOT_MAGIC, $r12
	bne	move_cramfs	; not nand, jump
	moveq	1, $r0
	move.d	nand_boot, $r1	; tell axisflashmap we're booting from NAND
	move.d	$r0, [$r1]
	moveq	0, $r0		; tell axisflashmap romfs is not in
	move.d	romfs_in_flash, $r1 ; (directly accessed) flash
	move.d	$r0, [$r1]
	jump	_start_it	; continue with boot
	nop

move_cramfs:
	;; kernel is in DRAM.
	;; Must figure out if there is a piggybacked rootfs image or not.
	;; Set romfs_length to 0 => no rootfs image available by default.
	moveq	0, $r0
	move.d	romfs_length, $r1
	move.d	$r0, [$r1]

	;; The kernel could have been unpacked to DRAM by the loader, but
	;; the cramfs image could still be in the flash immediately
	;; following the compressed kernel image. The loader passes the address
	;; of the byte succeeding the last compressed byte in the flash in
	;; register R9 when starting the kernel.
	cmp.d	0x0ffffff8, $r9
	bhs	_no_romfs_in_flash ; R9 points outside the flash area.
	nop
	;; cramfs rootfs might to be in flash. Check for it.
	move.d	[$r9], $r0	; cramfs_super.magic
	cmp.d	CRAMFS_MAGIC, $r0
	bne	_no_romfs_in_flash
	nop

	;; found cramfs in flash. set address and size, and romfs_in_flash flag.
	addoq	+4, $r9, $acr
	move.d	[$acr], $r0
	move.d	romfs_length, $r1
	move.d	$r0, [$r1]
	add.d	0xf0000000, $r9	; Add cached flash start in virtual memory.
	move.d	romfs_start, $r1
	move.d	$r9, [$r1]
	moveq	1, $r0
	move.d	romfs_in_flash, $r1
	move.d	$r0, [$r1]

	jump	_start_it	; Jump to cached code.
	nop

_no_romfs_in_flash:
	;; No romfs in flash, so look for cramfs, or jffs2 with jhead,
	;; after kernel in RAM, as is the case with network->RAM boot.
	;; For cramfs, partition starts with magic and length.
	;; For jffs2, a jhead is prepended which contains with magic and length.
	;; The jhead is not part of the jffs2 partition however.
	move.d	__bss_start, $r0
	move.d	[$r0], $r1
	cmp.d	CRAMFS_MAGIC, $r1 ; cramfs magic?
	beq	2f		  ; yes, jump
	nop
	cmp.d	JHEAD_MAGIC, $r1 ; jffs2 (jhead) magic?
	bne	4f		; no, skip copy
	nop
	addq	4, $r0		; location of jffs2 size
	move.d	[$r0+], $r2	; fetch jffs2 size -> r2
				; r0 now points to start of jffs2
	ba	3f
	nop
2:
	addoq	+4, $r0, $acr	; location of cramfs size
	move.d	[$acr], $r2	; fetch cramfs size -> r2
				; r0 still points to start of cramfs
3:
	;; Now, move the root fs to after kernel's BSS

	move.d	_end, $r1	; start of cramfs -> r1
	move.d	romfs_start, $r3
	move.d	$r1, [$r3]	; store at romfs_start (for axisflashmap)
	move.d	romfs_length, $r3
	move.d	$r2, [$r3]	; store size at romfs_length

	add.d	$r2, $r0	; copy from end and downwards
	add.d	$r2, $r1

	lsrq	1, $r2		; Size is in bytes, we copy words.
	addq    1, $r2
1:
	move.w	[$r0], $r3
	move.w	$r3, [$r1]
	subq	2, $r0
	subq	2, $r1
	subq	1, $r2
	bne	1b
	nop

4:
	;; BSS move done.
	;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
	;; Also clear nand_boot flag; if we got here, we know we've not
	;; booted from NAND flash.
	moveq	0, $r0
	move.d	romfs_in_flash, $r1
	move.d	$r0, [$r1]
	moveq	0, $r0
	move.d	nand_boot, $r1
	move.d	$r0, [$r1]

	jump	_start_it	; Jump to cached code.
	nop

_start_it:

	;; Check if kernel command line is supplied
	cmp.d	COMMAND_LINE_MAGIC, $r10
	bne	no_command_line
	nop

	move.d	256, $r13
	move.d  cris_command_line, $r10
	or.d	0x80000000, $r11 ; Make it virtual
1:
	move.b  [$r11+], $r1
	move.b  $r1, [$r10+]
	subq	1, $r13
	bne	1b
	nop

no_command_line:

	;; The kernel stack contains a task structure for each task. This
	;; the initial kernel stack is in the same page as the init_task,
	;; but starts at the top of the page, i.e. + 8192 bytes.
	move.d	init_thread_union + 8192, $sp
	move.d	ebp_start, $r0	; Defined in linker-script.
	move	$r0, $ebp
	move.d	etrax_irv, $r1	; Set the exception base register and pointer.
	move.d	$r0, [$r1]

	;; Clear the BSS region from _bss_start to _end.
	move.d	__bss_start, $r0
	move.d	_end, $r1
1:	clear.d	[$r0+]
	cmp.d	$r1, $r0
	blo 1b
	nop

	; Initialize registers to increase determinism
	move.d __bss_start, $r0
	movem [$r0], $r13

#ifdef CONFIG_ETRAX_L2CACHE
	jsr	l2cache_init
	nop
#endif

	jump	start_kernel	; Jump to start_kernel() in init/main.c.
	nop

	.data
etrax_irv:
	.dword 0

; Variables for communication with the Axis flash map driver (axisflashmap),
; and for setting up memory in arch/cris/kernel/setup.c .

; romfs_start is set to the start of the root file system, if it exists
; in directly accessible memory (i.e. NOR Flash when booting from Flash,
; or RAM when booting directly from a network-downloaded RAM image)
romfs_start:
	.dword 0

; romfs_length is set to the size of the root file system image, if it exists
; in directly accessible memory (see romfs_start). Otherwise it is set to 0.
romfs_length:
	.dword 0

; romfs_in_flash is set to 1 if the root file system resides in directly
; accessible flash memory (i.e. NOR flash). It is set to 0 for RAM boot
; or NAND flash boot.
romfs_in_flash:
	.dword 0

; nand_boot is set to 1 when the kernel has been booted from NAND flash
nand_boot:
	.dword 0

swapper_pg_dir = 0xc0002000

	.section ".init.data", "aw"

#if defined CONFIG_ETRAXFS
#include "../mach-fs/hw_settings.S"
#elif defined CONFIG_CRIS_MACH_ARTPEC3
#include "../mach-a3/hw_settings.S"
#else
#error Only ETRAXFS and ARTPEC-3 supported!
#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
51533b61 MS	2	/*
	3	* CRISv32 kernel startup code.
	4	*
	5	* Copyright (C) 2003, Axis Communications AB
	6	*/
	7
f9f3f864 GR	8	#include <linux/init.h>
f9f3f864 GR	9
51533b61 MS	10	#define ASSEMBLER_MACROS_ONLY
	11
	12	/*
	13	* The macros found in mmu_defs_asm.h uses the ## concatenation operator, so
	14	* -traditional must not be used when assembling this file.
	15	*/
556dcee7	16	#include <arch/memmap.h>
c5ec6fb0	17	#include <hwregs/reg_rdwr.h>
96e47669 JN	18	#include <hwregs/intr_vect.h>
	19	#include <hwregs/asm/mmu_defs_asm.h>
	20	#include <hwregs/asm/reg_map_asm.h>
556dcee7	21	#include <mach/startup.inc>
51533b61 MS	22
51533b61 MS	23	#define CRAMFS_MAGIC 0x28cd3d45
96e47669 JN	24	#define JHEAD_MAGIC 0x1FF528A6
96e47669 JN	25	#define JHEAD_SIZE 8
51533b61 MS	26	#define RAM_INIT_MAGIC 0x56902387
51533b61 MS	27	#define COMMAND_LINE_MAGIC 0x87109563
96e47669	28	#define NAND_BOOT_MAGIC 0x9a9db001
51533b61 MS	29
	30	;; NOTE: R8 and R9 carry information from the decompressor (if the
	31	;; kernel was compressed). They must not be used in the code below
	32	;; until they are read!
	33
	34	;; Exported symbols.
	35	.global etrax_irv
	36	.global romfs_start
	37	.global romfs_length
	38	.global romfs_in_flash
96e47669	39	.global nand_boot
51533b61	40	.global swapper_pg_dir
51533b61	41
f9f3f864	42	__HEAD
51533b61 MS	43	tstart:
	44	;; This is the entry point of the kernel. The CPU is currently in
	45	;; supervisor mode.
	46	;;
	47	;; 0x00000000 if flash.
	48	;; 0x40004000 if DRAM.
	49	;;
	50	di
	51
96e47669 JN	52	START_CLOCKS
	53
	54	SETUP_WAIT_STATES
	55
f8e47cb0 JN	56	GIO_INIT
f8e47cb0 JN	57
51533b61 MS	58	;; Setup and enable the MMU. Use same configuration for both the data
	59	;; and the instruction MMU.
	60	;;
	61	;; Note; 3 cycles is needed for a bank-select to take effect. Further;
	62	;; bank 1 is the instruction MMU, bank 2 is the data MMU.
345c52e0 JN	63
	64	#ifdef CONFIG_CRIS_MACH_ARTPEC3
	65	move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
	66	\| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
	67	\| REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5) \
	68	\| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
51533b61	69	#else
51533b61	70	move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
96e47669	71	\| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
d75d806c	72	\| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
51533b61 MS	73	#endif
	74
	75	;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
	76	move.d REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4) \
	77	\| REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0), $r1
	78
	79	;; Enable certain page protections and setup linear mapping
	80	;; for f,e,c,b,4,0.
345c52e0 JN	81
	82	;; ARTPEC-3:
	83	;; c,d used for linear kernel mapping, up to 512 MB
	84	;; e used for vmalloc
	85	;; f unused, but page mapped to get page faults
	86
	87	;; ETRAX FS:
	88	;; c used for linear kernel mapping, up to 256 MB
	89	;; d used for vmalloc
	90	;; e,f used for memory-mapped NOR flash
	91
	92	#ifdef CONFIG_CRIS_MACH_ARTPEC3
	93	move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
	94	\| REG_STATE(mmu, rw_mm_cfg, acc, on) \
	95	\| REG_STATE(mmu, rw_mm_cfg, ex, on) \
	96	\| REG_STATE(mmu, rw_mm_cfg, inv, on) \
	97	\| REG_STATE(mmu, rw_mm_cfg, seg_f, page) \
	98	\| REG_STATE(mmu, rw_mm_cfg, seg_e, page) \
	99	\| REG_STATE(mmu, rw_mm_cfg, seg_d, linear) \
	100	\| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
	101	\| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
	102	\| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
	103	\| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
	104	\| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
	105	\| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
	106	\| REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
	107	\| REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
	108	\| REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
	109	\| REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
	110	\| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
	111	\| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
	112	\| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
51533b61 MS	113	#else
	114	move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
	115	\| REG_STATE(mmu, rw_mm_cfg, acc, on) \
	116	\| REG_STATE(mmu, rw_mm_cfg, ex, on) \
	117	\| REG_STATE(mmu, rw_mm_cfg, inv, on) \
	118	\| REG_STATE(mmu, rw_mm_cfg, seg_f, linear) \
	119	\| REG_STATE(mmu, rw_mm_cfg, seg_e, linear) \
	120	\| REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
	121	\| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
	122	\| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
d75d806c	123	\| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
51533b61 MS	124	\| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
	125	\| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
	126	\| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
	127	\| REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
	128	\| REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
	129	\| REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
	130	\| REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
	131	\| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
	132	\| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
	133	\| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
	134	#endif
	135
	136	;; Update instruction MMU.
	137	move 1, $srs
	138	nop
	139	nop
	140	nop
	141	move $r0, $s2 ; kbase_hi.
	142	move $r1, $s1 ; kbase_lo.
	143	move $r2, $s0 ; mm_cfg, virtual memory configuration.
	144
	145	;; Update data MMU.
	146	move 2, $srs
	147	nop
	148	nop
	149	nop
	150	move $r0, $s2 ; kbase_hi.
	151	move $r1, $s1 ; kbase_lo
	152	move $r2, $s0 ; mm_cfg, virtual memory configuration.
	153
	154	;; Enable data and instruction MMU.
	155	move 0, $srs
	156	moveq 0xf, $r0 ; IMMU, DMMU, DCache, Icache on
	157	nop
	158	nop
	159	nop
	160	move $r0, $s0
	161	nop
	162	nop
	163	nop
	164
96e47669 JN	165	; Check if starting from DRAM (network->RAM boot or unpacked
96e47669 JN	166	; compressed kernel), or directly from flash.
51533b61 MS	167	lapcq ., $r0
	168	and.d 0x7fffffff, $r0 ; Mask off the non-cache bit.
	169	cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
	170	blo _inflash0
	171	nop
51533b61 MS	172
	173	jump _inram ; Jump to cached RAM.
	174	nop
	175
	176	;; Jumpgate.
	177	_inflash0:
	178	jump _inflash
	179	nop
	180
	181	;; Put the following in a section so that storage for it can be
	182	;; reclaimed after init is finished.
f9f3f864	183	__INIT
51533b61 MS	184
	185	_inflash:
	186
	187	;; Initialize DRAM.
	188	cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
	189	beq _dram_initialized
	190	nop
	191
c5ec6fb0 JN	192	#if defined CONFIG_ETRAXFS
	193	#include "../mach-fs/dram_init.S"
	194	#elif defined CONFIG_CRIS_MACH_ARTPEC3
	195	#include "../mach-a3/dram_init.S"
	196	#else
	197	#error Only ETRAXFS and ARTPEC-3 supported!
	198	#endif
	199
51533b61 MS	200
	201	_dram_initialized:
	202	;; Copy the text and data section to DRAM. This depends on that the
	203	;; variables used below are correctly set up by the linker script.
	204	;; The calculated value stored in R4 is used below.
96e47669	205	;; Leave the cramfs file system (piggybacked after the kernel) in flash.
51533b61 MS	206	moveq 0, $r0 ; Source.
	207	move.d text_start, $r1 ; Destination.
	208	move.d __vmlinux_end, $r2
	209	move.d $r2, $r4
	210	sub.d $r1, $r4
	211	1: move.w [$r0+], $r3
	212	move.w $r3, [$r1+]
	213	cmp.d $r2, $r1
	214	blo 1b
	215	nop
	216
96e47669	217	;; Check for cramfs.
51533b61 MS	218	moveq 0, $r0
	219	move.d romfs_length, $r1
	220	move.d $r0, [$r1]
	221	move.d [$r4], $r0 ; cramfs_super.magic
	222	cmp.d CRAMFS_MAGIC, $r0
	223	bne 1f
	224	nop
	225
96e47669	226	;; Set length and start of cramfs, set romfs_in_flash flag
51533b61 MS	227	addoq +4, $r4, $acr
	228	move.d [$acr], $r0
	229	move.d romfs_length, $r1
	230	move.d $r0, [$r1]
	231	add.d 0xf0000000, $r4 ; Add cached flash start in virtual memory.
	232	move.d romfs_start, $r1
	233	move.d $r4, [$r1]
	234	1: moveq 1, $r0
	235	move.d romfs_in_flash, $r1
	236	move.d $r0, [$r1]
	237
	238	jump _start_it ; Jump to cached code.
	239	nop
	240
	241	_inram:
96e47669 JN	242	;; Check if booting from NAND flash; if so, set appropriate flags
	243	;; and move on.
	244	cmp.d NAND_BOOT_MAGIC, $r12
	245	bne move_cramfs ; not nand, jump
51533b61	246	moveq 1, $r0
96e47669	247	move.d nand_boot, $r1 ; tell axisflashmap we're booting from NAND
51533b61	248	move.d $r0, [$r1]
96e47669 JN	249	moveq 0, $r0 ; tell axisflashmap romfs is not in
	250	move.d romfs_in_flash, $r1 ; (directly accessed) flash
	251	move.d $r0, [$r1]
	252	jump _start_it ; continue with boot
51533b61 MS	253	nop
	254
	255	move_cramfs:
96e47669 JN	256	;; kernel is in DRAM.
	257	;; Must figure out if there is a piggybacked rootfs image or not.
	258	;; Set romfs_length to 0 => no rootfs image available by default.
51533b61 MS	259	moveq 0, $r0
	260	move.d romfs_length, $r1
	261	move.d $r0, [$r1]
	262
51533b61	263	;; The kernel could have been unpacked to DRAM by the loader, but
96e47669 JN	264	;; the cramfs image could still be in the flash immediately
	265	;; following the compressed kernel image. The loader passes the address
	266	;; of the byte succeeding the last compressed byte in the flash in
51533b61 MS	267	;; register R9 when starting the kernel.
	268	cmp.d 0x0ffffff8, $r9
	269	bhs _no_romfs_in_flash ; R9 points outside the flash area.
	270	nop
96e47669	271	;; cramfs rootfs might to be in flash. Check for it.
51533b61 MS	272	move.d [$r9], $r0 ; cramfs_super.magic
	273	cmp.d CRAMFS_MAGIC, $r0
	274	bne _no_romfs_in_flash
	275	nop
	276
96e47669	277	;; found cramfs in flash. set address and size, and romfs_in_flash flag.
51533b61 MS	278	addoq +4, $r9, $acr
	279	move.d [$acr], $r0
	280	move.d romfs_length, $r1
	281	move.d $r0, [$r1]
	282	add.d 0xf0000000, $r9 ; Add cached flash start in virtual memory.
	283	move.d romfs_start, $r1
	284	move.d $r9, [$r1]
	285	moveq 1, $r0
	286	move.d romfs_in_flash, $r1
	287	move.d $r0, [$r1]
	288
	289	jump _start_it ; Jump to cached code.
	290	nop
	291
	292	_no_romfs_in_flash:
96e47669 JN	293	;; No romfs in flash, so look for cramfs, or jffs2 with jhead,
	294	;; after kernel in RAM, as is the case with network->RAM boot.
	295	;; For cramfs, partition starts with magic and length.
	296	;; For jffs2, a jhead is prepended which contains with magic and length.
	297	;; The jhead is not part of the jffs2 partition however.
403a1c4f	298	move.d __bss_start, $r0
51533b61	299	move.d [$r0], $r1
96e47669 JN	300	cmp.d CRAMFS_MAGIC, $r1 ; cramfs magic?
	301	beq 2f ; yes, jump
	302	nop
	303	cmp.d JHEAD_MAGIC, $r1 ; jffs2 (jhead) magic?
	304	bne 4f ; no, skip copy
	305	nop
	306	addq 4, $r0 ; location of jffs2 size
	307	move.d [$r0+], $r2 ; fetch jffs2 size -> r2
	308	; r0 now points to start of jffs2
	309	ba 3f
51533b61	310	nop
96e47669 JN	311	2:
	312	addoq +4, $r0, $acr ; location of cramfs size
	313	move.d [$acr], $r2 ; fetch cramfs size -> r2
	314	; r0 still points to start of cramfs
	315	3:
	316	;; Now, move the root fs to after kernel's BSS
51533b61	317
96e47669	318	move.d _end, $r1 ; start of cramfs -> r1
51533b61	319	move.d romfs_start, $r3
96e47669	320	move.d $r1, [$r3] ; store at romfs_start (for axisflashmap)
51533b61	321	move.d romfs_length, $r3
96e47669	322	move.d $r2, [$r3] ; store size at romfs_length
51533b61	323
96e47669	324	add.d $r2, $r0 ; copy from end and downwards
51533b61 MS	325	add.d $r2, $r1
	326
	327	lsrq 1, $r2 ; Size is in bytes, we copy words.
	328	addq 1, $r2
	329	1:
	330	move.w [$r0], $r3
	331	move.w $r3, [$r1]
	332	subq 2, $r0
	333	subq 2, $r1
	334	subq 1, $r2
	335	bne 1b
	336	nop
51533b61	337
96e47669 JN	338	4:
	339	;; BSS move done.
	340	;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
	341	;; Also clear nand_boot flag; if we got here, we know we've not
	342	;; booted from NAND flash.
51533b61 MS	343	moveq 0, $r0
	344	move.d romfs_in_flash, $r1
	345	move.d $r0, [$r1]
96e47669 JN	346	moveq 0, $r0
	347	move.d nand_boot, $r1
	348	move.d $r0, [$r1]
51533b61 MS	349
	350	jump _start_it ; Jump to cached code.
	351	nop
	352
	353	_start_it:
	354
	355	;; Check if kernel command line is supplied
	356	cmp.d COMMAND_LINE_MAGIC, $r10
	357	bne no_command_line
	358	nop
	359
	360	move.d 256, $r13
	361	move.d cris_command_line, $r10
	362	or.d 0x80000000, $r11 ; Make it virtual
	363	1:
96e47669 JN	364	move.b [$r11+], $r1
96e47669 JN	365	move.b $r1, [$r10+]
51533b61 MS	366	subq 1, $r13
	367	bne 1b
	368	nop
	369
	370	no_command_line:
	371
	372	;; The kernel stack contains a task structure for each task. This
	373	;; the initial kernel stack is in the same page as the init_task,
	374	;; but starts at the top of the page, i.e. + 8192 bytes.
	375	move.d init_thread_union + 8192, $sp
	376	move.d ebp_start, $r0 ; Defined in linker-script.
	377	move $r0, $ebp
	378	move.d etrax_irv, $r1 ; Set the exception base register and pointer.
	379	move.d $r0, [$r1]
	380
51533b61 MS	381	;; Clear the BSS region from _bss_start to _end.
	382	move.d __bss_start, $r0
	383	move.d _end, $r1
	384	1: clear.d [$r0+]
	385	cmp.d $r1, $r0
	386	blo 1b
	387	nop
51533b61 MS	388
	389	; Initialize registers to increase determinism
	390	move.d __bss_start, $r0
	391	movem [$r0], $r13
	392
96e47669 JN	393	#ifdef CONFIG_ETRAX_L2CACHE
	394	jsr l2cache_init
	395	nop
	396	#endif
	397
51533b61 MS	398	jump start_kernel ; Jump to start_kernel() in init/main.c.
	399	nop
	400
	401	.data
	402	etrax_irv:
	403	.dword 0
96e47669 JN	404
	405	; Variables for communication with the Axis flash map driver (axisflashmap),
	406	; and for setting up memory in arch/cris/kernel/setup.c .
	407
	408	; romfs_start is set to the start of the root file system, if it exists
	409	; in directly accessible memory (i.e. NOR Flash when booting from Flash,
	410	; or RAM when booting directly from a network-downloaded RAM image)
51533b61 MS	411	romfs_start:
51533b61 MS	412	.dword 0
96e47669 JN	413
	414	; romfs_length is set to the size of the root file system image, if it exists
	415	; in directly accessible memory (see romfs_start). Otherwise it is set to 0.
51533b61 MS	416	romfs_length:
51533b61 MS	417	.dword 0
96e47669 JN	418
	419	; romfs_in_flash is set to 1 if the root file system resides in directly
	420	; accessible flash memory (i.e. NOR flash). It is set to 0 for RAM boot
	421	; or NAND flash boot.
51533b61 MS	422	romfs_in_flash:
51533b61 MS	423	.dword 0
96e47669 JN	424
	425	; nand_boot is set to 1 when the kernel has been booted from NAND flash
	426	nand_boot:
51533b61 MS	427	.dword 0
	428
	429	swapper_pg_dir = 0xc0002000
	430
	431	.section ".init.data", "aw"
	432
c5ec6fb0 JN	433	#if defined CONFIG_ETRAXFS
	434	#include "../mach-fs/hw_settings.S"
	435	#elif defined CONFIG_CRIS_MACH_ARTPEC3
	436	#include "../mach-a3/hw_settings.S"
	437	#else
	438	#error Only ETRAXFS and ARTPEC-3 supported!
	439	#endif