Commit | Line | Data |
---|---|---|
51533b61 MS |
1 | #include <linux/pci.h> |
2 | #include <linux/kernel.h> | |
3 | #include <asm/arch/hwregs/intr_vect.h> | |
4 | ||
5 | void __devinit pcibios_fixup_bus(struct pci_bus *b) | |
6 | { | |
7 | } | |
8 | ||
9 | char * __devinit pcibios_setup(char *str) | |
10 | { | |
11 | return NULL; | |
12 | } | |
13 | ||
14 | void pcibios_set_master(struct pci_dev *dev) | |
15 | { | |
16 | u8 lat; | |
17 | pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); | |
18 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); | |
19 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); | |
20 | } | |
21 | ||
22 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
23 | enum pci_mmap_state mmap_state, int write_combine) | |
24 | { | |
25 | unsigned long prot; | |
26 | ||
27 | /* Leave vm_pgoff as-is, the PCI space address is the physical | |
28 | * address on this platform. | |
29 | */ | |
51533b61 MS |
30 | prot = pgprot_val(vma->vm_page_prot); |
31 | vma->vm_page_prot = __pgprot(prot); | |
32 | ||
33 | /* Write-combine setting is ignored, it is changed via the mtrr | |
34 | * interfaces on this platform. | |
35 | */ | |
36 | if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, | |
37 | vma->vm_end - vma->vm_start, | |
38 | vma->vm_page_prot)) | |
39 | return -EAGAIN; | |
40 | ||
41 | return 0; | |
42 | } | |
43 | ||
44 | void | |
45 | pcibios_align_resource(void *data, struct resource *res, | |
e31dd6e4 | 46 | resource_size_t size, resource_size_t align) |
51533b61 MS |
47 | { |
48 | if (res->flags & IORESOURCE_IO) { | |
e31dd6e4 | 49 | resource_size_t start = res->start; |
51533b61 MS |
50 | |
51 | if (start & 0x300) { | |
52 | start = (start + 0x3ff) & ~0x3ff; | |
53 | res->start = start; | |
54 | } | |
55 | } | |
56 | } | |
57 | ||
58 | int pcibios_enable_resources(struct pci_dev *dev, int mask) | |
59 | { | |
60 | u16 cmd, old_cmd; | |
61 | int idx; | |
62 | struct resource *r; | |
63 | ||
64 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | |
65 | old_cmd = cmd; | |
66 | for(idx=0; idx<6; idx++) { | |
67 | /* Only set up the requested stuff */ | |
68 | if (!(mask & (1<<idx))) | |
69 | continue; | |
70 | ||
71 | r = &dev->resource[idx]; | |
72 | if (!r->start && r->end) { | |
73 | printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); | |
74 | return -EINVAL; | |
75 | } | |
76 | if (r->flags & IORESOURCE_IO) | |
77 | cmd |= PCI_COMMAND_IO; | |
78 | if (r->flags & IORESOURCE_MEM) | |
79 | cmd |= PCI_COMMAND_MEMORY; | |
80 | } | |
81 | if (dev->resource[PCI_ROM_RESOURCE].start) | |
82 | cmd |= PCI_COMMAND_MEMORY; | |
83 | if (cmd != old_cmd) { | |
84 | printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); | |
85 | pci_write_config_word(dev, PCI_COMMAND, cmd); | |
86 | } | |
87 | return 0; | |
88 | } | |
89 | ||
90 | int pcibios_enable_irq(struct pci_dev *dev) | |
91 | { | |
92 | dev->irq = EXT_INTR_VECT; | |
93 | return 0; | |
94 | } | |
95 | ||
96 | int pcibios_enable_device(struct pci_dev *dev, int mask) | |
97 | { | |
98 | int err; | |
99 | ||
100 | if ((err = pcibios_enable_resources(dev, mask)) < 0) | |
101 | return err; | |
102 | ||
bba6f6fc EB |
103 | if (!dev->msi_enabled) |
104 | pcibios_enable_irq(dev); | |
105 | return 0; | |
51533b61 MS |
106 | } |
107 | ||
108 | int pcibios_assign_resources(void) | |
109 | { | |
110 | struct pci_dev *dev = NULL; | |
111 | int idx; | |
112 | struct resource *r; | |
113 | ||
114 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | |
115 | int class = dev->class >> 8; | |
116 | ||
117 | /* Don't touch classless devices and host bridges */ | |
118 | if (!class || class == PCI_CLASS_BRIDGE_HOST) | |
119 | continue; | |
120 | ||
121 | for(idx=0; idx<6; idx++) { | |
122 | r = &dev->resource[idx]; | |
123 | ||
124 | if (!r->start && r->end) | |
125 | pci_assign_resource(dev, idx); | |
126 | } | |
127 | } | |
128 | return 0; | |
129 | } | |
130 | ||
131 | EXPORT_SYMBOL(pcibios_assign_resources); |