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License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[linux-block.git] / arch / cris / arch-v10 / kernel / head.S
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
5f526d14 2/*
1da177e4
LT		 3 * Head of the kernel - alter with care
4 *
e7672be5 5 * Copyright (C) 2000, 2001, 2010 Axis Communications AB
1da177e4 6 *
1da177e4 7 */
e7672be5 8
f9f3f864
GR		 9#include <linux/init.h>
10
1da177e4
LT		 11#define ASSEMBLER_MACROS_ONLY
12/* The IO_* macros use the ## token concatenation operator, so
13 -traditional must not be used when assembling this file. */
556dcee7 14#include <arch/sv_addr_ag.h>
1da177e4
LT		 15
16#define CRAMFS_MAGIC 0x28cd3d45
17#define RAM_INIT_MAGIC 0x56902387
63245d2c 18#define COMMAND_LINE_MAGIC 0x87109563
1da177e4
LT		 19
20#define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
21 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
e7672be5 22
1da177e4 23 ;; exported symbols
e7672be5 24
1da177e4
LT		 25 .globl etrax_irv
26 .globl romfs_start
27 .globl romfs_length
28 .globl romfs_in_flash
29 .globl swapper_pg_dir
e7672be5 30
f9f3f864 31 __HEAD
1da177e4
LT		 32
33 ;; This is the entry point of the kernel. We are in supervisor mode.
34 ;; 0x00000000 if Flash, 0x40004000 if DRAM
35 ;; since etrax actually starts at address 2 when booting from flash, we
36 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
37 ;;
38 ;; NOTICE! The registers r8 and r9 are used as parameters carrying
e7672be5 39 ;; information from the decompressor (if the kernel was compressed).
1da177e4 40 ;; They should not be used in the code below until read.
e7672be5
JN		 41
42 nop
1da177e4
LT		 43 di
44
45 ;; First setup the kseg_c mapping from where the kernel is linked
46 ;; to 0x40000000 (where the actual DRAM resides) otherwise
47 ;; we cannot do very much! See arch/cris/README.mm
48 ;;
49 ;; Notice that since we're potentially running at 0x00 or 0x40 right now,
50 ;; we will get a fault as soon as we enable the MMU if we dont
51 ;; temporarily map those segments linearily.
52 ;;
53 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
54 ;; slightly different. The bug is that you can't remap bit 31 of
55 ;; an address. Though we can check the version register for
56 ;; whether the bug is present, some constants would then have to
57 ;; be variables, so we don't. The drawback is that you can "only" map
58 ;; 1G per process with CONFIG_CRIS_LOW_MAP.
59
60#ifdef CONFIG_CRIS_LOW_MAP
61 ; kseg mappings, temporary map of 0xc0->0x40
e7672be5 62 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
1da177e4
LT		 63 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
64 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
65 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
66 move.d $r0, [R_MMU_KBASE_HI]
67
e7672be5
JN		 68 ; temporary map of 0x40->0x40 and 0x60->0x40
69 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
1da177e4
LT		 70 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
71 move.d $r0, [R_MMU_KBASE_LO]
72
73 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
e7672be5 74 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
1da177e4
LT		 75 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
76 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
77 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
78 | IO_STATE (R_MMU_CONFIG, seg_f, page) \
79 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
80 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
81 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
82 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
83 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \
84 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
85 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
86 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
87 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \
88 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \
89 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
90 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
91 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
92 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
93 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
94 move.d $r0, [R_MMU_CONFIG]
95#else
96 ; kseg mappings
e7672be5 97 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
1da177e4
LT		 98 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
99 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
100 move.d $r0, [R_MMU_KBASE_HI]
101
e7672be5 102 ; temporary map of 0x40->0x40 and 0x00->0x00
1da177e4
LT		 103 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
104 move.d $r0, [R_MMU_KBASE_LO]
105
106 ; mmu enable, segs f,e,c,b,4,0 segment mapped
e7672be5 107 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
1da177e4
LT		 108 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
109 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
110 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
111 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \
112 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
113 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
114 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
115 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
116 | IO_STATE (R_MMU_CONFIG, seg_a, page) \
117 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
118 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
119 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
120 | IO_STATE (R_MMU_CONFIG, seg_6, page) \
121 | IO_STATE (R_MMU_CONFIG, seg_5, page) \
122 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
123 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
124 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
125 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
126 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
127 move.d $r0, [R_MMU_CONFIG]
128#endif
129
130 ;; Now we need to sort out the segments and their locations in RAM or
131 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
132 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
133 ;; But the linker has linked the kernel to expect this layout in
134 ;; DRAM memory:
135 ;; 1) kernel text, 2) kernel data, 3) kernel BSS
136 ;; (the location of the ROM filesystem is determined by the krom driver)
137 ;; If we boot this from Flash, we want to keep the ROM filesystem in
138 ;; the flash, we want to copy the text and need to copy the data to DRAM.
139 ;; But if we boot from DRAM, we need to move the ROMFS image
140 ;; from its position after kernel data, to after kernel BSS, BEFORE the
141 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
142 ;;
143 ;; In both cases, we start in un-cached mode, and need to jump into a
144 ;; cached PC after we're done fiddling around with the segments.
e7672be5 145 ;;
1da177e4
LT		 146 ;; arch/etrax100/etrax100.ld sets some symbols that define the start
147 ;; and end of each segment.
148
149 ;; Check if we start from DRAM or FLASH by testing PC
e7672be5 150
1da177e4
LT		 151 move.d $pc,$r0
152 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
153 cmp.d 0x10000,$r0 ; arbitrary... just something above this code
154 blo _inflash0
155 nop
156
157 jump _inram ; enter cached ram
158
159 ;; Jumpgate for branches.
160_inflash0:
161 jump _inflash
162
163 ;; Put this in a suitable section where we can reclaim storage
164 ;; after init.
f9f3f864 165 __INIT
1da177e4 166_inflash:
e7672be5 167#ifdef CONFIG_ETRAX_ETHERNET
1da177e4
LT		 168 ;; Start MII clock to make sure it is running when tranceiver is reset
169 move.d START_ETHERNET_CLOCK, $r0
170 move.d $r0, [R_NETWORK_GEN_CONFIG]
171#endif
172
173 ;; Set up waitstates etc according to kernel configuration.
1da177e4
LT		 174 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
175 move.d $r0, [R_WAITSTATES]
176
177 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
178 move.d $r0, [R_BUS_CONFIG]
1da177e4
LT		 179
180 ;; We need to initialze DRAM registers before we start using the DRAM
181
182 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
183 beq _dram_init_finished
184 nop
e7672be5 185
1da177e4
LT		 186#include "../lib/dram_init.S"
187
e7672be5 188_dram_init_finished:
1da177e4
LT		 189 ;; Copy text+data to DRAM
190 ;; This is fragile - the calculation of r4 as the image size depends
191 ;; on that the labels below actually are the first and last positions
192 ;; in the linker-script.
193 ;;
194 ;; Then the locating of the cramfs image depends on the aforementioned
195 ;; image being located in the flash at 0. This is most often not true,
196 ;; thus the following does not work (normally there is a rescue-block
197 ;; between the physical start of the flash and the flash-image start,
198 ;; and when run with compression, the kernel is actually unpacked to
199 ;; DRAM and we never get here in the first place :))
e7672be5 200
1da177e4
LT		 201 moveq 0, $r0 ; source
202 move.d text_start, $r1 ; destination
203 move.d __vmlinux_end, $r2 ; end destination
204 move.d $r2, $r4
205 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below
2061: move.w [$r0+], $r3
207 move.w $r3, [$r1+]
208 cmp.d $r2, $r1
209 blo 1b
210 nop
211
212 ;; We keep the cramfs in the flash.
213 ;; There might be none, but that does not matter because
214 ;; we don't do anything than read some bytes here.
215
216 moveq 0, $r0
217 move.d $r0, [romfs_length] ; default if there is no cramfs
218
219 move.d [$r4], $r0 ; cramfs_super.magic
220 cmp.d CRAMFS_MAGIC, $r0
221 bne 1f
222 nop
223 move.d [$r4 + 4], $r0 ; cramfs_super.size
224 move.d $r0, [romfs_length]
225#ifdef CONFIG_CRIS_LOW_MAP
226 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached)
227#else
228 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
229#endif
230 move.d $r4, [romfs_start]
e7672be5 2311:
1da177e4
LT		 232 moveq 1, $r0
233 move.d $r0, [romfs_in_flash]
e7672be5 234
1da177e4
LT		 235 jump _start_it ; enter code, cached this time
236
237_inram:
238 ;; Move the ROM fs to after BSS end. This assumes that the cramfs
239 ;; second longword contains the length of the cramfs
240
241 moveq 0, $r0
242 move.d $r0, [romfs_length] ; default if there is no cramfs
e7672be5 243
1da177e4
LT		 244 ;; The kernel could have been unpacked to DRAM by the loader, but
245 ;; the cramfs image could still be in the Flash directly after the
246 ;; compressed kernel image. The loader passes the address of the
247 ;; byte succeeding the last compressed byte in the flash in the
248 ;; register r9 when starting the kernel. Check if r9 points to a
249 ;; decent cramfs image!
250 ;; (Notice that if this is not booted from the loader, r9 will be
251 ;; garbage but we do sanity checks on it, the chance that it points
252 ;; to a cramfs magic is small.. )
e7672be5 253
1da177e4
LT		 254 cmp.d 0x0ffffff8, $r9
255 bhs _no_romfs_in_flash ; r9 points outside the flash area
256 nop
257 move.d [$r9], $r0 ; cramfs_super.magic
258 cmp.d CRAMFS_MAGIC, $r0
259 bne _no_romfs_in_flash
260 nop
261 move.d [$r9+4], $r0 ; cramfs_super.length
262 move.d $r0, [romfs_length]
263#ifdef CONFIG_CRIS_LOW_MAP
264 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached)
265#else
266 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached)
267#endif
268 move.d $r9, [romfs_start]
269
270 moveq 1, $r0
271 move.d $r0, [romfs_in_flash]
272
273 jump _start_it ; enter code, cached this time
274
275_no_romfs_in_flash:
e7672be5 276
1da177e4
LT		 277 ;; Check if there is a cramfs (magic value).
278 ;; Notice that we check for cramfs magic value - which is
279 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
280 ;; not need this mechanism anyway)
281
b4973ae9 282 move.d __init_end, $r0; the image will be after the end of init
1da177e4
LT		 283 move.d [$r0], $r1 ; cramfs assumes same endian on host/target
284 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
285 bne 2f
286 nop
287
e7672be5
JN		 288 ;; Ok. What is its size ?
289
1da177e4
LT		 290 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
291
292 ;; We want to copy it to the end of the BSS
293
294 move.d _end, $r1
295
296 ;; Remember values so cramfs and setup can find this info
297
298 move.d $r1, [romfs_start] ; new romfs location
299 move.d $r2, [romfs_length]
300
301 ;; We need to copy it backwards, since they can be overlapping
302
303 add.d $r2, $r0
304 add.d $r2, $r1
e7672be5 305
1da177e4
LT		 306 ;; Go ahead. Make my loop.
307
308 lsrq 1, $r2 ; size is in bytes, we copy words
309
3101: move.w [$r0=$r0-2],$r3
311 move.w $r3,[$r1=$r1-2]
312 subq 1, $r2
313 bne 1b
314 nop
315
e7672be5 3162:
1da177e4
LT		 317 ;; Dont worry that the BSS is tainted. It will be cleared later.
318
319 moveq 0, $r0
320 move.d $r0, [romfs_in_flash]
321
322 jump _start_it ; better skip the additional cramfs check below
e7672be5 323
1da177e4
LT		 324_start_it:
325
63245d2c
MS		 326 ;; Check if kernel command line is supplied
327 cmp.d COMMAND_LINE_MAGIC, $r10
328 bne no_command_line
329 nop
330
331 move.d 256, $r13
332 move.d cris_command_line, $r10
333 or.d 0x80000000, $r11 ; Make it virtual
3341:
335 move.b [$r11+], $r12
336 move.b $r12, [$r10+]
337 subq 1, $r13
338 bne 1b
339 nop
340
341no_command_line:
342
1da177e4
LT		 343 ;; the kernel stack is overlayed with the task structure for each
344 ;; task. thus the initial kernel stack is in the same page as the
345 ;; init_task (but starts in the top of the page, size 8192)
346 move.d init_thread_union + 8192, $sp
347 move.d ibr_start,$r0 ; this symbol is set by the linker script
348 move $r0,$ibr
349 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
e7672be5 350
1da177e4
LT		 351 ;; Clear BSS region, from _bss_start to _end
352
353 move.d __bss_start, $r0
354 move.d _end, $r1
3551: clear.d [$r0+]
356 cmp.d $r1, $r0
357 blo 1b
358 nop
e7672be5 359
1da177e4
LT		 360 ;; Etrax product HW genconfig setup
361
362 moveq 0,$r0
63245d2c 363
5f526d14
JN		 364 ;; Select or disable serial port 2
365#ifdef CONFIG_ETRAX_SERIAL_PORT2
366 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
367#else
368 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
369#endif
370
63245d2c
MS		 371 ;; Init interfaces (disable them).
372 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
373 | IO_STATE (R_GEN_CONFIG, ata, disable) \
374 | IO_STATE (R_GEN_CONFIG, par0, disable) \
63245d2c
MS		 375 | IO_STATE (R_GEN_CONFIG, mio, disable) \
376 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
377 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
378 | IO_STATE (R_GEN_CONFIG, par1, disable) \
379 | IO_STATE (R_GEN_CONFIG, ser3, disable) \
380 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
381 | IO_STATE (R_GEN_CONFIG, usb1, disable) \
382 | IO_STATE (R_GEN_CONFIG, usb2, disable) \
383 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
384
385 ;; Init DMA channel muxing (set to unused clients).
386 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
387 | IO_STATE (R_GEN_CONFIG, dma3, ata) \
388 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
389 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
390 | IO_STATE (R_GEN_CONFIG, dma6, unused) \
391 | IO_STATE (R_GEN_CONFIG, dma7, unused) \
392 | IO_STATE (R_GEN_CONFIG, dma8, usb) \
393 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
394
1da177e4 395
1da177e4
LT		 396 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
397
1da177e4
LT		 398 move.d $r0,[R_GEN_CONFIG]
399
400#if 0
401 moveq 4,$r0
402 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
403 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
4041: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
405 and.b 7,$r0
406 cmp.b 4,$r0
407 beq 1b
408 nop
4091: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
410 and.b 7,$r0
411 cmp.b 4,$r0
412 beq 1b
413 nop
414#endif
e7672be5 415
1da177e4
LT		 416 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
417 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
418 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
4191: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
420 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
421 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
422 beq 1b
423 nop
4241: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
425 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
426 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
427 beq 1b
428 nop
429
430 ;; setup port PA and PB default initial directions and data
431 ;; including their shadow registers
e7672be5 432
1da177e4 433 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
1da177e4
LT		 434 move.b $r0,[port_pa_dir_shadow]
435 move.b $r0,[R_PORT_PA_DIR]
436 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
1da177e4
LT		 437 move.b $r0,[port_pa_data_shadow]
438 move.b $r0,[R_PORT_PA_DATA]
e7672be5 439
1da177e4
LT		 440 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
441 move.b $r0,[port_pb_config_shadow]
442 move.b $r0,[R_PORT_PB_CONFIG]
443 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
1da177e4
LT		 444 move.b $r0,[port_pb_dir_shadow]
445 move.b $r0,[R_PORT_PB_DIR]
446 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
1da177e4
LT		 447 move.b $r0,[port_pb_data_shadow]
448 move.b $r0,[R_PORT_PB_DATA]
449
450 moveq 0, $r0
451 move.d $r0,[port_pb_i2c_shadow]
452 move.d $r0, [R_PORT_PB_I2C]
453
454 moveq 0,$r0
1da177e4
LT		 455 move.d $r0,[port_g_data_shadow]
456 move.d $r0,[R_PORT_G_DATA]
e7672be5 457
1da177e4 458 ;; setup the serial port 0 at 115200 baud for debug purposes
e7672be5 459
1da177e4
LT		 460 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
461 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
462 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
e7672be5 463 move.d $r0,[R_SERIAL0_XOFF]
1da177e4
LT		 464
465 ; 115.2kbaud for both transmit and receive
466 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
467 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
468 move.b $r0,[R_SERIAL0_BAUD]
469
470 ; Set up and enable the serial0 receiver.
471 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
472 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
473 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
474 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
475 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
476 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
477 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
478 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
e7672be5
JN		 479 move.b $r0,[R_SERIAL0_REC_CTRL]
480
1da177e4
LT		 481 ; Set up and enable the serial0 transmitter.
482 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
483 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
484 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
485 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
486 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
487 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
488 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
489 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
490 move.b $r0,[R_SERIAL0_TR_CTRL]
491
492 ;; setup the serial port 1 at 115200 baud for debug purposes
e7672be5 493
1da177e4
LT		 494 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
495 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
496 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
e7672be5 497 move.d $r0,[R_SERIAL1_XOFF]
1da177e4
LT		 498
499 ; 115.2kbaud for both transmit and receive
500 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
501 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
502 move.b $r0,[R_SERIAL1_BAUD]
503
504 ; Set up and enable the serial1 receiver.
505 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
506 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
507 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
508 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
509 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
510 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
511 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
512 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
e7672be5
JN		 513 move.b $r0,[R_SERIAL1_REC_CTRL]
514
1da177e4
LT		 515 ; Set up and enable the serial1 transmitter.
516 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
517 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
518 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
519 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
520 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
521 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
522 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
523 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
524 move.b $r0,[R_SERIAL1_TR_CTRL]
525
5f526d14
JN		 526#ifdef CONFIG_ETRAX_SERIAL_PORT2
527 ;; setup the serial port 2 at 115200 baud for debug purposes
528
529 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
530 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
531 | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
532 move.d $r0,[R_SERIAL2_XOFF]
533
534 ; 115.2kbaud for both transmit and receive
535 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
536 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
537 move.b $r0,[R_SERIAL2_BAUD]
538
539 ; Set up and enable the serial2 receiver.
540 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
541 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
542 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
543 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
544 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
545 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
546 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
547 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
548 move.b $r0,[R_SERIAL2_REC_CTRL]
549
550 ; Set up and enable the serial2 transmitter.
551 move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
552 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
553 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
554 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
555 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
556 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
557 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
558 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
559 move.b $r0,[R_SERIAL2_TR_CTRL]
560#endif
e7672be5
JN		 561
562#ifdef CONFIG_ETRAX_SERIAL_PORT3
1da177e4 563 ;; setup the serial port 3 at 115200 baud for debug purposes
e7672be5 564
1da177e4
LT		 565 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
566 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
567 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
e7672be5 568 move.d $r0,[R_SERIAL3_XOFF]
1da177e4
LT		 569
570 ; 115.2kbaud for both transmit and receive
571 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
572 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
573 move.b $r0,[R_SERIAL3_BAUD]
574
575 ; Set up and enable the serial3 receiver.
576 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
577 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
578 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
579 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
580 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
581 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
582 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
583 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
e7672be5
JN		 584 move.b $r0,[R_SERIAL3_REC_CTRL]
585
1da177e4
LT		 586 ; Set up and enable the serial3 transmitter.
587 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
588 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
589 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
590 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
591 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
592 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
593 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
594 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
595 move.b $r0,[R_SERIAL3_TR_CTRL]
596#endif
e7672be5 597
1da177e4 598 jump start_kernel ; jump into the C-function start_kernel in init/main.c
e7672be5 599
1da177e4 600 .data
e7672be5 601etrax_irv:
1da177e4
LT		 602 .dword 0
603romfs_start:
604 .dword 0
605romfs_length:
606 .dword 0
607romfs_in_flash:
608 .dword 0
e7672be5 609
1da177e4
LT		 610 ;; put some special pages at the beginning of the kernel aligned
611 ;; to page boundaries - the kernel cannot start until after this
612
613#ifdef CONFIG_CRIS_LOW_MAP
614swapper_pg_dir = 0x60002000
e7672be5 615#else
1da177e4
LT		 616swapper_pg_dir = 0xc0002000
617#endif
618
619 .section ".init.data", "aw"
620#include "../lib/hw_settings.S"
Linux 6.x block layer and io_uring tree(s)