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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
fc68911e | 32 | #include <linux/kernel.h> |
1394f032 BW |
33 | #include <linux/platform_device.h> |
34 | #include <linux/mtd/mtd.h> | |
fc68911e | 35 | #include <linux/mtd/nand.h> |
1394f032 | 36 | #include <linux/mtd/partitions.h> |
fc68911e | 37 | #include <linux/mtd/plat-ram.h> |
de8c43f2 | 38 | #include <linux/mtd/physmap.h> |
1394f032 BW |
39 | #include <linux/spi/spi.h> |
40 | #include <linux/spi/flash.h> | |
41 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 42 | #include <linux/usb/isp1362.h> |
1394f032 | 43 | #endif |
0a87e3e9 | 44 | #include <linux/ata_platform.h> |
1394f032 BW |
45 | #include <linux/irq.h> |
46 | #include <linux/interrupt.h> | |
81d9c7f2 | 47 | #include <linux/i2c.h> |
27f5d75a | 48 | #include <linux/usb/sl811.h> |
c6c4d7bb | 49 | #include <asm/dma.h> |
1f83b8f1 | 50 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 51 | #include <asm/reboot.h> |
5d448dd5 | 52 | #include <asm/portmux.h> |
14b03204 | 53 | #include <asm/dpmc.h> |
1394f032 BW |
54 | |
55 | /* | |
56 | * Name the Board for the /proc/cpuinfo | |
57 | */ | |
066954a3 | 58 | const char bfin_board_name[] = "ADDS-BF537-STAMP"; |
1394f032 BW |
59 | |
60 | /* | |
61 | * Driver needs to know address, irq and flag pin. | |
62 | */ | |
63 | ||
64 | #define ISP1761_BASE 0x203C0000 | |
65 | #define ISP1761_IRQ IRQ_PF7 | |
66 | ||
67 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | |
68 | static struct resource bfin_isp1761_resources[] = { | |
69 | [0] = { | |
70 | .name = "isp1761-regs", | |
71 | .start = ISP1761_BASE + 0x00000000, | |
72 | .end = ISP1761_BASE + 0x000fffff, | |
73 | .flags = IORESOURCE_MEM, | |
74 | }, | |
75 | [1] = { | |
76 | .start = ISP1761_IRQ, | |
77 | .end = ISP1761_IRQ, | |
78 | .flags = IORESOURCE_IRQ, | |
79 | }, | |
80 | }; | |
81 | ||
82 | static struct platform_device bfin_isp1761_device = { | |
83 | .name = "isp1761", | |
84 | .id = 0, | |
85 | .num_resources = ARRAY_SIZE(bfin_isp1761_resources), | |
86 | .resource = bfin_isp1761_resources, | |
87 | }; | |
88 | ||
89 | static struct platform_device *bfin_isp1761_devices[] = { | |
90 | &bfin_isp1761_device, | |
91 | }; | |
92 | ||
93 | int __init bfin_isp1761_init(void) | |
94 | { | |
1f83b8f1 | 95 | unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices); |
1394f032 | 96 | |
b85d858b | 97 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
1394f032 BW |
98 | set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); |
99 | ||
100 | return platform_add_devices(bfin_isp1761_devices, num_devices); | |
101 | } | |
102 | ||
103 | void __exit bfin_isp1761_exit(void) | |
104 | { | |
105 | platform_device_unregister(&bfin_isp1761_device); | |
106 | } | |
107 | ||
108 | arch_initcall(bfin_isp1761_init); | |
109 | #endif | |
110 | ||
2463ef22 MH |
111 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
112 | #include <linux/input.h> | |
113 | #include <linux/gpio_keys.h> | |
114 | ||
115 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
116 | {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"}, | |
117 | {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"}, | |
118 | {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"}, | |
119 | {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"}, | |
120 | }; | |
121 | ||
122 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
123 | .buttons = bfin_gpio_keys_table, | |
124 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
125 | }; | |
126 | ||
127 | static struct platform_device bfin_device_gpiokeys = { | |
128 | .name = "gpio-keys", | |
129 | .dev = { | |
130 | .platform_data = &bfin_gpio_keys_data, | |
131 | }, | |
132 | }; | |
133 | #endif | |
134 | ||
cad2ab65 MF |
135 | static struct resource bfin_gpios_resources = { |
136 | .start = 0, | |
137 | .end = MAX_BLACKFIN_GPIOS - 1, | |
138 | .flags = IORESOURCE_IRQ, | |
139 | }; | |
140 | ||
141 | static struct platform_device bfin_gpios_device = { | |
142 | .name = "simple-gpio", | |
143 | .id = -1, | |
144 | .num_resources = 1, | |
145 | .resource = &bfin_gpios_resources, | |
146 | }; | |
147 | ||
1394f032 BW |
148 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
149 | static struct resource bfin_pcmcia_cf_resources[] = { | |
150 | { | |
151 | .start = 0x20310000, /* IO PORT */ | |
152 | .end = 0x20312000, | |
153 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 154 | }, { |
d2d50aa9 | 155 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
156 | .end = 0x20311FFF, |
157 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 158 | }, { |
1394f032 BW |
159 | .start = IRQ_PF4, |
160 | .end = IRQ_PF4, | |
161 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 162 | }, { |
1394f032 BW |
163 | .start = 6, /* Card Detect PF6 */ |
164 | .end = 6, | |
165 | .flags = IORESOURCE_IRQ, | |
166 | }, | |
167 | }; | |
168 | ||
169 | static struct platform_device bfin_pcmcia_cf_device = { | |
170 | .name = "bfin_cf_pcmcia", | |
171 | .id = -1, | |
172 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
173 | .resource = bfin_pcmcia_cf_resources, | |
174 | }; | |
175 | #endif | |
176 | ||
177 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
178 | static struct platform_device rtc_device = { | |
179 | .name = "rtc-bfin", | |
180 | .id = -1, | |
181 | }; | |
182 | #endif | |
183 | ||
184 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
185 | static struct resource smc91x_resources[] = { | |
186 | { | |
187 | .name = "smc91x-regs", | |
188 | .start = 0x20300300, | |
189 | .end = 0x20300300 + 16, | |
190 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 191 | }, { |
1394f032 BW |
192 | |
193 | .start = IRQ_PF7, | |
194 | .end = IRQ_PF7, | |
195 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
196 | }, | |
197 | }; | |
198 | static struct platform_device smc91x_device = { | |
199 | .name = "smc91x", | |
200 | .id = 0, | |
201 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
202 | .resource = smc91x_resources, | |
203 | }; | |
204 | #endif | |
205 | ||
f40d24d9 AL |
206 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
207 | static struct resource dm9000_resources[] = { | |
208 | [0] = { | |
209 | .start = 0x203FB800, | |
210 | .end = 0x203FB800 + 8, | |
211 | .flags = IORESOURCE_MEM, | |
212 | }, | |
213 | [1] = { | |
214 | .start = IRQ_PF9, | |
215 | .end = IRQ_PF9, | |
216 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
217 | }, | |
218 | }; | |
219 | ||
220 | static struct platform_device dm9000_device = { | |
221 | .name = "dm9000", | |
222 | .id = -1, | |
223 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
224 | .resource = dm9000_resources, | |
225 | }; | |
226 | #endif | |
227 | ||
561cc18b MH |
228 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
229 | static struct resource ax88180_resources[] = { | |
230 | [0] = { | |
231 | .start = 0x20300000, | |
232 | .end = 0x20300000 + 0x8000, | |
233 | .flags = IORESOURCE_MEM, | |
234 | }, | |
235 | [1] = { | |
236 | .start = IRQ_PF7, | |
237 | .end = IRQ_PF7, | |
238 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL), | |
239 | }, | |
240 | }; | |
241 | ||
242 | static struct platform_device ax88180_device = { | |
243 | .name = "ax88180", | |
244 | .id = -1, | |
245 | .num_resources = ARRAY_SIZE(ax88180_resources), | |
246 | .resource = ax88180_resources, | |
247 | }; | |
248 | #endif | |
249 | ||
1394f032 BW |
250 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
251 | static struct resource sl811_hcd_resources[] = { | |
252 | { | |
253 | .start = 0x20340000, | |
254 | .end = 0x20340000, | |
255 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 256 | }, { |
1394f032 BW |
257 | .start = 0x20340004, |
258 | .end = 0x20340004, | |
259 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 260 | }, { |
1394f032 BW |
261 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
262 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
263 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
264 | }, | |
265 | }; | |
266 | ||
267 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
268 | void sl811_port_power(struct device *dev, int is_on) | |
269 | { | |
c6c4d7bb | 270 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
acbcd263 | 271 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); |
1394f032 BW |
272 | } |
273 | #endif | |
274 | ||
275 | static struct sl811_platform_data sl811_priv = { | |
276 | .potpg = 10, | |
277 | .power = 250, /* == 500mA */ | |
278 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
279 | .port_power = &sl811_port_power, | |
280 | #endif | |
281 | }; | |
282 | ||
283 | static struct platform_device sl811_hcd_device = { | |
284 | .name = "sl811-hcd", | |
285 | .id = 0, | |
286 | .dev = { | |
287 | .platform_data = &sl811_priv, | |
288 | }, | |
289 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
290 | .resource = sl811_hcd_resources, | |
291 | }; | |
292 | #endif | |
293 | ||
294 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
295 | static struct resource isp1362_hcd_resources[] = { | |
296 | { | |
297 | .start = 0x20360000, | |
298 | .end = 0x20360000, | |
299 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 300 | }, { |
1394f032 BW |
301 | .start = 0x20360004, |
302 | .end = 0x20360004, | |
303 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 304 | }, { |
1394f032 BW |
305 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
306 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
307 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
308 | }, | |
309 | }; | |
310 | ||
311 | static struct isp1362_platform_data isp1362_priv = { | |
312 | .sel15Kres = 1, | |
313 | .clknotstop = 0, | |
314 | .oc_enable = 0, | |
315 | .int_act_high = 0, | |
316 | .int_edge_triggered = 0, | |
317 | .remote_wakeup_connected = 0, | |
318 | .no_power_switching = 1, | |
319 | .power_switching_mode = 0, | |
320 | }; | |
321 | ||
322 | static struct platform_device isp1362_hcd_device = { | |
323 | .name = "isp1362-hcd", | |
324 | .id = 0, | |
325 | .dev = { | |
326 | .platform_data = &isp1362_priv, | |
327 | }, | |
328 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
329 | .resource = isp1362_hcd_resources, | |
330 | }; | |
331 | #endif | |
332 | ||
333 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
334 | static struct platform_device bfin_mac_device = { | |
335 | .name = "bfin_mac", | |
336 | }; | |
337 | #endif | |
338 | ||
339 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
340 | static struct resource net2272_bfin_resources[] = { | |
341 | { | |
342 | .start = 0x20300000, | |
343 | .end = 0x20300000 + 0x100, | |
344 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 345 | }, { |
1394f032 BW |
346 | .start = IRQ_PF7, |
347 | .end = IRQ_PF7, | |
348 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
349 | }, | |
350 | }; | |
351 | ||
352 | static struct platform_device net2272_bfin_device = { | |
353 | .name = "net2272", | |
354 | .id = -1, | |
355 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
356 | .resource = net2272_bfin_resources, | |
357 | }; | |
358 | #endif | |
359 | ||
fc68911e MF |
360 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
361 | #ifdef CONFIG_MTD_PARTITIONS | |
362 | const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; | |
363 | ||
364 | static struct mtd_partition bfin_plat_nand_partitions[] = { | |
365 | { | |
aa582977 | 366 | .name = "linux kernel(nand)", |
fc68911e MF |
367 | .size = 0x400000, |
368 | .offset = 0, | |
369 | }, { | |
aa582977 | 370 | .name = "file system(nand)", |
fc68911e MF |
371 | .size = MTDPART_SIZ_FULL, |
372 | .offset = MTDPART_OFS_APPEND, | |
373 | }, | |
374 | }; | |
375 | #endif | |
376 | ||
377 | #define BFIN_NAND_PLAT_CLE 2 | |
378 | #define BFIN_NAND_PLAT_ALE 1 | |
379 | static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | |
380 | { | |
381 | struct nand_chip *this = mtd->priv; | |
382 | ||
383 | if (cmd == NAND_CMD_NONE) | |
384 | return; | |
385 | ||
386 | if (ctrl & NAND_CLE) | |
387 | writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE)); | |
388 | else | |
389 | writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE)); | |
390 | } | |
391 | ||
392 | #define BFIN_NAND_PLAT_READY GPIO_PF3 | |
393 | static int bfin_plat_nand_dev_ready(struct mtd_info *mtd) | |
394 | { | |
395 | return gpio_get_value(BFIN_NAND_PLAT_READY); | |
396 | } | |
397 | ||
398 | static struct platform_nand_data bfin_plat_nand_data = { | |
399 | .chip = { | |
400 | .chip_delay = 30, | |
401 | #ifdef CONFIG_MTD_PARTITIONS | |
402 | .part_probe_types = part_probes, | |
403 | .partitions = bfin_plat_nand_partitions, | |
404 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), | |
405 | #endif | |
406 | }, | |
407 | .ctrl = { | |
408 | .cmd_ctrl = bfin_plat_nand_cmd_ctrl, | |
409 | .dev_ready = bfin_plat_nand_dev_ready, | |
410 | }, | |
411 | }; | |
412 | ||
413 | #define MAX(x, y) (x > y ? x : y) | |
414 | static struct resource bfin_plat_nand_resources = { | |
415 | .start = 0x20212000, | |
416 | .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)), | |
417 | .flags = IORESOURCE_IO, | |
418 | }; | |
419 | ||
420 | static struct platform_device bfin_async_nand_device = { | |
421 | .name = "gen_nand", | |
422 | .id = -1, | |
423 | .num_resources = 1, | |
424 | .resource = &bfin_plat_nand_resources, | |
425 | .dev = { | |
426 | .platform_data = &bfin_plat_nand_data, | |
427 | }, | |
428 | }; | |
429 | ||
430 | static void bfin_plat_nand_init(void) | |
431 | { | |
432 | gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat"); | |
433 | } | |
434 | #else | |
435 | static void bfin_plat_nand_init(void) {} | |
436 | #endif | |
437 | ||
793dc27b | 438 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
de8c43f2 MF |
439 | static struct mtd_partition stamp_partitions[] = { |
440 | { | |
aa582977 | 441 | .name = "bootloader(nor)", |
edf05641 | 442 | .size = 0x40000, |
de8c43f2 MF |
443 | .offset = 0, |
444 | }, { | |
aa582977 | 445 | .name = "linux kernel(nor)", |
de8c43f2 MF |
446 | .size = 0xE0000, |
447 | .offset = MTDPART_OFS_APPEND, | |
448 | }, { | |
aa582977 | 449 | .name = "file system(nor)", |
edf05641 | 450 | .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000, |
de8c43f2 MF |
451 | .offset = MTDPART_OFS_APPEND, |
452 | }, { | |
aa582977 | 453 | .name = "MAC Address(nor)", |
de8c43f2 MF |
454 | .size = MTDPART_SIZ_FULL, |
455 | .offset = 0x3F0000, | |
456 | .mask_flags = MTD_WRITEABLE, | |
457 | } | |
458 | }; | |
459 | ||
460 | static struct physmap_flash_data stamp_flash_data = { | |
461 | .width = 2, | |
462 | .parts = stamp_partitions, | |
463 | .nr_parts = ARRAY_SIZE(stamp_partitions), | |
464 | }; | |
465 | ||
466 | static struct resource stamp_flash_resource = { | |
467 | .start = 0x20000000, | |
468 | .end = 0x203fffff, | |
469 | .flags = IORESOURCE_MEM, | |
470 | }; | |
471 | ||
472 | static struct platform_device stamp_flash_device = { | |
473 | .name = "physmap-flash", | |
474 | .id = 0, | |
475 | .dev = { | |
476 | .platform_data = &stamp_flash_data, | |
477 | }, | |
478 | .num_resources = 1, | |
479 | .resource = &stamp_flash_resource, | |
480 | }; | |
793dc27b | 481 | #endif |
de8c43f2 | 482 | |
1394f032 BW |
483 | #if defined(CONFIG_MTD_M25P80) \ |
484 | || defined(CONFIG_MTD_M25P80_MODULE) | |
485 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
486 | { | |
aa582977 | 487 | .name = "bootloader(spi)", |
edf05641 | 488 | .size = 0x00040000, |
1394f032 BW |
489 | .offset = 0, |
490 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 491 | }, { |
aa582977 | 492 | .name = "linux kernel(spi)", |
1394f032 | 493 | .size = 0xe0000, |
edf05641 | 494 | .offset = MTDPART_OFS_APPEND, |
1f83b8f1 | 495 | }, { |
aa582977 | 496 | .name = "file system(spi)", |
edf05641 MF |
497 | .size = MTDPART_SIZ_FULL, |
498 | .offset = MTDPART_OFS_APPEND, | |
1394f032 BW |
499 | } |
500 | }; | |
501 | ||
502 | static struct flash_platform_data bfin_spi_flash_data = { | |
503 | .name = "m25p80", | |
504 | .parts = bfin_spi_flash_partitions, | |
505 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
506 | .type = "m25p64", | |
507 | }; | |
508 | ||
509 | /* SPI flash chip (m25p64) */ | |
510 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
511 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
512 | .bits_per_word = 8, | |
513 | }; | |
514 | #endif | |
515 | ||
516 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
517 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
518 | /* SPI ADC chip */ | |
519 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
520 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
521 | .bits_per_word = 16, | |
522 | }; | |
523 | #endif | |
524 | ||
525 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
526 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
527 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
528 | .enable_dma = 0, | |
529 | .bits_per_word = 16, | |
530 | }; | |
531 | #endif | |
532 | ||
533 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
534 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
535 | .enable_dma = 0, | |
536 | .bits_per_word = 16, | |
537 | }; | |
538 | #endif | |
539 | ||
540 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
541 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
542 | .enable_dma = 1, | |
543 | .bits_per_word = 8, | |
544 | }; | |
545 | #endif | |
546 | ||
547 | #if defined(CONFIG_PBX) | |
548 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
549 | .ctl_reg = 0x4, /* send zero */ | |
550 | .enable_dma = 0, | |
551 | .bits_per_word = 8, | |
552 | .cs_change_per_word = 1, | |
553 | }; | |
554 | #endif | |
555 | ||
1394f032 | 556 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
46aa04f9 | 557 | #include <linux/spi/ad7877.h> |
1394f032 | 558 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { |
1394f032 BW |
559 | .enable_dma = 0, |
560 | .bits_per_word = 16, | |
561 | }; | |
562 | ||
563 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
564 | .model = 7877, | |
565 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
566 | .x_plate_ohms = 419, | |
567 | .y_plate_ohms = 486, | |
568 | .pressure_max = 1000, | |
569 | .pressure_min = 0, | |
570 | .stopacq_polarity = 1, | |
571 | .first_conversion_delay = 3, | |
572 | .acquisition_time = 1, | |
573 | .averaging = 1, | |
574 | .pen_down_acc_interval = 1, | |
575 | }; | |
576 | #endif | |
577 | ||
46aa04f9 MH |
578 | #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) |
579 | #include <linux/spi/ad7879.h> | |
46aa04f9 MH |
580 | static const struct ad7879_platform_data bfin_ad7879_ts_info = { |
581 | .model = 7879, /* Model = AD7879 */ | |
582 | .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ | |
583 | .pressure_max = 10000, | |
584 | .pressure_min = 0, | |
585 | .first_conversion_delay = 3, /* wait 512us before do a first conversion */ | |
586 | .acquisition_time = 1, /* 4us acquisition time per sample */ | |
587 | .median = 2, /* do 8 measurements */ | |
588 | .averaging = 1, /* take the average of 4 middle samples */ | |
589 | .pen_down_acc_interval = 255, /* 9.4 ms */ | |
590 | .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ | |
591 | .gpio_default = 1, /* During initialization set GPIO = HIGH */ | |
592 | }; | |
593 | #endif | |
594 | ||
f5150155 MH |
595 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
596 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | |
597 | .enable_dma = 0, | |
598 | .bits_per_word = 16, | |
599 | }; | |
600 | #endif | |
601 | ||
6e668936 MH |
602 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
603 | static struct bfin5xx_spi_chip spidev_chip_info = { | |
604 | .enable_dma = 0, | |
605 | .bits_per_word = 8, | |
606 | }; | |
607 | #endif | |
608 | ||
2043f3f7 MH |
609 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
610 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { | |
611 | .enable_dma = 0, | |
612 | .bits_per_word = 8, | |
613 | }; | |
614 | #endif | |
615 | ||
8e9d5c7d MH |
616 | #if defined(CONFIG_MTD_DATAFLASH) \ |
617 | || defined(CONFIG_MTD_DATAFLASH_MODULE) | |
ceac2651 MH |
618 | |
619 | static struct mtd_partition bfin_spi_dataflash_partitions[] = { | |
620 | { | |
621 | .name = "bootloader(spi)", | |
622 | .size = 0x00040000, | |
623 | .offset = 0, | |
624 | .mask_flags = MTD_CAP_ROM | |
625 | }, { | |
626 | .name = "linux kernel(spi)", | |
627 | .size = 0xe0000, | |
628 | .offset = MTDPART_OFS_APPEND, | |
629 | }, { | |
630 | .name = "file system(spi)", | |
631 | .size = MTDPART_SIZ_FULL, | |
632 | .offset = MTDPART_OFS_APPEND, | |
633 | } | |
634 | }; | |
635 | ||
636 | static struct flash_platform_data bfin_spi_dataflash_data = { | |
637 | .name = "SPI Dataflash", | |
638 | .parts = bfin_spi_dataflash_partitions, | |
639 | .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions), | |
640 | }; | |
641 | ||
8e9d5c7d MH |
642 | /* DataFlash chip */ |
643 | static struct bfin5xx_spi_chip data_flash_chip_info = { | |
644 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
645 | .bits_per_word = 8, | |
646 | }; | |
647 | #endif | |
648 | ||
1394f032 BW |
649 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
650 | #if defined(CONFIG_MTD_M25P80) \ | |
651 | || defined(CONFIG_MTD_M25P80_MODULE) | |
652 | { | |
653 | /* the modalias must be the same as spi device driver name */ | |
654 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
655 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 656 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
657 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
658 | .platform_data = &bfin_spi_flash_data, | |
659 | .controller_data = &spi_flash_chip_info, | |
660 | .mode = SPI_MODE_3, | |
661 | }, | |
662 | #endif | |
8e9d5c7d MH |
663 | #if defined(CONFIG_MTD_DATAFLASH) \ |
664 | || defined(CONFIG_MTD_DATAFLASH_MODULE) | |
665 | { /* DataFlash chip */ | |
666 | .modalias = "mtd_dataflash", | |
ceac2651 | 667 | .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */ |
8e9d5c7d MH |
668 | .bus_num = 0, /* Framework bus number */ |
669 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | |
ceac2651 | 670 | .platform_data = &bfin_spi_dataflash_data, |
8e9d5c7d MH |
671 | .controller_data = &data_flash_chip_info, |
672 | .mode = SPI_MODE_3, | |
673 | }, | |
674 | #endif | |
1394f032 BW |
675 | #if defined(CONFIG_SPI_ADC_BF533) \ |
676 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
677 | { | |
678 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
679 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 680 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
681 | .chip_select = 1, /* Framework chip select. */ |
682 | .platform_data = NULL, /* No spi_driver specific config */ | |
683 | .controller_data = &spi_adc_chip_info, | |
684 | }, | |
685 | #endif | |
686 | ||
687 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
688 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
689 | { | |
690 | .modalias = "ad1836-spi", | |
691 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 692 | .bus_num = 0, |
1394f032 BW |
693 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
694 | .controller_data = &ad1836_spi_chip_info, | |
695 | }, | |
696 | #endif | |
697 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
698 | { | |
699 | .modalias = "ad9960-spi", | |
700 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 701 | .bus_num = 0, |
1394f032 BW |
702 | .chip_select = 1, |
703 | .controller_data = &ad9960_spi_chip_info, | |
704 | }, | |
705 | #endif | |
706 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
707 | { | |
708 | .modalias = "spi_mmc_dummy", | |
111cf97d | 709 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 710 | .bus_num = 0, |
1394f032 BW |
711 | .chip_select = 0, |
712 | .platform_data = NULL, | |
713 | .controller_data = &spi_mmc_chip_info, | |
714 | .mode = SPI_MODE_3, | |
715 | }, | |
716 | { | |
717 | .modalias = "spi_mmc", | |
111cf97d | 718 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 719 | .bus_num = 0, |
1394f032 BW |
720 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
721 | .platform_data = NULL, | |
722 | .controller_data = &spi_mmc_chip_info, | |
723 | .mode = SPI_MODE_3, | |
724 | }, | |
725 | #endif | |
726 | #if defined(CONFIG_PBX) | |
727 | { | |
1f83b8f1 MF |
728 | .modalias = "fxs-spi", |
729 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
730 | .bus_num = 0, |
731 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 732 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
733 | .mode = SPI_MODE_3, |
734 | }, | |
735 | { | |
1f83b8f1 MF |
736 | .modalias = "fxo-spi", |
737 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
738 | .bus_num = 0, |
739 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 740 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
741 | .mode = SPI_MODE_3, |
742 | }, | |
743 | #endif | |
1394f032 BW |
744 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
745 | { | |
746 | .modalias = "ad7877", | |
747 | .platform_data = &bfin_ad7877_ts_info, | |
748 | .irq = IRQ_PF6, | |
749 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c7d48966 | 750 | .bus_num = 0, |
1394f032 BW |
751 | .chip_select = 1, |
752 | .controller_data = &spi_ad7877_chip_info, | |
753 | }, | |
754 | #endif | |
f5150155 | 755 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
46aa04f9 MH |
756 | { |
757 | .modalias = "ad7879", | |
758 | .platform_data = &bfin_ad7879_ts_info, | |
759 | .irq = IRQ_PF7, | |
760 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | |
761 | .bus_num = 0, | |
762 | .chip_select = 1, | |
763 | .controller_data = &spi_ad7879_chip_info, | |
764 | .mode = SPI_CPHA | SPI_CPOL, | |
765 | }, | |
766 | #endif | |
6e668936 MH |
767 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
768 | { | |
769 | .modalias = "spidev", | |
770 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
771 | .bus_num = 0, | |
772 | .chip_select = 1, | |
773 | .controller_data = &spidev_chip_info, | |
774 | }, | |
775 | #endif | |
2043f3f7 MH |
776 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
777 | { | |
778 | .modalias = "bfin-lq035q1-spi", | |
779 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | |
780 | .bus_num = 0, | |
46aa04f9 | 781 | .chip_select = 2, |
2043f3f7 MH |
782 | .controller_data = &lq035q1_spi_chip_info, |
783 | .mode = SPI_CPHA | SPI_CPOL, | |
784 | }, | |
785 | #endif | |
1394f032 BW |
786 | }; |
787 | ||
5bda2723 | 788 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
1394f032 | 789 | /* SPI controller data */ |
c6c4d7bb | 790 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
791 | .num_chipselect = 8, |
792 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 793 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
794 | }; |
795 | ||
c6c4d7bb BW |
796 | /* SPI (0) */ |
797 | static struct resource bfin_spi0_resource[] = { | |
798 | [0] = { | |
799 | .start = SPI0_REGBASE, | |
800 | .end = SPI0_REGBASE + 0xFF, | |
801 | .flags = IORESOURCE_MEM, | |
802 | }, | |
803 | [1] = { | |
804 | .start = CH_SPI, | |
805 | .end = CH_SPI, | |
806 | .flags = IORESOURCE_IRQ, | |
807 | }, | |
808 | }; | |
809 | ||
810 | static struct platform_device bfin_spi0_device = { | |
811 | .name = "bfin-spi", | |
812 | .id = 0, /* Bus number */ | |
813 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
814 | .resource = bfin_spi0_resource, | |
1394f032 | 815 | .dev = { |
c6c4d7bb | 816 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
817 | }, |
818 | }; | |
819 | #endif /* spi master and devices */ | |
820 | ||
821 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
822 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb BW |
823 | .name = "bf537-lq035", |
824 | }; | |
825 | #endif | |
826 | ||
827 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | |
828 | static struct platform_device bfin_fb_adv7393_device = { | |
829 | .name = "bfin-adv7393", | |
1394f032 BW |
830 | }; |
831 | #endif | |
832 | ||
2043f3f7 MH |
833 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
834 | #include <asm/bfin-lq035q1.h> | |
835 | ||
836 | static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { | |
837 | .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, | |
46aa04f9 | 838 | .use_bl = 0, /* let something else control the LCD Blacklight */ |
2043f3f7 MH |
839 | .gpio_bl = GPIO_PF7, |
840 | }; | |
841 | ||
842 | static struct resource bfin_lq035q1_resources[] = { | |
843 | { | |
844 | .start = IRQ_PPI_ERROR, | |
845 | .end = IRQ_PPI_ERROR, | |
846 | .flags = IORESOURCE_IRQ, | |
847 | }, | |
848 | }; | |
849 | ||
850 | static struct platform_device bfin_lq035q1_device = { | |
851 | .name = "bfin-lq035q1", | |
852 | .id = -1, | |
853 | .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), | |
854 | .resource = bfin_lq035q1_resources, | |
855 | .dev = { | |
856 | .platform_data = &bfin_lq035q1_data, | |
857 | }, | |
858 | }; | |
859 | #endif | |
860 | ||
1394f032 BW |
861 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
862 | static struct resource bfin_uart_resources[] = { | |
233b28a9 | 863 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
1394f032 BW |
864 | { |
865 | .start = 0xFFC00400, | |
866 | .end = 0xFFC004FF, | |
867 | .flags = IORESOURCE_MEM, | |
233b28a9 SZ |
868 | }, |
869 | #endif | |
870 | #ifdef CONFIG_SERIAL_BFIN_UART1 | |
871 | { | |
1394f032 BW |
872 | .start = 0xFFC02000, |
873 | .end = 0xFFC020FF, | |
874 | .flags = IORESOURCE_MEM, | |
875 | }, | |
233b28a9 | 876 | #endif |
1394f032 BW |
877 | }; |
878 | ||
879 | static struct platform_device bfin_uart_device = { | |
880 | .name = "bfin-uart", | |
881 | .id = 1, | |
882 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
883 | .resource = bfin_uart_resources, | |
884 | }; | |
885 | #endif | |
886 | ||
5be36d22 GY |
887 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
888 | static struct resource bfin_sir_resources[] = { | |
889 | #ifdef CONFIG_BFIN_SIR0 | |
890 | { | |
891 | .start = 0xFFC00400, | |
892 | .end = 0xFFC004FF, | |
893 | .flags = IORESOURCE_MEM, | |
894 | }, | |
895 | #endif | |
896 | #ifdef CONFIG_BFIN_SIR1 | |
897 | { | |
898 | .start = 0xFFC02000, | |
899 | .end = 0xFFC020FF, | |
900 | .flags = IORESOURCE_MEM, | |
901 | }, | |
902 | #endif | |
903 | }; | |
904 | ||
905 | static struct platform_device bfin_sir_device = { | |
906 | .name = "bfin_sir", | |
907 | .id = 0, | |
908 | .num_resources = ARRAY_SIZE(bfin_sir_resources), | |
909 | .resource = bfin_sir_resources, | |
910 | }; | |
911 | #endif | |
912 | ||
1394f032 | 913 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
c6c4d7bb BW |
914 | static struct resource bfin_twi0_resource[] = { |
915 | [0] = { | |
916 | .start = TWI0_REGBASE, | |
917 | .end = TWI0_REGBASE, | |
918 | .flags = IORESOURCE_MEM, | |
919 | }, | |
920 | [1] = { | |
921 | .start = IRQ_TWI, | |
922 | .end = IRQ_TWI, | |
923 | .flags = IORESOURCE_IRQ, | |
924 | }, | |
925 | }; | |
926 | ||
1394f032 BW |
927 | static struct platform_device i2c_bfin_twi_device = { |
928 | .name = "i2c-bfin-twi", | |
929 | .id = 0, | |
c6c4d7bb BW |
930 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
931 | .resource = bfin_twi0_resource, | |
1394f032 BW |
932 | }; |
933 | #endif | |
934 | ||
81d9c7f2 BW |
935 | #ifdef CONFIG_I2C_BOARDINFO |
936 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |
937 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | |
938 | { | |
939 | I2C_BOARD_INFO("ad7142_joystick", 0x2C), | |
f5150155 | 940 | .irq = IRQ_PF5, |
81d9c7f2 BW |
941 | }, |
942 | #endif | |
943 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | |
944 | { | |
945 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | |
81d9c7f2 BW |
946 | }, |
947 | #endif | |
948 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) | |
949 | { | |
950 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), | |
f5150155 MH |
951 | .irq = IRQ_PG6, |
952 | }, | |
953 | #endif | |
954 | #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE) | |
955 | { | |
956 | I2C_BOARD_INFO("ad7879", 0x2F), | |
957 | .irq = IRQ_PG5, | |
958 | .platform_data = (void *)&bfin_ad7879_ts_info, | |
81d9c7f2 BW |
959 | }, |
960 | #endif | |
961 | }; | |
962 | #endif | |
963 | ||
1394f032 BW |
964 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
965 | static struct platform_device bfin_sport0_uart_device = { | |
966 | .name = "bfin-sport-uart", | |
967 | .id = 0, | |
968 | }; | |
969 | ||
970 | static struct platform_device bfin_sport1_uart_device = { | |
971 | .name = "bfin-sport-uart", | |
972 | .id = 1, | |
973 | }; | |
974 | #endif | |
975 | ||
c6c4d7bb | 976 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
96b86e94 | 977 | #define PATA_INT IRQ_PF5 |
c6c4d7bb BW |
978 | |
979 | static struct pata_platform_info bfin_pata_platform_data = { | |
980 | .ioport_shift = 1, | |
64e5c512 | 981 | .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED, |
c6c4d7bb BW |
982 | }; |
983 | ||
984 | static struct resource bfin_pata_resources[] = { | |
985 | { | |
986 | .start = 0x20314020, | |
987 | .end = 0x2031403F, | |
988 | .flags = IORESOURCE_MEM, | |
989 | }, | |
990 | { | |
991 | .start = 0x2031401C, | |
992 | .end = 0x2031401F, | |
993 | .flags = IORESOURCE_MEM, | |
994 | }, | |
995 | { | |
996 | .start = PATA_INT, | |
997 | .end = PATA_INT, | |
998 | .flags = IORESOURCE_IRQ, | |
999 | }, | |
1000 | }; | |
1001 | ||
1002 | static struct platform_device bfin_pata_device = { | |
1003 | .name = "pata_platform", | |
1004 | .id = -1, | |
1005 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
1006 | .resource = bfin_pata_resources, | |
1007 | .dev = { | |
1008 | .platform_data = &bfin_pata_platform_data, | |
1009 | } | |
1010 | }; | |
1011 | #endif | |
1012 | ||
14b03204 MH |
1013 | static const unsigned int cclk_vlev_datasheet[] = |
1014 | { | |
1015 | VRPAIR(VLEV_085, 250000000), | |
1016 | VRPAIR(VLEV_090, 376000000), | |
1017 | VRPAIR(VLEV_095, 426000000), | |
1018 | VRPAIR(VLEV_100, 426000000), | |
1019 | VRPAIR(VLEV_105, 476000000), | |
1020 | VRPAIR(VLEV_110, 476000000), | |
1021 | VRPAIR(VLEV_115, 476000000), | |
1022 | VRPAIR(VLEV_120, 500000000), | |
1023 | VRPAIR(VLEV_125, 533000000), | |
1024 | VRPAIR(VLEV_130, 600000000), | |
1025 | }; | |
1026 | ||
1027 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | |
1028 | .tuple_tab = cclk_vlev_datasheet, | |
1029 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | |
1030 | .vr_settling_time = 25 /* us */, | |
1031 | }; | |
1032 | ||
1033 | static struct platform_device bfin_dpmc = { | |
1034 | .name = "bfin dpmc", | |
1035 | .dev = { | |
1036 | .platform_data = &bfin_dmpc_vreg_data, | |
1037 | }, | |
1038 | }; | |
1039 | ||
1394f032 | 1040 | static struct platform_device *stamp_devices[] __initdata = { |
14b03204 MH |
1041 | |
1042 | &bfin_dpmc, | |
1043 | ||
1394f032 BW |
1044 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
1045 | &bfin_pcmcia_cf_device, | |
1046 | #endif | |
1047 | ||
1048 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
1049 | &rtc_device, | |
1050 | #endif | |
1051 | ||
1052 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
1053 | &sl811_hcd_device, | |
1054 | #endif | |
1055 | ||
1056 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
1057 | &isp1362_hcd_device, | |
1058 | #endif | |
1059 | ||
1060 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
1061 | &smc91x_device, | |
1062 | #endif | |
1063 | ||
f40d24d9 AL |
1064 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
1065 | &dm9000_device, | |
1066 | #endif | |
1067 | ||
561cc18b MH |
1068 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
1069 | &ax88180_device, | |
1070 | #endif | |
1071 | ||
1394f032 BW |
1072 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
1073 | &bfin_mac_device, | |
1074 | #endif | |
1075 | ||
1076 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
1077 | &net2272_bfin_device, | |
1078 | #endif | |
1079 | ||
1080 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 1081 | &bfin_spi0_device, |
1394f032 BW |
1082 | #endif |
1083 | ||
1084 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
1085 | &bfin_fb_device, | |
1086 | #endif | |
1087 | ||
2043f3f7 MH |
1088 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
1089 | &bfin_lq035q1_device, | |
1090 | #endif | |
1091 | ||
c6c4d7bb BW |
1092 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
1093 | &bfin_fb_adv7393_device, | |
1094 | #endif | |
1095 | ||
1394f032 BW |
1096 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
1097 | &bfin_uart_device, | |
1098 | #endif | |
1099 | ||
5be36d22 GY |
1100 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
1101 | &bfin_sir_device, | |
1102 | #endif | |
1103 | ||
1394f032 BW |
1104 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
1105 | &i2c_bfin_twi_device, | |
1106 | #endif | |
1107 | ||
1108 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
1109 | &bfin_sport0_uart_device, | |
1110 | &bfin_sport1_uart_device, | |
1111 | #endif | |
c6c4d7bb BW |
1112 | |
1113 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
1114 | &bfin_pata_device, | |
1115 | #endif | |
2463ef22 MH |
1116 | |
1117 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | |
1118 | &bfin_device_gpiokeys, | |
1119 | #endif | |
cad2ab65 MF |
1120 | |
1121 | &bfin_gpios_device, | |
793dc27b | 1122 | |
fc68911e MF |
1123 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
1124 | &bfin_async_nand_device, | |
1125 | #endif | |
1126 | ||
793dc27b | 1127 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
de8c43f2 | 1128 | &stamp_flash_device, |
793dc27b | 1129 | #endif |
1394f032 BW |
1130 | }; |
1131 | ||
1132 | static int __init stamp_init(void) | |
1133 | { | |
b85d858b | 1134 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
81d9c7f2 BW |
1135 | |
1136 | #ifdef CONFIG_I2C_BOARDINFO | |
1137 | i2c_register_board_info(0, bfin_i2c_board_info, | |
1138 | ARRAY_SIZE(bfin_i2c_board_info)); | |
1139 | #endif | |
1140 | ||
fc68911e | 1141 | bfin_plat_nand_init(); |
1394f032 | 1142 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
5bda2723 | 1143 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
c6c4d7bb BW |
1144 | |
1145 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
1146 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
1147 | #endif | |
81d9c7f2 | 1148 | |
1394f032 BW |
1149 | return 0; |
1150 | } | |
1151 | ||
1152 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
1153 | |
1154 | void native_machine_restart(char *cmd) | |
1155 | { | |
1156 | /* workaround reboot hang when booting from SPI */ | |
1157 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | |
1158 | bfin_gpio_reset_spi0_ssel1(); | |
1159 | } | |
137b1529 MF |
1160 | |
1161 | /* | |
1162 | * Currently the MAC address is saved in Flash by U-Boot | |
1163 | */ | |
1164 | #define FLASH_MAC 0x203f0000 | |
9862cc52 | 1165 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
1166 | { |
1167 | *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); | |
1168 | *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); | |
1169 | } | |
9862cc52 | 1170 | EXPORT_SYMBOL(bfin_get_ether_addr); |